1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * Copyright (C) 2013-2014, Linaro Ltd.
4 * Author: Al Stone <al.stone@linaro.org>
5 * Author: Graeme Gregory <graeme.gregory@linaro.org>
6 * Author: Hanjun Guo <hanjun.guo@linaro.org>
8 * Copyright (C) 2021-2023, Ventana Micro Systems Inc.
9 * Author: Sunil V L <sunilvl@ventanamicro.com>
15 /* Basic configuration for ACPI */
18 typedef u64 phys_cpuid_t;
19 #define PHYS_CPUID_INVALID INVALID_HARTID
21 /* ACPI table mapping after acpi_permanent_mmap is set */
22 void *acpi_os_ioremap(acpi_physical_address phys, acpi_size size);
23 #define acpi_os_ioremap acpi_os_ioremap
25 #define acpi_strict 1 /* No out-of-spec workarounds on RISC-V */
26 extern int acpi_disabled;
27 extern int acpi_noirq;
28 extern int acpi_pci_disabled;
30 static inline void disable_acpi(void)
33 acpi_pci_disabled = 1;
37 static inline void enable_acpi(void)
40 acpi_pci_disabled = 0;
45 * The ACPI processor driver for ACPI core code needs this macro
46 * to find out whether this cpu was already mapped (mapping from CPU hardware
47 * ID to CPU logical ID) or not.
49 #define cpu_physical_id(cpu) cpuid_to_hartid_map(cpu)
52 * Since MADT must provide at least one RINTC structure, the
53 * CPU will be always available in MADT on RISC-V.
55 static inline bool acpi_has_cpu_in_madt(void)
60 static inline void arch_fix_phys_package_id(int num, u32 slot) { }
62 void acpi_init_rintc_map(void);
63 struct acpi_madt_rintc *acpi_cpu_get_madt_rintc(int cpu);
64 u32 get_acpi_id_for_cpu(int cpu);
65 int acpi_get_riscv_isa(struct acpi_table_header *table,
66 unsigned int cpu, const char **isa);
68 static inline int acpi_numa_get_nid(unsigned int cpu) { return NUMA_NO_NODE; }
70 static inline void acpi_init_rintc_map(void) { }
71 static inline struct acpi_madt_rintc *acpi_cpu_get_madt_rintc(int cpu)
76 static inline int acpi_get_riscv_isa(struct acpi_table_header *table,
77 unsigned int cpu, const char **isa)
82 #endif /* CONFIG_ACPI */
84 #endif /*_ASM_ACPI_H*/