arch/riscv/boot/dts/starfive/jh7110_pinctrl.dtsi

   1 // SPDX-License-Identifier: GPL-2.0 OR MIT
   2 /*
   3  * Copyright (C) 2022 StarFive Technology Co., Ltd.
   4  */
   5
   6 #include <dt-bindings/gpio/gpio.h>
   7 #include <dt-bindings/pinctrl/starfive,jh7110-pinfunc.h>
   8
   9 &gpio {
  10         gmac0_pins: gmac0-pins {
  11                 gmac0-pins-reset {
  12                         sf,pins = <PAD_GPIO63>;
  13                         sf,pinmux = <PAD_GPIO63_FUNC_SEL 0>;
  14                         sf,pin-ioconfig = <IO(GPIO_IE(1)|(GPIO_PU(1)))>;
  15                         sf,pin-gpio-dout = <GPO_HIGH>;
  16                         sf,pin-gpio-doen = <OEN_LOW>;
  17                 };
  18         };
  19
  20         gmac1_pins: gmac1-pins {
  21                 gmac1-pins0 {
  22                         sf,pins = <PAD_GMAC1_MDC>;
  23                         sf,pin-ioconfig = <IO(GPIO_IE(1)|GPIO_SMT(1)|GPIO_DS(3))>;
  24                         sf,pin-syscon = <PADCFG_PAD_GMAC1_MDC_SYSCON IO_3_3V>;
  25                 };
  26         };
  27
  28         i2c0_pins: i2c0-pins {
  29                 i2c0-pins-scl {
  30                         sf,pins = <PAD_GPIO52>;
  31                         sf,pinmux = <PAD_GPIO52_FUNC_SEL 0>;
  32                         sf,pin-ioconfig = <IO(GPIO_IE(1)|(GPIO_PU(1)))>;
  33                         sf,pin-gpio-dout = <GPO_LOW>;
  34                         sf,pin-gpio-doen = <OEN_I2C0_IC_CLK_OE>;
  35                         sf,pin-gpio-din =  <GPI_I2C0_IC_CLK_IN_A>;
  36                 };
  37
  38                 i2c0-pins-sda {
  39                         sf,pins = <PAD_GPIO51>;
  40                         sf,pinmux = <PAD_GPIO51_FUNC_SEL 0>;
  41                         sf,pin-ioconfig = <IO(GPIO_IE(1)|(GPIO_PU(1)))>;
  42                         sf,pin-gpio-dout = <GPO_LOW>;
  43                         sf,pin-gpio-doen = <OEN_I2C0_IC_DATA_OE>;
  44                         sf,pin-gpio-din =  <GPI_I2C0_IC_DATA_IN_A>;
  45                 };
  46         };
  47
  48         i2c6_pins: i2c6-pins {
  49                 i2c6-pins-scl {
  50                         sf,pins = <PAD_GPIO20>;
  51                         sf,pinmux = <PAD_GPIO20_FUNC_SEL 0>;
  52                         sf,pin-ioconfig = <IO(GPIO_IE(1)|(GPIO_PU(1)))>;
  53                         sf,pin-gpio-dout = <GPO_LOW>;
  54                         sf,pin-gpio-doen = <OEN_I2C6_IC_CLK_OE>;
  55                         sf,pin-gpio-din =  <GPI_I2C6_IC_CLK_IN_A>;
  56                 };
  57
  58                 i2c6-pins-sda {
  59                         sf,pins = <PAD_GPIO19>;
  60                         sf,pinmux = <PAD_GPIO19_FUNC_SEL 0>;
  61                         sf,pin-ioconfig = <IO(GPIO_IE(1)|(GPIO_PU(1)))>;
  62                         sf,pin-gpio-dout = <GPO_LOW>;
  63                         sf,pin-gpio-doen = <OEN_I2C6_IC_DATA_OE>;
  64                         sf,pin-gpio-din =  <GPI_I2C6_IC_DATA_IN_A>;
  65                 };
  66         };
  67
  68         mmc0_pins: mmc0-pins {
  69                  mmc0-pins-rest {
  70                         sf,pins = <PAD_GPIO62>;
  71                         sf,pinmux = <PAD_GPIO62_FUNC_SEL 0>;
  72                         sf,pin-ioconfig = <IO(GPIO_IE(1)|(GPIO_PU(1)))>;
  73                         sf,pin-gpio-dout = <GPO_SDIO0_RST_N>;
  74                         sf,pin-gpio-doen = <OEN_LOW>;
  75                 };
  76         };
  77
  78         mmc1_pins: mmc1-pins {
  79                  mmc1-pins0 {
  80                         sf,pins = <PAD_GPIO10>;
  81                         sf,pinmux = <PAD_GPIO10_FUNC_SEL 0>;
  82                         sf,pin-ioconfig = <IO(GPIO_IE(1)|(GPIO_PU(1)))>;
  83                         sf,pin-gpio-dout = <GPO_SDIO1_CCLK_OUT>;
  84                         sf,pin-gpio-doen = <OEN_LOW>;
  85                 };
  86
  87                 mmc1-pins1 {
  88                         sf,pins = <PAD_GPIO9>;
  89                         sf,pinmux = <PAD_GPIO9_FUNC_SEL 0>;
  90                         sf,pin-ioconfig = <IO(GPIO_IE(1)|(GPIO_PU(1)))>;
  91                         sf,pin-gpio-dout = <GPO_SDIO1_CCMD_OUT>;
  92                         sf,pin-gpio-doen = <OEN_SDIO1_CCMD_OUT_EN>;
  93                         sf,pin-gpio-din =  <GPI_SDIO1_CCMD_IN>;
  94                 };
  95
  96                 mmc1-pins2 {
  97                         sf,pins = <PAD_GPIO11>;
  98                         sf,pinmux = <PAD_GPIO11_FUNC_SEL 0>;
  99                         sf,pin-ioconfig = <IO(GPIO_IE(1)|(GPIO_PU(1)))>;
 100                         sf,pin-gpio-dout = <GPO_SDIO1_CDATA_OUT_0>;
 101                         sf,pin-gpio-doen = <OEN_SDIO1_CDATA_OUT_EN_0>;
 102                         sf,pin-gpio-din =  <GPI_SDIO1_CDATA_IN_0>;
 103                 };
 104
 105                 mmc1-pins3 {
 106                         sf,pins = <PAD_GPIO12>;
 107                         sf,pinmux = <PAD_GPIO12_FUNC_SEL 0>;
 108                         sf,pin-ioconfig = <IO(GPIO_IE(1)|(GPIO_PU(1)))>;
 109                         sf,pin-gpio-dout = <GPO_SDIO1_CDATA_OUT_1>;
 110                         sf,pin-gpio-doen = <OEN_SDIO1_CDATA_OUT_EN_1>;
 111                         sf,pin-gpio-din =  <GPI_SDIO1_CDATA_IN_1>;
 112                 };
 113
 114                 mmc1-pins4 {
 115                         sf,pins = <PAD_GPIO7>;
 116                         sf,pinmux = <PAD_GPIO7_FUNC_SEL 0>;
 117                         sf,pin-ioconfig = <IO(GPIO_IE(1)|(GPIO_PU(1)))>;
 118                         sf,pin-gpio-dout = <GPO_SDIO1_CDATA_OUT_2>;
 119                         sf,pin-gpio-doen = <OEN_SDIO1_CDATA_OUT_EN_2>;
 120                         sf,pin-gpio-din =  <GPI_SDIO1_CDATA_IN_2>;
 121                 };
 122
 123                 mmc1-pins5 {
 124                         sf,pins = <PAD_GPIO8>;
 125                         sf,pinmux = <PAD_GPIO8_FUNC_SEL 0>;
 126                         sf,pin-ioconfig = <IO(GPIO_IE(1)|(GPIO_PU(1)))>;
 127                         sf,pin-gpio-dout = <GPO_SDIO1_CDATA_OUT_3>;
 128                         sf,pin-gpio-doen = <OEN_SDIO1_CDATA_OUT_EN_3>;
 129                         sf,pin-gpio-din =  <GPI_SDIO1_CDATA_IN_3>;
 130                 };
 131         };
 132
 133         pwmdac0_pins: pwmdac0-pins {
 134                 pwmdac0-pins-left {
 135                         sf,pins = <PAD_GPIO19>;
 136                         sf,pinmux = <PAD_GPIO19_FUNC_SEL 0>;
 137                         sf,pin-ioconfig = <IO(GPIO_IE(1)|(GPIO_PU(1)))>;
 138                         sf,pin-gpio-dout = <GPO_PWMDAC0_LEFT_OUTPUT>;
 139                         sf,pin-gpio-doen = <OEN_LOW>;
 140                 };
 141
 142                 pwmdac0-pins-right {
 143                         sf,pins = <PAD_GPIO42>;
 144                         sf,pinmux = <PAD_GPIO42_FUNC_SEL 0>;
 145                         sf,pin-ioconfig = <IO(GPIO_IE(1)|(GPIO_PU(1)))>;
 146                         sf,pin-gpio-dout = <GPO_PWMDAC0_RIGHT_OUTPUT>;
 147                         sf,pin-gpio-doen = <OEN_LOW>;
 148                 };
 149         };
 150
 151         i2s_clk_pins: i2s-clk0 {
 152                 i2s-clk0_mclk {
 153                         sf,pins = <PAD_GPIO32>;
 154                         sf,pinmux = <PAD_GPIO32_FUNC_SEL 0>;
 155                         sf,pin-ioconfig = <IO(GPIO_IE(1))>;
 156                         sf,pin-gpio-dout = <GPO_CRG0_MCLK_OUT>;
 157                         sf,pin-gpio-doen = <OEN_LOW>;
 158                 };
 159
 160                 i2s-clk0_bclk {
 161                         sf,pins = <PAD_GPIO37>;
 162                         sf,pinmux = <PAD_GPIO37_FUNC_SEL 0>;
 163                         sf,pin-ioconfig = <IO(GPIO_IE(1))>;
 164                         sf,pin-gpio-dout = <GPO_I2SRX0_BCLK_MST>;
 165                         sf,pin-gpio-doen = <OEN_LOW>;
 166                 };
 167
 168                 i2s-clk0_lrclk {
 169                         sf,pins = <PAD_GPIO25>;
 170                         sf,pinmux = <PAD_GPIO25_FUNC_SEL 0>;
 171                         sf,pin-ioconfig = <IO(GPIO_IE(1))>;
 172                         sf,pin-gpio-dout = <GPO_I2SRX0_LRCK_MST>;
 173                         sf,pin-gpio-doen = <OEN_LOW>;
 174                 };
 175         };
 176
 177         i2stx_pins: i2stx-pins {
 178                 i2stx-pins0 {
 179                         sf,pins = <PAD_GPIO18>;
 180                         sf,pinmux = <PAD_GPIO18_FUNC_SEL 0>;
 181                         sf,pin-ioconfig = <IO(GPIO_IE(1))>;
 182                         sf,pin-gpio-dout = <GPO_I2STX_4CH1_SDO0>;
 183                         sf,pin-gpio-doen = <OEN_LOW>;
 184                 };
 185         };
 186
 187         i2srx_pins: i2srx-pins {
 188                 i2srx-pins0 {
 189                         sf,pins = <PAD_GPIO17>;
 190                         sf,pinmux = <PAD_GPIO17_FUNC_SEL 0>;
 191                         sf,pin-ioconfig = <IO(GPIO_IE(1))>;
 192                         sf,pin-gpio-doen = <OEN_HIGH>;
 193                         sf,pin-gpio-din =  <GPI_I2SRX0_EXT_SDIN0>;
 194                 };
 195         };
 196
 197
 198         can0_pins: can0-pins {
 199                 can0-pins0 {
 200                         sf,pins = <PAD_GPIO28>;
 201                         sf,pinmux = <PAD_GPIO28_FUNC_SEL 0>;
 202                         sf,pin-ioconfig = <IO(GPIO_IE(1))>;
 203                         sf,pin-gpio-dout = <GPO_CAN0_CTRL_TXD>;
 204                         sf,pin-gpio-doen = <OEN_LOW>;
 205                 };
 206
 207                 can0-pins1 {
 208                         sf,pins = <PAD_GPIO27>;
 209                         sf,pinmux = <PAD_GPIO27_FUNC_SEL 0>;
 210                         sf,pin-ioconfig = <IO(GPIO_IE(1))>;
 211                         sf,pin-gpio-doen = <OEN_HIGH>;
 212                         sf,pin-gpio-din =  <GPI_CAN0_CTRL_RXD>;
 213                 };
 214
 215                 can0-pins2 {
 216                         sf,pins = <PAD_GPIO45>;
 217                         sf,pinmux = <PAD_GPIO45_FUNC_SEL 0>;
 218                         sf,pin-ioconfig = <IO(GPIO_IE(1))>;
 219                         sf,pin-gpio-dout = <GPO_CAN0_CTRL_STBY>;
 220                         sf,pin-gpio-doen = <OEN_LOW>;
 221                 };
 222         };
 223
 224         can1_pins: can1-pins {
 225                 can1-pins0 {
 226                         sf,pins = <PAD_GPIO28>;
 227                         sf,pinmux = <PAD_GPIO28_FUNC_SEL 0>;
 228                         sf,pin-ioconfig = <IO(GPIO_IE(1))>;
 229                         sf,pin-gpio-dout = <GPO_CAN1_CTRL_TXD>;
 230                         sf,pin-gpio-doen = <OEN_LOW>;
 231                 };
 232
 233                 can1-pins1 {
 234                         sf,pins = <PAD_GPIO27>;
 235                         sf,pinmux = <PAD_GPIO27_FUNC_SEL 0>;
 236                         sf,pin-ioconfig = <IO(GPIO_IE(1))>;
 237                         sf,pin-gpio-doen = <OEN_HIGH>;
 238                         sf,pin-gpio-din =  <GPI_CAN1_CTRL_RXD>;
 239                 };
 240
 241                 can1-pins2 {
 242                         sf,pins = <PAD_GPIO45>;
 243                         sf,pinmux = <PAD_GPIO45_FUNC_SEL 0>;
 244                         sf,pin-ioconfig = <IO(GPIO_IE(1))>;
 245                         sf,pin-gpio-dout = <GPO_CAN1_CTRL_STBY>;
 246                         sf,pin-gpio-doen = <OEN_LOW>;
 247                 };
 248         };
 249
 250         pwm_ch0_pins: pwm_ch0-pins {
 251                 pwm_ch0-pins0 {
 252                         sf,pins = <PAD_GPIO51>;
 253                         sf,pinmux = <PAD_GPIO51_FUNC_SEL 0>;
 254                         sf,pin-ioconfig = <IO(GPIO_IE(1))>;
 255                         sf,pin-gpio-dout = <GPO_PTC0_PWM_0>;
 256                         sf,pin-gpio-doen = <OEN_PTC0_PWM_0_OE_N>;
 257                 };
 258         };
 259
 260         ssp0_pins: ssp0-pins {
 261                 ssp0-pins_tx {
 262                         sf,pins = <PAD_GPIO57>;
 263                         sf,pinmux = <PAD_GPIO57_FUNC_SEL 0>;
 264                         sf,pin-ioconfig = <IO(GPIO_IE(1))>;
 265                         sf,pin-gpio-dout = <GPO_SPI0_SSPTXD>;
 266                         sf,pin-gpio-doen = <OEN_LOW>;
 267                 };
 268
 269                 ssp0-pins_rx {
 270                         sf,pins = <PAD_GPIO58>;
 271                         sf,pinmux = <PAD_GPIO58_FUNC_SEL 0>;
 272                         sf,pin-ioconfig = <IO(GPIO_IE(1))>;
 273                         sf,pin-gpio-doen = <OEN_HIGH>;
 274                         sf,pin-gpio-din =  <GPI_SPI0_SSPRXD>;
 275                 };
 276
 277                 ssp0-pins_clk {
 278                         sf,pins = <PAD_GPIO61>;
 279                         sf,pinmux = <PAD_GPIO61_FUNC_SEL 0>;
 280                         sf,pin-ioconfig = <IO(GPIO_IE(1))>;
 281                         sf,pin-gpio-dout = <GPO_SPI0_SSPCLKOUT>;
 282                         sf,pin-gpio-doen = <OEN_LOW>;
 283                 };
 284
 285                 ssp0-pins_cs {
 286                         sf,pins = <PAD_GPIO14>;
 287                         sf,pinmux = <PAD_GPIO14_FUNC_SEL 0>;
 288                         sf,pin-ioconfig = <IO(GPIO_IE(1))>;
 289                         sf,pin-gpio-dout = <GPO_SPI0_SSPFSSOUT>;
 290                         sf,pin-gpio-doen = <OEN_LOW>;
 291                 };
 292         };
 293
 294         sc2235_pins: sc2235-pins {
 295                 sc2235-1V8-pins {
 296                         sf,pins = <PAD_GPIO11>;
 297                         sf,pinmux = <PAD_GPIO11_FUNC_SEL 0>;
 298                         sf,pin-ioconfig = <IO(GPIO_IE(1))>;
 299                         sf,pin-gpio-dout = <GPO_HIGH>;
 300                         sf,pin-gpio-doen = <OEN_LOW>;
 301                 };
 302
 303                 sc2235-1V5-pins {
 304                         sf,pins = <PAD_GPIO12>;
 305                         sf,pinmux = <PAD_GPIO12_FUNC_SEL 0>;
 306                         sf,pin-ioconfig = <IO(GPIO_IE(1))>;
 307                         sf,pin-gpio-dout = <GPO_HIGH>;
 308                         sf,pin-gpio-doen = <OEN_LOW>;
 309                 };
 310
 311                 sc2235-2V8-pins {
 312                         sf,pins = <PAD_GPIO10>;
 313                         sf,pinmux = <PAD_GPIO10_FUNC_SEL 0>;
 314                         sf,pin-ioconfig = <IO(GPIO_IE(1))>;
 315                         sf,pin-gpio-dout = <GPO_HIGH>;
 316                         sf,pin-gpio-doen = <OEN_LOW>;
 317                 };
 318
 319                 sc2235-reset-pins {
 320                         sf,pins = <PAD_GPIO16>;
 321                         sf,pinmux = <PAD_GPIO16_FUNC_SEL 0>;
 322                         sf,pin-ioconfig = <IO(GPIO_IE(1))>;
 323                         sf,pin-gpio-dout = <GPO_HIGH>;
 324                         sf,pin-gpio-doen = <OEN_LOW>;
 325                 };
 326
 327                 sc2235-pwdn-pins {
 328                         sf,pins = <PAD_GPIO15>;
 329                         sf,pinmux = <PAD_GPIO15_FUNC_SEL 0>;
 330                         sf,pin-ioconfig = <IO(GPIO_IE(1))>;
 331                         sf,pin-gpio-dout = <GPO_HIGH>;
 332                         sf,pin-gpio-doen = <OEN_LOW>;
 333                 };
 334
 335                 sc2235-esync-pins {
 336                         sf,pins = <PAD_GPIO17>;
 337                         sf,pinmux = <PAD_GPIO17_FUNC_SEL 0>;
 338                         sf,pin-ioconfig = <IO(GPIO_IE(1))>;
 339                         sf,pin-gpio-dout = <GPO_LOW>;
 340                         sf,pin-gpio-doen = <OEN_LOW>;
 341                 };
 342
 343                 sc2235-oen-pins {
 344                         sf,pins = <PAD_GPIO18>;
 345                         sf,pinmux = <PAD_GPIO18_FUNC_SEL 0>;
 346                         sf,pin-ioconfig = <IO(GPIO_IE(1))>;
 347                         sf,pin-gpio-dout = <GPO_LOW>;
 348                         sf,pin-gpio-doen = <OEN_LOW>;
 349                 };
 350         };
 351
 352         dvp_pins: dvp-pins {
 353                 dvp-clk-pins {
 354                         sf,pins = <PAD_GPIO21>;
 355                         sf,pinmux = <PAD_GPIO21_FUNC_SEL 2>;
 356                         sf,pin-ioconfig = <IO(GPIO_IE(1))>;
 357                         sf,padmux = <U0_SYS_CRG_DVP_CLK_FUNC_SEL 1>;
 358                 };
 359
 360                 dvp-vsync-pins {
 361                         sf,pins = <PAD_GPIO22>;
 362                         sf,pinmux = <PAD_GPIO22_FUNC_SEL 2>;
 363                         sf,pin-ioconfig = <IO(GPIO_IE(1))>;
 364                         sf,padmux = <U0_DOM_ISP_TOP_U0_VIN_DVP_VVALID_C_FUNC_SEL 1>;
 365                 };
 366
 367                 dvp-hsync-pins {
 368                         sf,pins = <PAD_GPIO23>;
 369                         sf,pinmux = <PAD_GPIO23_FUNC_SEL 2>;
 370                         sf,pin-ioconfig = <IO(GPIO_IE(1))>;
 371                         sf,padmux = <U0_DOM_ISP_TOP_U0_VIN_DVP_HVALID_C_FUNC_SEL 1>;
 372                 };
 373
 374                 dvp-data0-pins {
 375                         sf,pins = <PAD_GPIO24>;
 376                         sf,pinmux = <PAD_GPIO24_FUNC_SEL 2>;
 377                         sf,pin-ioconfig = <IO(GPIO_IE(1))>;
 378                         sf,padmux = <U0_DOM_ISP_TOP_U0_VIN_DVP_DATA_C0_FUNC_SEL 1>;
 379                 };
 380
 381                 dvp-data1-pins {
 382                         sf,pins = <PAD_GPIO25>;
 383                         sf,pinmux = <PAD_GPIO25_FUNC_SEL 2>;
 384                         sf,pin-ioconfig = <IO(GPIO_IE(1))>;
 385                         sf,padmux = <U0_DOM_ISP_TOP_U0_VIN_DVP_DATA_C1_FUNC_SEL 1>;
 386                 };
 387
 388                 dvp-data2-pins {
 389                         sf,pins = <PAD_GPIO26>;
 390                         sf,pinmux = <PAD_GPIO26_FUNC_SEL 2>;
 391                         sf,pin-ioconfig = <IO(GPIO_IE(1))>;
 392                         sf,padmux = <U0_DOM_ISP_TOP_U0_VIN_DVP_DATA_C2_FUNC_SEL 1>;
 393                 };
 394
 395                 dvp-data3-pins {
 396                         sf,pins = <PAD_GPIO27>;
 397                         sf,pinmux = <PAD_GPIO27_FUNC_SEL 2>;
 398                         sf,pin-ioconfig = <IO(GPIO_IE(1))>;
 399                         sf,padmux = <U0_DOM_ISP_TOP_U0_VIN_DVP_DATA_C3_FUNC_SEL 1>;
 400                 };
 401
 402                 dvp-data4-pins {
 403                         sf,pins = <PAD_GPIO28>;
 404                         sf,pinmux = <PAD_GPIO28_FUNC_SEL 2>;
 405                         sf,pin-ioconfig = <IO(GPIO_IE(1))>;
 406                         sf,padmux = <U0_DOM_ISP_TOP_U0_VIN_DVP_DATA_C4_FUNC_SEL 1>;
 407                 };
 408
 409                 dvp-data5-pins {
 410                         sf,pins = <PAD_GPIO29>;
 411                         sf,pinmux = <PAD_GPIO29_FUNC_SEL 2>;
 412                         sf,pin-ioconfig = <IO(GPIO_IE(1))>;
 413                         sf,padmux = <U0_DOM_ISP_TOP_U0_VIN_DVP_DATA_C5_FUNC_SEL 1>;
 414                 };
 415
 416                 dvp-data6-pins {
 417                         sf,pins = <PAD_GPIO30>;
 418                         sf,pinmux = <PAD_GPIO30_FUNC_SEL 2>;
 419                         sf,pin-ioconfig = <IO(GPIO_IE(1))>;
 420                         sf,padmux = <U0_DOM_ISP_TOP_U0_VIN_DVP_DATA_C6_FUNC_SEL 1>;
 421                 };
 422
 423                 dvp-data7-pins {
 424                         sf,pins = <PAD_GPIO31>;
 425                         sf,pinmux = <PAD_GPIO31_FUNC_SEL 2>;
 426                         sf,pin-ioconfig = <IO(GPIO_IE(1))>;
 427                         sf,padmux = <U0_DOM_ISP_TOP_U0_VIN_DVP_DATA_C7_FUNC_SEL 1>;
 428                 };
 429
 430                 dvp-data8-pins {
 431                         sf,pins = <PAD_GPIO32>;
 432                         sf,pinmux = <PAD_GPIO32_FUNC_SEL 2>;
 433                         sf,pin-ioconfig = <IO(GPIO_IE(1))>;
 434                         sf,padmux = <U0_DOM_ISP_TOP_U0_VIN_DVP_DATA_C8_FUNC_SEL 1>;
 435                 };
 436
 437                 dvp-data9-pins {
 438                         sf,pins = <PAD_GPIO33>;
 439                         sf,pinmux = <PAD_GPIO33_FUNC_SEL 2>;
 440                         sf,pin-ioconfig = <IO(GPIO_IE(1))>;
 441                         sf,padmux = <U0_DOM_ISP_TOP_U0_VIN_DVP_DATA_C9_FUNC_SEL 1>;
 442                 };
 443
 444                 dvp-data10-pins {
 445                         sf,pins = <PAD_GPIO34>;
 446                         sf,pinmux = <PAD_GPIO34_FUNC_SEL 2>;
 447                         sf,pin-ioconfig = <IO(GPIO_IE(1))>;
 448                         sf,padmux = <U0_DOM_ISP_TOP_U0_VIN_DVP_DATA_C10_FUNC_SEL 1>;
 449                 };
 450
 451                 dvp-data11-pins {
 452                         sf,pins = <PAD_GPIO35>;
 453                         sf,pinmux = <PAD_GPIO35_FUNC_SEL 2>;
 454                         sf,pin-ioconfig = <IO(GPIO_IE(1) | GPIO_PD(1))>;
 455                         sf,padmux = <U0_DOM_ISP_TOP_U0_VIN_DVP_DATA_C11_FUNC_SEL 1>;
 456                 };
 457         };
 458 };
 459
 460 &gpioa {
 461         pwm_ch4_pins: pwm_ch4-pins {
 462                 pwm_ch4-pins0 {
 463                         sf,pins = <PAD_RGPIO2>;
 464                         sf,pin-ioconfig = <IO(GPIO_IE(1))>;
 465                         sf,pin-gpio-dout = <U0_PWM_8CH_PTC_PWM_4>;
 466                         sf,pin-gpio-doen = <U0_PWM_8CH_PTC_OE_N_4>;
 467                 };
 468         };
 469 };
 470
 471 &gmac0 {
 472         pinctrl-names = "default";
 473         pinctrl-0 = <&gmac0_pins>;
 474         status = "okay";
 475 };
 476
 477 &gmac1 {
 478         pinctrl-names = "default";
 479         pinctrl-0 = <&gmac1_pins>;
 480 };
 481
 482 &i2c6 {
 483         pinctrl-names = "default";
 484         pinctrl-0 = <&i2c6_pins>;
 485         status = "okay";
 486 };
 487
 488 &i2c0 {
 489         pinctrl-names = "default";
 490         pinctrl-0 = <&i2c0_pins>;
 491         status = "okay";
 492 };
 493
 494 &i2stx_4ch1 {
 495         pinctrl-names = "default";
 496         pinctrl-0 = <&i2s_clk_pins &i2stx_pins>;
 497         status = "okay";
 498 };
 499
 500 &i2srx_3ch {
 501         pinctrl-names = "default";
 502         pinctrl-0 = <&i2srx_pins>;
 503         status = "okay";
 504 };
 505
 506 &can0 {
 507         pinctrl-names = "default";
 508         pinctrl-0 = <&can0_pins>;
 509         status = "okay";
 510 };
 511
 512 &pwmdac {
 513         pinctrl-names = "default";
 514         pinctrl-0 = <&pwmdac0_pins>;
 515         status = "okay";
 516 };
 517
 518 &ptc {
 519         pinctrl-names = "default";
 520         pinctrl-0 = <&pwm_ch0_pins>;
 521         status = "okay";
 522 };
 523
 524 &sdio0 {
 525         pinctrl-names = "default";
 526         pinctrl-0 = <&mmc0_pins>;
 527         status = "okay";
 528 };
 529
 530 &sdio1 {
 531         pinctrl-names = "default";
 532         pinctrl-0 = <&mmc1_pins>;
 533         status = "okay";
 534 };