1 // SPDX-License-Identifier: GPL-2.0 OR MIT
3 * Copyright (C) 2022 StarFive Technology Co., Ltd.
6 #include <dt-bindings/gpio/gpio.h>
7 #include <dt-bindings/pinctrl/starfive,jh7110-pinfunc.h>
10 gmac0_pins: gmac0-pins {
12 sf,pins = <PAD_GPIO63>;
13 sf,pinmux = <PAD_GPIO63_FUNC_SEL 0>;
14 sf,pin-ioconfig = <IO(GPIO_IE(1)|(GPIO_PU(1)))>;
15 sf,pin-gpio-dout = <GPO_HIGH>;
16 sf,pin-gpio-doen = <OEN_LOW>;
20 gmac1_pins: gmac1-pins {
22 sf,pins = <PAD_GMAC1_MDC>;
23 sf,pin-ioconfig = <IO(GPIO_IE(1)|GPIO_SMT(1)|GPIO_DS(3))>;
24 sf,pin-syscon = <PADCFG_PAD_GMAC1_MDC_SYSCON IO_3_3V>;
28 i2c0_pins: i2c0-pins {
30 sf,pins = <PAD_GPIO52>;
31 sf,pinmux = <PAD_GPIO52_FUNC_SEL 0>;
32 sf,pin-ioconfig = <IO(GPIO_IE(1)|(GPIO_PU(1)))>;
33 sf,pin-gpio-dout = <GPO_LOW>;
34 sf,pin-gpio-doen = <OEN_I2C0_IC_CLK_OE>;
35 sf,pin-gpio-din = <GPI_I2C0_IC_CLK_IN_A>;
39 sf,pins = <PAD_GPIO51>;
40 sf,pinmux = <PAD_GPIO51_FUNC_SEL 0>;
41 sf,pin-ioconfig = <IO(GPIO_IE(1)|(GPIO_PU(1)))>;
42 sf,pin-gpio-dout = <GPO_LOW>;
43 sf,pin-gpio-doen = <OEN_I2C0_IC_DATA_OE>;
44 sf,pin-gpio-din = <GPI_I2C0_IC_DATA_IN_A>;
48 i2c6_pins: i2c6-pins {
50 sf,pins = <PAD_GPIO20>;
51 sf,pinmux = <PAD_GPIO20_FUNC_SEL 0>;
52 sf,pin-ioconfig = <IO(GPIO_IE(1)|(GPIO_PU(1)))>;
53 sf,pin-gpio-dout = <GPO_LOW>;
54 sf,pin-gpio-doen = <OEN_I2C6_IC_CLK_OE>;
55 sf,pin-gpio-din = <GPI_I2C6_IC_CLK_IN_A>;
59 sf,pins = <PAD_GPIO19>;
60 sf,pinmux = <PAD_GPIO19_FUNC_SEL 0>;
61 sf,pin-ioconfig = <IO(GPIO_IE(1)|(GPIO_PU(1)))>;
62 sf,pin-gpio-dout = <GPO_LOW>;
63 sf,pin-gpio-doen = <OEN_I2C6_IC_DATA_OE>;
64 sf,pin-gpio-din = <GPI_I2C6_IC_DATA_IN_A>;
68 mmc0_pins: mmc0-pins {
70 sf,pins = <PAD_GPIO62>;
71 sf,pinmux = <PAD_GPIO62_FUNC_SEL 0>;
72 sf,pin-ioconfig = <IO(GPIO_IE(1)|(GPIO_PU(1)))>;
73 sf,pin-gpio-dout = <GPO_SDIO0_RST_N>;
74 sf,pin-gpio-doen = <OEN_LOW>;
78 mmc1_pins: mmc1-pins {
80 sf,pins = <PAD_GPIO10>;
81 sf,pinmux = <PAD_GPIO10_FUNC_SEL 0>;
82 sf,pin-ioconfig = <IO(GPIO_IE(1)|(GPIO_PU(1)))>;
83 sf,pin-gpio-dout = <GPO_SDIO1_CCLK_OUT>;
84 sf,pin-gpio-doen = <OEN_LOW>;
88 sf,pins = <PAD_GPIO9>;
89 sf,pinmux = <PAD_GPIO9_FUNC_SEL 0>;
90 sf,pin-ioconfig = <IO(GPIO_IE(1)|(GPIO_PU(1)))>;
91 sf,pin-gpio-dout = <GPO_SDIO1_CCMD_OUT>;
92 sf,pin-gpio-doen = <OEN_SDIO1_CCMD_OUT_EN>;
93 sf,pin-gpio-din = <GPI_SDIO1_CCMD_IN>;
97 sf,pins = <PAD_GPIO11>;
98 sf,pinmux = <PAD_GPIO11_FUNC_SEL 0>;
99 sf,pin-ioconfig = <IO(GPIO_IE(1)|(GPIO_PU(1)))>;
100 sf,pin-gpio-dout = <GPO_SDIO1_CDATA_OUT_0>;
101 sf,pin-gpio-doen = <OEN_SDIO1_CDATA_OUT_EN_0>;
102 sf,pin-gpio-din = <GPI_SDIO1_CDATA_IN_0>;
106 sf,pins = <PAD_GPIO12>;
107 sf,pinmux = <PAD_GPIO12_FUNC_SEL 0>;
108 sf,pin-ioconfig = <IO(GPIO_IE(1)|(GPIO_PU(1)))>;
109 sf,pin-gpio-dout = <GPO_SDIO1_CDATA_OUT_1>;
110 sf,pin-gpio-doen = <OEN_SDIO1_CDATA_OUT_EN_1>;
111 sf,pin-gpio-din = <GPI_SDIO1_CDATA_IN_1>;
115 sf,pins = <PAD_GPIO7>;
116 sf,pinmux = <PAD_GPIO7_FUNC_SEL 0>;
117 sf,pin-ioconfig = <IO(GPIO_IE(1)|(GPIO_PU(1)))>;
118 sf,pin-gpio-dout = <GPO_SDIO1_CDATA_OUT_2>;
119 sf,pin-gpio-doen = <OEN_SDIO1_CDATA_OUT_EN_2>;
120 sf,pin-gpio-din = <GPI_SDIO1_CDATA_IN_2>;
124 sf,pins = <PAD_GPIO8>;
125 sf,pinmux = <PAD_GPIO8_FUNC_SEL 0>;
126 sf,pin-ioconfig = <IO(GPIO_IE(1)|(GPIO_PU(1)))>;
127 sf,pin-gpio-dout = <GPO_SDIO1_CDATA_OUT_3>;
128 sf,pin-gpio-doen = <OEN_SDIO1_CDATA_OUT_EN_3>;
129 sf,pin-gpio-din = <GPI_SDIO1_CDATA_IN_3>;
133 pwmdac0_pins: pwmdac0-pins {
135 sf,pins = <PAD_GPIO19>;
136 sf,pinmux = <PAD_GPIO19_FUNC_SEL 0>;
137 sf,pin-ioconfig = <IO(GPIO_IE(1)|(GPIO_PU(1)))>;
138 sf,pin-gpio-dout = <GPO_PWMDAC0_LEFT_OUTPUT>;
139 sf,pin-gpio-doen = <OEN_LOW>;
143 sf,pins = <PAD_GPIO42>;
144 sf,pinmux = <PAD_GPIO42_FUNC_SEL 0>;
145 sf,pin-ioconfig = <IO(GPIO_IE(1)|(GPIO_PU(1)))>;
146 sf,pin-gpio-dout = <GPO_PWMDAC0_RIGHT_OUTPUT>;
147 sf,pin-gpio-doen = <OEN_LOW>;
151 i2s_clk_pins: i2s-clk0 {
153 sf,pins = <PAD_GPIO32>;
154 sf,pinmux = <PAD_GPIO32_FUNC_SEL 0>;
155 sf,pin-ioconfig = <IO(GPIO_IE(1))>;
156 sf,pin-gpio-dout = <GPO_CRG0_MCLK_OUT>;
157 sf,pin-gpio-doen = <OEN_LOW>;
161 sf,pins = <PAD_GPIO37>;
162 sf,pinmux = <PAD_GPIO37_FUNC_SEL 0>;
163 sf,pin-ioconfig = <IO(GPIO_IE(1))>;
164 sf,pin-gpio-dout = <GPO_I2SRX0_BCLK_MST>;
165 sf,pin-gpio-doen = <OEN_LOW>;
169 sf,pins = <PAD_GPIO25>;
170 sf,pinmux = <PAD_GPIO25_FUNC_SEL 0>;
171 sf,pin-ioconfig = <IO(GPIO_IE(1))>;
172 sf,pin-gpio-dout = <GPO_I2SRX0_LRCK_MST>;
173 sf,pin-gpio-doen = <OEN_LOW>;
177 i2stx_pins: i2stx-pins {
179 sf,pins = <PAD_GPIO18>;
180 sf,pinmux = <PAD_GPIO18_FUNC_SEL 0>;
181 sf,pin-ioconfig = <IO(GPIO_IE(1))>;
182 sf,pin-gpio-dout = <GPO_I2STX_4CH1_SDO0>;
183 sf,pin-gpio-doen = <OEN_LOW>;
187 i2srx_pins: i2srx-pins {
189 sf,pins = <PAD_GPIO17>;
190 sf,pinmux = <PAD_GPIO17_FUNC_SEL 0>;
191 sf,pin-ioconfig = <IO(GPIO_IE(1))>;
192 sf,pin-gpio-doen = <OEN_HIGH>;
193 sf,pin-gpio-din = <GPI_I2SRX0_EXT_SDIN0>;
198 can0_pins: can0-pins {
200 sf,pins = <PAD_GPIO28>;
201 sf,pinmux = <PAD_GPIO28_FUNC_SEL 0>;
202 sf,pin-ioconfig = <IO(GPIO_IE(1))>;
203 sf,pin-gpio-dout = <GPO_CAN0_CTRL_TXD>;
204 sf,pin-gpio-doen = <OEN_LOW>;
208 sf,pins = <PAD_GPIO27>;
209 sf,pinmux = <PAD_GPIO27_FUNC_SEL 0>;
210 sf,pin-ioconfig = <IO(GPIO_IE(1))>;
211 sf,pin-gpio-doen = <OEN_HIGH>;
212 sf,pin-gpio-din = <GPI_CAN0_CTRL_RXD>;
216 sf,pins = <PAD_GPIO45>;
217 sf,pinmux = <PAD_GPIO45_FUNC_SEL 0>;
218 sf,pin-ioconfig = <IO(GPIO_IE(1))>;
219 sf,pin-gpio-dout = <GPO_CAN0_CTRL_STBY>;
220 sf,pin-gpio-doen = <OEN_LOW>;
224 can1_pins: can1-pins {
226 sf,pins = <PAD_GPIO28>;
227 sf,pinmux = <PAD_GPIO28_FUNC_SEL 0>;
228 sf,pin-ioconfig = <IO(GPIO_IE(1))>;
229 sf,pin-gpio-dout = <GPO_CAN1_CTRL_TXD>;
230 sf,pin-gpio-doen = <OEN_LOW>;
234 sf,pins = <PAD_GPIO27>;
235 sf,pinmux = <PAD_GPIO27_FUNC_SEL 0>;
236 sf,pin-ioconfig = <IO(GPIO_IE(1))>;
237 sf,pin-gpio-doen = <OEN_HIGH>;
238 sf,pin-gpio-din = <GPI_CAN1_CTRL_RXD>;
242 sf,pins = <PAD_GPIO45>;
243 sf,pinmux = <PAD_GPIO45_FUNC_SEL 0>;
244 sf,pin-ioconfig = <IO(GPIO_IE(1))>;
245 sf,pin-gpio-dout = <GPO_CAN1_CTRL_STBY>;
246 sf,pin-gpio-doen = <OEN_LOW>;
250 pwm_ch0_pins: pwm_ch0-pins {
252 sf,pins = <PAD_GPIO51>;
253 sf,pinmux = <PAD_GPIO51_FUNC_SEL 0>;
254 sf,pin-ioconfig = <IO(GPIO_IE(1))>;
255 sf,pin-gpio-dout = <GPO_PTC0_PWM_0>;
256 sf,pin-gpio-doen = <OEN_PTC0_PWM_0_OE_N>;
260 ssp0_pins: ssp0-pins {
262 sf,pins = <PAD_GPIO57>;
263 sf,pinmux = <PAD_GPIO57_FUNC_SEL 0>;
264 sf,pin-ioconfig = <IO(GPIO_IE(1))>;
265 sf,pin-gpio-dout = <GPO_SPI0_SSPTXD>;
266 sf,pin-gpio-doen = <OEN_LOW>;
270 sf,pins = <PAD_GPIO58>;
271 sf,pinmux = <PAD_GPIO58_FUNC_SEL 0>;
272 sf,pin-ioconfig = <IO(GPIO_IE(1))>;
273 sf,pin-gpio-doen = <OEN_HIGH>;
274 sf,pin-gpio-din = <GPI_SPI0_SSPRXD>;
278 sf,pins = <PAD_GPIO61>;
279 sf,pinmux = <PAD_GPIO61_FUNC_SEL 0>;
280 sf,pin-ioconfig = <IO(GPIO_IE(1))>;
281 sf,pin-gpio-dout = <GPO_SPI0_SSPCLKOUT>;
282 sf,pin-gpio-doen = <OEN_LOW>;
286 sf,pins = <PAD_GPIO14>;
287 sf,pinmux = <PAD_GPIO14_FUNC_SEL 0>;
288 sf,pin-ioconfig = <IO(GPIO_IE(1))>;
289 sf,pin-gpio-dout = <GPO_SPI0_SSPFSSOUT>;
290 sf,pin-gpio-doen = <OEN_LOW>;
294 sc2235_pins_default: sc2235-pins {
296 sf,pins = <PAD_GPIO11>;
297 sf,pinmux = <PAD_GPIO11_FUNC_SEL 0>;
298 sf,pin-ioconfig = <IO(GPIO_IE(1))>;
299 sf,pin-gpio-dout = <GPO_LOW>;
300 sf,pin-gpio-doen = <OEN_LOW>;
304 sf,pins = <PAD_GPIO12>;
305 sf,pinmux = <PAD_GPIO12_FUNC_SEL 0>;
306 sf,pin-ioconfig = <IO(GPIO_IE(1))>;
307 sf,pin-gpio-dout = <GPO_LOW>;
308 sf,pin-gpio-doen = <OEN_LOW>;
312 sf,pins = <PAD_GPIO10>;
313 sf,pinmux = <PAD_GPIO10_FUNC_SEL 0>;
314 sf,pin-ioconfig = <IO(GPIO_IE(1))>;
315 sf,pin-gpio-dout = <GPO_LOW>;
316 sf,pin-gpio-doen = <OEN_LOW>;
320 sf,pins = <PAD_GPIO16>;
321 sf,pinmux = <PAD_GPIO16_FUNC_SEL 0>;
322 sf,pin-ioconfig = <IO(GPIO_IE(1))>;
323 sf,pin-gpio-dout = <GPO_LOW>;
324 sf,pin-gpio-doen = <OEN_LOW>;
328 sf,pins = <PAD_GPIO15>;
329 sf,pinmux = <PAD_GPIO15_FUNC_SEL 0>;
330 sf,pin-ioconfig = <IO(GPIO_IE(1))>;
331 sf,pin-gpio-dout = <GPO_LOW>;
332 sf,pin-gpio-doen = <OEN_LOW>;
336 sf,pins = <PAD_GPIO17>;
337 sf,pinmux = <PAD_GPIO17_FUNC_SEL 0>;
338 sf,pin-ioconfig = <IO(GPIO_IE(1))>;
339 sf,pin-gpio-dout = <GPO_LOW>;
340 sf,pin-gpio-doen = <OEN_LOW>;
344 sf,pins = <PAD_GPIO18>;
345 sf,pinmux = <PAD_GPIO18_FUNC_SEL 0>;
346 sf,pin-ioconfig = <IO(GPIO_IE(1))>;
347 sf,pin-gpio-dout = <GPO_LOW>;
348 sf,pin-gpio-doen = <OEN_LOW>;
352 sc2235_reset_low: sc2235-pins {
354 sf,pins = <PAD_GPIO11>;
355 sf,pinmux = <PAD_GPIO11_FUNC_SEL 0>;
356 sf,pin-ioconfig = <IO(GPIO_IE(1))>;
357 sf,pin-gpio-dout = <GPO_LOW>;
358 sf,pin-gpio-doen = <OEN_LOW>;
362 sf,pins = <PAD_GPIO12>;
363 sf,pinmux = <PAD_GPIO12_FUNC_SEL 0>;
364 sf,pin-ioconfig = <IO(GPIO_IE(1))>;
365 sf,pin-gpio-dout = <GPO_LOW>;
366 sf,pin-gpio-doen = <OEN_LOW>;
370 sf,pins = <PAD_GPIO10>;
371 sf,pinmux = <PAD_GPIO10_FUNC_SEL 0>;
372 sf,pin-ioconfig = <IO(GPIO_IE(1))>;
373 sf,pin-gpio-dout = <GPO_LOW>;
374 sf,pin-gpio-doen = <OEN_LOW>;
378 sf,pins = <PAD_GPIO16>;
379 sf,pinmux = <PAD_GPIO16_FUNC_SEL 0>;
380 sf,pin-ioconfig = <IO(GPIO_IE(1))>;
381 sf,pin-gpio-dout = <GPO_LOW>;
382 sf,pin-gpio-doen = <OEN_LOW>;
386 sf,pins = <PAD_GPIO15>;
387 sf,pinmux = <PAD_GPIO15_FUNC_SEL 0>;
388 sf,pin-ioconfig = <IO(GPIO_IE(1))>;
389 sf,pin-gpio-dout = <GPO_LOW>;
390 sf,pin-gpio-doen = <OEN_LOW>;
394 sc2235_reset_high: sc2235-pins {
396 sf,pins = <PAD_GPIO11>;
397 sf,pinmux = <PAD_GPIO11_FUNC_SEL 0>;
398 sf,pin-ioconfig = <IO(GPIO_IE(1))>;
399 sf,pin-gpio-dout = <GPO_HIGH>;
400 sf,pin-gpio-doen = <OEN_LOW>;
404 sf,pins = <PAD_GPIO12>;
405 sf,pinmux = <PAD_GPIO12_FUNC_SEL 0>;
406 sf,pin-ioconfig = <IO(GPIO_IE(1))>;
407 sf,pin-gpio-dout = <GPO_HIGH>;
408 sf,pin-gpio-doen = <OEN_LOW>;
412 sf,pins = <PAD_GPIO10>;
413 sf,pinmux = <PAD_GPIO10_FUNC_SEL 0>;
414 sf,pin-ioconfig = <IO(GPIO_IE(1))>;
415 sf,pin-gpio-dout = <GPO_HIGH>;
416 sf,pin-gpio-doen = <OEN_LOW>;
420 sf,pins = <PAD_GPIO16>;
421 sf,pinmux = <PAD_GPIO16_FUNC_SEL 0>;
422 sf,pin-ioconfig = <IO(GPIO_IE(1))>;
423 sf,pin-gpio-dout = <GPO_HIGH>;
424 sf,pin-gpio-doen = <OEN_LOW>;
428 sf,pins = <PAD_GPIO15>;
429 sf,pinmux = <PAD_GPIO15_FUNC_SEL 0>;
430 sf,pin-ioconfig = <IO(GPIO_IE(1))>;
431 sf,pin-gpio-dout = <GPO_HIGH>;
432 sf,pin-gpio-doen = <OEN_LOW>;
438 sf,pins = <PAD_GPIO21>;
439 sf,pinmux = <PAD_GPIO21_FUNC_SEL 2>;
440 sf,pin-ioconfig = <IO(GPIO_IE(1))>;
441 sf,padmux = <U0_SYS_CRG_DVP_CLK_FUNC_SEL 1>;
445 sf,pins = <PAD_GPIO22>;
446 sf,pinmux = <PAD_GPIO22_FUNC_SEL 2>;
447 sf,pin-ioconfig = <IO(GPIO_IE(1))>;
448 sf,padmux = <U0_DOM_ISP_TOP_U0_VIN_DVP_VVALID_C_FUNC_SEL 1>;
452 sf,pins = <PAD_GPIO23>;
453 sf,pinmux = <PAD_GPIO23_FUNC_SEL 2>;
454 sf,pin-ioconfig = <IO(GPIO_IE(1))>;
455 sf,padmux = <U0_DOM_ISP_TOP_U0_VIN_DVP_HVALID_C_FUNC_SEL 1>;
459 sf,pins = <PAD_GPIO24>;
460 sf,pinmux = <PAD_GPIO24_FUNC_SEL 2>;
461 sf,pin-ioconfig = <IO(GPIO_IE(1))>;
462 sf,padmux = <U0_DOM_ISP_TOP_U0_VIN_DVP_DATA_C0_FUNC_SEL 1>;
466 sf,pins = <PAD_GPIO25>;
467 sf,pinmux = <PAD_GPIO25_FUNC_SEL 2>;
468 sf,pin-ioconfig = <IO(GPIO_IE(1))>;
469 sf,padmux = <U0_DOM_ISP_TOP_U0_VIN_DVP_DATA_C1_FUNC_SEL 1>;
473 sf,pins = <PAD_GPIO26>;
474 sf,pinmux = <PAD_GPIO26_FUNC_SEL 2>;
475 sf,pin-ioconfig = <IO(GPIO_IE(1))>;
476 sf,padmux = <U0_DOM_ISP_TOP_U0_VIN_DVP_DATA_C2_FUNC_SEL 1>;
480 sf,pins = <PAD_GPIO27>;
481 sf,pinmux = <PAD_GPIO27_FUNC_SEL 2>;
482 sf,pin-ioconfig = <IO(GPIO_IE(1))>;
483 sf,padmux = <U0_DOM_ISP_TOP_U0_VIN_DVP_DATA_C3_FUNC_SEL 1>;
487 sf,pins = <PAD_GPIO28>;
488 sf,pinmux = <PAD_GPIO28_FUNC_SEL 2>;
489 sf,pin-ioconfig = <IO(GPIO_IE(1))>;
490 sf,padmux = <U0_DOM_ISP_TOP_U0_VIN_DVP_DATA_C4_FUNC_SEL 1>;
494 sf,pins = <PAD_GPIO29>;
495 sf,pinmux = <PAD_GPIO29_FUNC_SEL 2>;
496 sf,pin-ioconfig = <IO(GPIO_IE(1))>;
497 sf,padmux = <U0_DOM_ISP_TOP_U0_VIN_DVP_DATA_C5_FUNC_SEL 1>;
501 sf,pins = <PAD_GPIO30>;
502 sf,pinmux = <PAD_GPIO30_FUNC_SEL 2>;
503 sf,pin-ioconfig = <IO(GPIO_IE(1))>;
504 sf,padmux = <U0_DOM_ISP_TOP_U0_VIN_DVP_DATA_C6_FUNC_SEL 1>;
508 sf,pins = <PAD_GPIO31>;
509 sf,pinmux = <PAD_GPIO31_FUNC_SEL 2>;
510 sf,pin-ioconfig = <IO(GPIO_IE(1))>;
511 sf,padmux = <U0_DOM_ISP_TOP_U0_VIN_DVP_DATA_C7_FUNC_SEL 1>;
515 sf,pins = <PAD_GPIO32>;
516 sf,pinmux = <PAD_GPIO32_FUNC_SEL 2>;
517 sf,pin-ioconfig = <IO(GPIO_IE(1))>;
518 sf,padmux = <U0_DOM_ISP_TOP_U0_VIN_DVP_DATA_C8_FUNC_SEL 1>;
522 sf,pins = <PAD_GPIO33>;
523 sf,pinmux = <PAD_GPIO33_FUNC_SEL 2>;
524 sf,pin-ioconfig = <IO(GPIO_IE(1))>;
525 sf,padmux = <U0_DOM_ISP_TOP_U0_VIN_DVP_DATA_C9_FUNC_SEL 1>;
529 sf,pins = <PAD_GPIO34>;
530 sf,pinmux = <PAD_GPIO34_FUNC_SEL 2>;
531 sf,pin-ioconfig = <IO(GPIO_IE(1))>;
532 sf,padmux = <U0_DOM_ISP_TOP_U0_VIN_DVP_DATA_C10_FUNC_SEL 1>;
536 sf,pins = <PAD_GPIO35>;
537 sf,pinmux = <PAD_GPIO35_FUNC_SEL 2>;
538 sf,pin-ioconfig = <IO(GPIO_IE(1) | GPIO_PD(1))>;
539 sf,padmux = <U0_DOM_ISP_TOP_U0_VIN_DVP_DATA_C11_FUNC_SEL 1>;
543 rgb_pad_pins: rgb-pad-pins {
545 sf,pins = <PAD_GPIO36>;
546 sf,pinmux = <PAD_GPIO36_FUNC_SEL 1>;
547 sf,pin-ioconfig = <IO(GPIO_IE(0))>;
550 sf,pins = <PAD_GPIO37>;
551 sf,pinmux = <PAD_GPIO37_FUNC_SEL 1>;
552 sf,pin-ioconfig = <IO(GPIO_IE(0))>;
555 sf,pins = <PAD_GPIO38>;
556 sf,pinmux = <PAD_GPIO38_FUNC_SEL 1>;
557 sf,pin-ioconfig = <IO(GPIO_IE(0))>;
560 sf,pins = <PAD_GPIO39>;
561 sf,pinmux = <PAD_GPIO39_FUNC_SEL 1>;
562 sf,pin-ioconfig = <IO(GPIO_IE(0))>;
565 sf,pins = <PAD_GPIO40>;
566 sf,pinmux = <PAD_GPIO40_FUNC_SEL 1>;
567 sf,pin-ioconfig = <IO(GPIO_IE(0))>;
570 sf,pins = <PAD_GPIO41>;
571 sf,pinmux = <PAD_GPIO41_FUNC_SEL 1>;
572 sf,pin-ioconfig = <IO(GPIO_IE(0))>;
575 sf,pins = <PAD_GPIO42>;
576 sf,pinmux = <PAD_GPIO42_FUNC_SEL 1>;
577 sf,pin-ioconfig = <IO(GPIO_IE(0))>;
580 sf,pins = <PAD_GPIO43>;
581 sf,pinmux = <PAD_GPIO43_FUNC_SEL 1>;
582 sf,pin-ioconfig = <IO(GPIO_IE(0))>;
585 sf,pins = <PAD_GPIO44>;
586 sf,pinmux = <PAD_GPIO44_FUNC_SEL 1>;
587 sf,pin-ioconfig = <IO(GPIO_IE(0))>;
590 sf,pins = <PAD_GPIO45>;
591 sf,pinmux = <PAD_GPIO45_FUNC_SEL 1>;
592 sf,pin-ioconfig = <IO(GPIO_IE(0))>;
595 sf,pins = <PAD_GPIO46>;
596 sf,pinmux = <PAD_GPIO46_FUNC_SEL 1>;
597 sf,pin-ioconfig = <IO(GPIO_IE(0))>;
600 sf,pins = <PAD_GPIO47>;
601 sf,pinmux = <PAD_GPIO47_FUNC_SEL 1>;
602 sf,pin-ioconfig = <IO(GPIO_IE(0))>;
605 sf,pins = <PAD_GPIO48>;
606 sf,pinmux = <PAD_GPIO48_FUNC_SEL 1>;
607 sf,pin-ioconfig = <IO(GPIO_IE(0))>;
610 sf,pins = <PAD_GPIO49>;
611 sf,pinmux = <PAD_GPIO49_FUNC_SEL 1>;
612 sf,pin-ioconfig = <IO(GPIO_IE(0))>;
615 sf,pins = <PAD_GPIO50>;
616 sf,pinmux = <PAD_GPIO50_FUNC_SEL 1>;
617 sf,pin-ioconfig = <IO(GPIO_IE(0))>;
620 // sf,pins = <PAD_GPIO51>;
621 // sf,pinmux = <PAD_GPIO51_FUNC_SEL 1>;
622 // sf,pin-ioconfig = <IO(GPIO_IE(0))>;
623 // PAD_GPIO51_FUNC_SEL
626 // sf,pins = <PAD_GPIO52>;
627 // sf,pinmux = <PAD_GPIO52_FUNC_SEL 1>;
628 // sf,pin-ioconfig = <IO(GPIO_IE(0))>;
631 sf,pins = <PAD_GPIO53>;
632 sf,pinmux = <PAD_GPIO53_FUNC_SEL 1>;
633 sf,pin-ioconfig = <IO(GPIO_IE(0))>;
636 sf,pins = <PAD_GPIO54>;
637 sf,pinmux = <PAD_GPIO54_FUNC_SEL 1>;
638 sf,pin-ioconfig = <IO(GPIO_IE(0))>;
641 sf,pins = <PAD_GPIO55>;
642 sf,pinmux = <PAD_GPIO38_FUNC_SEL 1>;
643 sf,pin-ioconfig = <IO(GPIO_IE(0))>;
646 sf,pins = <PAD_GPIO55>;
647 sf,pinmux = <PAD_GPIO56_FUNC_SEL 1>;
648 sf,pin-ioconfig = <IO(GPIO_IE(0))>;
651 // sf,pins = <PAD_GPIO57>;
652 // sf,pinmux = <PAD_GPIO57_FUNC_SEL 1>;
653 // sf,pin-ioconfig = <IO(GPIO_IE(0))>;
656 // sf,pins = <PAD_GPIO58>;
657 // sf,pinmux = <PAD_GPIO58_FUNC_SEL 1>;
658 // sf,pin-ioconfig = <IO(GPIO_IE(0))>;
661 sf,pins = <PAD_GPIO59>;
662 sf,pinmux = <PAD_GPIO59_FUNC_SEL 1>;
663 sf,pin-ioconfig = <IO(GPIO_IE(0))>;
666 sf,pins = <PAD_GPIO60>;
667 sf,pinmux = <PAD_GPIO60_FUNC_SEL 1>;
668 sf,pin-ioconfig = <IO(GPIO_IE(0))>;
671 // sf,pins = <PAD_GPIO61>;
672 // sf,pinmux = <PAD_GPIO61_FUNC_SEL 1>;
673 // sf,pin-ioconfig = <IO(GPIO_IE(0))>;
676 // sf,pins = <PAD_GPIO62>;
677 // sf,pinmux = <PAD_GPIO62_FUNC_SEL 1>;
678 // sf,pin-ioconfig = <IO(GPIO_IE(0))>;
681 // sf,pins = <PAD_GPIO63>;
682 // sf,pinmux = <PAD_GPIO63_FUNC_SEL 1>;
683 // sf,pin-ioconfig = <IO(GPIO_IE(0))>;
689 pwm_ch4_pins: pwm_ch4-pins {
691 sf,pins = <PAD_RGPIO2>;
692 sf,pin-ioconfig = <IO(GPIO_IE(1))>;
693 sf,pin-gpio-dout = <U0_PWM_8CH_PTC_PWM_4>;
694 sf,pin-gpio-doen = <U0_PWM_8CH_PTC_OE_N_4>;
700 pinctrl-names = "default";
701 pinctrl-0 = <&gmac0_pins>;
706 pinctrl-names = "default";
707 pinctrl-0 = <&gmac1_pins>;
711 pinctrl-names = "default";
712 pinctrl-0 = <&i2c6_pins>;
717 pinctrl-names = "default";
718 pinctrl-0 = <&i2c0_pins>;
723 pinctrl-names = "default";
724 pinctrl-0 = <&i2s_clk_pins &i2stx_pins>;
729 pinctrl-names = "default";
730 pinctrl-0 = <&i2srx_pins>;
735 pinctrl-names = "default";
736 pinctrl-0 = <&can0_pins>;
741 pinctrl-names = "default";
742 pinctrl-0 = <&pwmdac0_pins>;
747 pinctrl-names = "default";
748 pinctrl-0 = <&pwm_ch0_pins>;
753 pinctrl-names = "default";
754 pinctrl-0 = <&mmc0_pins>;
759 pinctrl-names = "default";
760 pinctrl-0 = <&mmc1_pins>;
765 pinctrl-names = "default";
766 pinctrl-0 = <&dvp_pins>;