arch/riscv/boot/dts/starfive/jh7110-visionfive-v2.dtsi

   1 // SPDX-License-Identifier: GPL-2.0 OR MIT
   2 /*
   3  * Copyright (C) 2022 StarFive Technology Co., Ltd.
   4  * Copyright (C) 2022 Hal Feng <hal.feng@starfivetech.com>
   5  */
   6
   7 /dts-v1/;
   8 #include <dt-bindings/gpio/gpio.h>
   9 #include <dt-bindings/leds/common.h>
  10 #include <dt-bindings/pinctrl/starfive,jh7110-pinfunc.h>
  11 #include "jh7110.dtsi"
  12 #include "codecs/sf_pwmdac.dtsi"
  13
  14 / {
  15         model = "StarFive VisionFive V2";
  16         compatible = "starfive,visionfive-v2", "starfive,jh7110";
  17
  18         aliases {
  19                 spi0 = &qspi;
  20                 gpio0 = &gpio;
  21                 ethernet0 = &gmac0;
  22                 ethernet1 = &gmac1;
  23                 mmc0 = &sdio0;
  24                 mmc1 = &sdio1;
  25                 serial0 = &uart0;
  26                 serial3 = &uart3;
  27                 i2c0 = &i2c0;
  28                 i2c1 = &i2c1;
  29                 i2c2 = &i2c2;
  30                 i2c3 = &i2c3;
  31                 i2c4 = &i2c4;
  32                 i2c5 = &i2c5;
  33                 i2c6 = &i2c6;
  34         };
  35
  36         chosen {
  37                 linux,initrd-start = <0x0 0x46100000>;
  38                 linux,initrd-end = <0x0 0x4c000000>;
  39                 stdout-path = "serial0:115200";
  40                 #bootargs = "debug console=ttyS0 rootwait";
  41         };
  42
  43         cpus {
  44                 timebase-frequency = <4000000>;
  45         };
  46
  47         memory@40000000 {
  48                 device_type = "memory";
  49                 reg = <0x0 0x40000000 0x1 0x0>;
  50         };
  51
  52         reserved-memory {
  53                 #address-cells = <2>;
  54                 #size-cells = <2>;
  55                 ranges;
  56
  57                 linux,cma {
  58                         compatible = "shared-dma-pool";
  59                         reusable;
  60                         size = <0x0 0x20000000>;
  61                         alignment = <0x0 0x1000>;
  62                         alloc-ranges = <0x0 0x80000000 0x0 0x20000000>;
  63                         linux,cma-default;
  64                 };
  65
  66                 e24_mem: e24@c0000000 {
  67                         no-map;
  68                         reg = <0x0 0xc0110000 0x0 0xf0000>;
  69                 };
  70
  71                 xrp_reserved: xrpbuffer@f0000000 {
  72                         reg = <0x0 0xf0000000 0x0 0x01ffffff
  73                                 0x0 0xf2000000 0x0 0x00001000
  74                                 0x0 0xf2001000 0x0 0x00fff000
  75                                 0x0 0xf3000000 0x0 0x00001000>;
  76                 };
  77
  78         };
  79
  80         leds {
  81                 compatible = "gpio-leds";
  82
  83                 led-ack {
  84                         gpios = <&gpioa 3 GPIO_ACTIVE_HIGH>;
  85                         color = <LED_COLOR_ID_GREEN>;
  86                         function = LED_FUNCTION_HEARTBEAT;
  87                         linux,default-trigger = "heartbeat";
  88                         label = "ack";
  89                 };
  90         };
  91 };
  92
  93 &gpio {
  94         i2c0_pins: i2c0-pins {
  95                 i2c0-pins-scl {
  96                         starfive,pins = <PAD_GPIO57>;
  97                         starfive,pinmux = <PAD_GPIO57_FUNC_SEL 0>;
  98                         starfive,pin-ioconfig = <IO(GPIO_IE(1) | (GPIO_PU(1)))>;
  99                         starfive,pin-gpio-dout = <GPO_LOW>;
 100                         starfive,pin-gpio-doen = <OEN_I2C0_IC_CLK_OE>;
 101                         starfive,pin-gpio-din =  <GPI_I2C0_IC_CLK_IN_A>;
 102                 };
 103
 104                 i2c0-pins-sda {
 105                         starfive,pins = <PAD_GPIO58>;
 106                         starfive,pinmux = <PAD_GPIO58_FUNC_SEL 0>;
 107                         starfive,pin-ioconfig = <IO(GPIO_IE(1) | (GPIO_PU(1)))>;
 108                         starfive,pin-gpio-dout = <GPO_LOW>;
 109                         starfive,pin-gpio-doen = <OEN_I2C0_IC_DATA_OE>;
 110                         starfive,pin-gpio-din =  <GPI_I2C0_IC_DATA_IN_A>;
 111                 };
 112         };
 113
 114         i2c5_pins: i2c5-pins {
 115                 i2c5-pins-scl {
 116                         starfive,pins = <PAD_GPIO19>;
 117                         starfive,pinmux = <PAD_GPIO19_FUNC_SEL 0>;
 118                         starfive,pin-ioconfig = <IO(GPIO_IE(1) | (GPIO_PU(1)))>;
 119                         starfive,pin-gpio-dout = <GPO_LOW>;
 120                         starfive,pin-gpio-doen = <OEN_I2C5_IC_CLK_OE>;
 121                         starfive,pin-gpio-din =  <GPI_I2C5_IC_CLK_IN_A>;
 122                 };
 123
 124                 i2c5-pins-sda {
 125                         starfive,pins = <PAD_GPIO20>;
 126                         starfive,pinmux = <PAD_GPIO20_FUNC_SEL 0>;
 127                         starfive,pin-ioconfig = <IO(GPIO_IE(1) | (GPIO_PU(1)))>;
 128                         starfive,pin-gpio-dout = <GPO_LOW>;
 129                         starfive,pin-gpio-doen = <OEN_I2C5_IC_DATA_OE>;
 130                         starfive,pin-gpio-din =  <GPI_I2C5_IC_DATA_IN_A>;
 131                 };
 132         };
 133
 134         i2c6_pins: i2c6-pins {
 135                 i2c6-pins-scl {
 136                         starfive,pins = <PAD_GPIO16>;
 137                         starfive,pinmux = <PAD_GPIO16_FUNC_SEL 0>;
 138                         starfive,pin-ioconfig = <IO(GPIO_IE(1) | (GPIO_PU(1)))>;
 139                         starfive,pin-gpio-dout = <GPO_LOW>;
 140                         starfive,pin-gpio-doen = <OEN_I2C6_IC_CLK_OE>;
 141                         starfive,pin-gpio-din =  <GPI_I2C6_IC_CLK_IN_A>;
 142                 };
 143
 144                 i2c6-pins-sda {
 145                         starfive,pins = <PAD_GPIO17>;
 146                         starfive,pinmux = <PAD_GPIO17_FUNC_SEL 0>;
 147                         starfive,pin-ioconfig = <IO(GPIO_IE(1) | (GPIO_PU(1)))>;
 148                         starfive,pin-gpio-dout = <GPO_LOW>;
 149                         starfive,pin-gpio-doen = <OEN_I2C6_IC_DATA_OE>;
 150                         starfive,pin-gpio-din =  <GPI_I2C6_IC_DATA_IN_A>;
 151                 };
 152         };
 153
 154         csi_pins: csi-pins {
 155                 csi-pins-pwdn {
 156                         starfive,pins = <PAD_GPIO18>;
 157                         starfive,pinmux = <PAD_GPIO18_FUNC_SEL 0>;
 158                         starfive,pin-ioconfig = <IO(GPIO_IE(1))>;
 159                         starfive,pin-gpio-dout = <GPO_HIGH>;
 160                         starfive,pin-gpio-doen = <OEN_LOW>;
 161                 };
 162         };
 163
 164         pwmdac0_pins: pwmdac0-pins {
 165                 pwmdac0-pins-left {
 166                         starfive,pins = <PAD_GPIO33>;
 167                         starfive,pinmux = <PAD_GPIO33_FUNC_SEL 0>;
 168                         starfive,pin-ioconfig = <IO(GPIO_IE(1) | (GPIO_PU(1)))>;
 169                         starfive,pin-gpio-dout = <GPO_PWMDAC0_LEFT_OUTPUT>;
 170                         starfive,pin-gpio-doen = <OEN_LOW>;
 171                 };
 172
 173                 pwmdac0-pins-right {
 174                         starfive,pins = <PAD_GPIO34>;
 175                         starfive,pinmux = <PAD_GPIO34_FUNC_SEL 0>;
 176                         starfive,pin-ioconfig = <IO(GPIO_IE(1) | (GPIO_PU(1)))>;
 177                         starfive,pin-gpio-dout = <GPO_PWMDAC0_RIGHT_OUTPUT>;
 178                         starfive,pin-gpio-doen = <OEN_LOW>;
 179                 };
 180         };
 181
 182         pwm_pins: pwm-pins {
 183                 pwm_ch0-pins {
 184                         starfive,pins = <PAD_GPIO46>;
 185                         starfive,pinmux = <PAD_GPIO46_FUNC_SEL 0>;
 186                         starfive,pin-ioconfig = <IO(GPIO_IE(1))>;
 187                         starfive,pin-gpio-dout = <GPO_PTC0_PWM_0>;
 188                         starfive,pin-gpio-doen = <OEN_PTC0_PWM_0_OE_N>;
 189                 };
 190
 191                 pwm_ch1-pins {
 192                         starfive,pins = <PAD_GPIO59>;
 193                         starfive,pinmux = <PAD_GPIO59_FUNC_SEL 0>;
 194                         starfive,pin-ioconfig = <IO(GPIO_IE(1))>;
 195                         starfive,pin-gpio-dout = <GPO_PTC0_PWM_1>;
 196                         starfive,pin-gpio-doen = <OEN_PTC0_PWM_1_OE_N>;
 197                 };
 198         };
 199
 200         ssp0_pins: ssp0-pins {
 201                 ssp0-pins_tx {
 202                         starfive,pins = <PAD_GPIO52>;
 203                         starfive,pinmux = <PAD_GPIO52_FUNC_SEL 0>;
 204                         starfive,pin-ioconfig = <IO(GPIO_IE(1))>;
 205                         starfive,pin-gpio-dout = <GPO_SPI0_SSPTXD>;
 206                         starfive,pin-gpio-doen = <OEN_LOW>;
 207                 };
 208
 209                 ssp0-pins_rx {
 210                         starfive,pins = <PAD_GPIO53>;
 211                         starfive,pinmux = <PAD_GPIO53_FUNC_SEL 0>;
 212                         starfive,pin-ioconfig = <IO(GPIO_IE(1))>;
 213                         starfive,pin-gpio-doen = <OEN_HIGH>;
 214                         starfive,pin-gpio-din =  <GPI_SPI0_SSPRXD>;
 215                 };
 216
 217                 ssp0-pins_clk {
 218                         starfive,pins = <PAD_GPIO48>;
 219                         starfive,pinmux = <PAD_GPIO48_FUNC_SEL 0>;
 220                         starfive,pin-ioconfig = <IO(GPIO_IE(1))>;
 221                         starfive,pin-gpio-dout = <GPO_SPI0_SSPCLKOUT>;
 222                         starfive,pin-gpio-doen = <OEN_LOW>;
 223                 };
 224
 225                 ssp0-pins_cs {
 226                         starfive,pins = <PAD_GPIO49>;
 227                         starfive,pinmux = <PAD_GPIO49_FUNC_SEL 0>;
 228                         starfive,pin-ioconfig = <IO(GPIO_IE(1))>;
 229                         starfive,pin-gpio-dout = <GPO_SPI0_SSPFSSOUT>;
 230                         starfive,pin-gpio-doen = <OEN_LOW>;
 231                 };
 232         };
 233
 234         pcie0_perst_default: pcie0_perst_default {
 235                 perst-pins {
 236                         starfive,pins = <PAD_GPIO26>;
 237                         starfive,pinmux = <PAD_GPIO26_FUNC_SEL 0>;
 238                         starfive,pin-ioconfig = <IO(GPIO_IE(1))>;
 239                         starfive,pin-gpio-dout = <GPO_HIGH>;
 240                         starfive,pin-gpio-doen = <OEN_LOW>;
 241                 };
 242         };
 243
 244         pcie0_perst_active: pcie0_perst_active {
 245                 perst-pins {
 246                         starfive,pins = <PAD_GPIO26>;
 247                         starfive,pinmux = <PAD_GPIO26_FUNC_SEL 0>;
 248                         starfive,pin-ioconfig = <IO(GPIO_IE(1))>;
 249                         starfive,pin-gpio-dout = <GPO_LOW>;
 250                         starfive,pin-gpio-doen = <OEN_LOW>;
 251                 };
 252         };
 253
 254         pcie0_wake_default: pcie0_wake_default {
 255                 wake-pins {
 256                         starfive,pins = <PAD_GPIO32>;
 257                         starfive,pinmux = <PAD_GPIO32_FUNC_SEL 0>;
 258                         starfive,pin-ioconfig = <IO(GPIO_IE(1))>;
 259                         starfive,pin-gpio-doen = <OEN_HIGH>;
 260                 };
 261         };
 262
 263         pcie0_clkreq_default: pcie0_clkreq_default {
 264                 clkreq-pins {
 265                         starfive,pins = <PAD_GPIO27>;
 266                         starfive,pinmux = <PAD_GPIO27_FUNC_SEL 0>;
 267                         starfive,pin-ioconfig = <IO(GPIO_IE(1))>;
 268                         starfive,pin-gpio-doen = <OEN_HIGH>;
 269                 };
 270         };
 271
 272         pcie1_perst_default: pcie1_perst_default {
 273                 perst-pins {
 274                         starfive,pins = <PAD_GPIO28>;
 275                         starfive,pinmux = <PAD_GPIO28_FUNC_SEL 0>;
 276                         starfive,pin-ioconfig = <IO(GPIO_IE(1))>;
 277                         starfive,pin-gpio-dout = <GPO_HIGH>;
 278                         starfive,pin-gpio-doen = <OEN_LOW>;
 279                 };
 280         };
 281
 282         pcie1_perst_active: pcie1_perst_active {
 283                 perst-pins {
 284                         starfive,pins = <PAD_GPIO28>;
 285                         starfive,pinmux = <PAD_GPIO28_FUNC_SEL 0>;
 286                         starfive,pin-ioconfig = <IO(GPIO_IE(1))>;
 287                         starfive,pin-gpio-dout = <GPO_LOW>;
 288                         starfive,pin-gpio-doen = <OEN_LOW>;
 289                 };
 290         };
 291
 292         pcie1_wake_default: pcie1_wake_default {
 293                 wake-pins {
 294                         starfive,pins = <PAD_GPIO21>;
 295                         starfive,pinmux = <PAD_GPIO21_FUNC_SEL 0>;
 296                         starfive,pin-ioconfig = <IO(GPIO_IE(1))>;
 297                         starfive,pin-gpio-doen = <OEN_HIGH>;
 298                 };
 299         };
 300
 301         pcie1_clkreq_default: pcie1_clkreq_default {
 302                 clkreq-pins {
 303                         starfive,pins = <PAD_GPIO29>;
 304                         starfive,pinmux = <PAD_GPIO29_FUNC_SEL 0>;
 305                         starfive,pin-ioconfig = <IO(GPIO_IE(1))>;
 306                         starfive,pin-gpio-doen = <OEN_HIGH>;
 307                 };
 308         };
 309
 310         usb_pins: usb-pins {
 311                 drive-vbus-pin {
 312                         starfive,pins = <PAD_GPIO25>;
 313                         starfive,pinmux = <PAD_GPIO25_FUNC_SEL 0>;
 314                         starfive,pin-ioconfig = <IO(GPIO_IE(1))>;
 315                         starfive,pin-gpio-dout = <GPO_USB0_DRIVE_VBUS_IO>;
 316                         starfive,pin-gpio-doen = <OEN_LOW>;
 317                 };
 318         };
 319
 320         i2srx_pins: i2srx-pins {
 321                 i2srx-pins0 {
 322                         starfive,pins = <PAD_GPIO61>;
 323                         starfive,pinmux = <PAD_GPIO61_FUNC_SEL 0>;
 324                         starfive,pin-ioconfig = <IO(GPIO_IE(1))>;
 325                         starfive,pin-gpio-doen = <OEN_HIGH>;
 326                         starfive,pin-gpio-din =  <GPI_I2SRX0_EXT_SDIN0>;
 327                 };
 328         };
 329
 330         i2s_clk_pins: i2s-clk0 {
 331                 i2s-clk0_bclk {
 332                         starfive,pins = <PAD_GPIO38>;
 333                         starfive,pinmux = <PAD_GPIO38_FUNC_SEL 0>;
 334                         starfive,pin-ioconfig = <IO(GPIO_IE(1))>;
 335                         starfive,pin-gpio-din = <GPI_I2STX0_BCLK_SLV GPI_I2SRX0_BCLK_SLV>;
 336                         starfive,pin-gpio-doen = <OEN_HIGH>;
 337                 };
 338
 339                 i2s-clk0_lrclk {
 340                         starfive,pins = <PAD_GPIO63>;
 341                         starfive,pinmux = <PAD_GPIO63_FUNC_SEL 0>;
 342                         starfive,pin-ioconfig = <IO(GPIO_IE(1))>;
 343                         starfive,pin-gpio-din = <GPI_I2STX0_LRCK_SLV GPI_I2SRX0_LRCK_SLV>;
 344                         starfive,pin-gpio-doen = <OEN_HIGH>;
 345                 };
 346         };
 347
 348         i2stx_pins: i2stx-pins {
 349                 i2stx-pins0 {
 350                         starfive,pins = <PAD_GPIO44>;
 351                         starfive,pinmux = <PAD_GPIO44_FUNC_SEL 0>;
 352                         starfive,pin-ioconfig = <IO(GPIO_IE(1))>;
 353                         starfive,pin-gpio-dout = <GPO_I2STX_4CH1_SDO0>;
 354                         starfive,pin-gpio-doen = <OEN_LOW>;
 355                 };
 356         };
 357 };
 358
 359 &uart0 {
 360         status = "okay";
 361 };
 362
 363 &dma {
 364         status = "okay";
 365 };
 366
 367 &trng {
 368         status = "okay";
 369 };
 370
 371 &crypto {
 372         status = "okay";
 373 };
 374
 375 &sec_dma {
 376         status = "okay";
 377 };
 378
 379 &i2c0 {
 380         clock-frequency = <100000>;
 381         i2c-sda-hold-time-ns = <300>;
 382         i2c-sda-falling-time-ns = <510>;
 383         i2c-scl-falling-time-ns = <510>;
 384         auto_calc_scl_lhcnt;
 385         pinctrl-names = "default";
 386         pinctrl-0 = <&i2c0_pins>;
 387         status = "okay";
 388 };
 389
 390 &i2c2 {
 391         clock-frequency = <100000>;
 392         i2c-sda-hold-time-ns = <300>;
 393         i2c-sda-falling-time-ns = <510>;
 394         i2c-scl-falling-time-ns = <510>;
 395         auto_calc_scl_lhcnt;
 396         status = "okay";
 397
 398         seeed_plane_i2c@45 {
 399                 compatible = "seeed_panel";
 400                 reg = <0x45>;
 401
 402                 port {
 403                         panel_out0: endpoint {
 404                                 remote-endpoint = <&dsi0_output>;
 405                         };
 406                 };
 407         };
 408
 409         tinker_ft5406: tinker_ft5406@38 {
 410                 compatible = "tinker_ft5406";
 411                 reg = <0x38>;
 412         };
 413
 414         panel_radxa@19 {
 415                 compatible ="starfive_jadard";
 416                 reg = <0x19>;
 417                 reset-gpio = <&gpio 23 0>;
 418                 enable-gpio = <&gpio 22 0>;
 419
 420                 port {
 421                         panel_out1: endpoint {
 422                                 remote-endpoint = <&dsi1_output>;
 423                                 };
 424                 };
 425         };
 426
 427         gt9xx: gt9xx@14 {
 428                 compatible = "goodix,gt9xx";
 429                 reg = <0x14>;
 430                 touch-gpio = <&gpio 30 IRQ_TYPE_LEVEL_LOW>;
 431                 reset-gpio = <&gpio 31 GPIO_ACTIVE_HIGH>;
 432                 max-x = <800>;
 433                 max-y = <1280>;
 434                 tp-size = <9112>;
 435         };
 436 };
 437
 438 &i2c5 {
 439         clock-frequency = <100000>;
 440         i2c-sda-hold-time-ns = <300>;
 441         i2c-sda-falling-time-ns = <510>;
 442         i2c-scl-falling-time-ns = <510>;
 443         auto_calc_scl_lhcnt;
 444         pinctrl-names = "default";
 445         pinctrl-0 = <&i2c5_pins>;
 446         status = "okay";
 447
 448         eeprom@50 {
 449                 compatible = "atmel,24c04";
 450                 reg = <0x50>;
 451                 pagesize = <16>;
 452         };
 453
 454         pmic: axp15060_reg@36 {
 455                 compatible = "stf,axp15060-regulator";
 456                 reg = <0x36>;
 457
 458                 regulators {
 459                         mipi_0p9: ALDO1 {
 460                                 regulator-boot-on;
 461                                 regulator-compatible = "mipi_0p9";
 462                                 regulator-name = "mipi_0p9";
 463                                 regulator-min-microvolt = <900000>;
 464                                 regulator-max-microvolt = <900000>;
 465                         };
 466                         hdmi_0p9: ALDO5 {
 467                                 regulator-boot-on;
 468                                 regulator-compatible = "hdmi_0p9";
 469                                 regulator-name = "hdmi_0p9";
 470                                 regulator-min-microvolt = <900000>;
 471                                 regulator-max-microvolt = <900000>;
 472                         };
 473                         hdmi_1p8: ALDO3 {
 474                                 regulator-boot-on;
 475                                 regulator-compatible = "hdmi_1p8";
 476                                 regulator-name = "hdmi_1p8";
 477                                 regulator-min-microvolt = <1800000>;
 478                                 regulator-max-microvolt = <1800000>;
 479                         };
 480                         cpu_vdd: DCDC2 {
 481                                 regulator-boot-on;
 482                                 regulator-always-on;
 483                                 regulator-compatible = "cpu_vdd";
 484                                 regulator-name = "cpu_vdd";
 485                                 regulator-min-microvolt = <500000>;
 486                                 regulator-max-microvolt = <1540000>;
 487                         };
 488                 };
 489         };
 490 };
 491
 492 &i2c6 {
 493         clock-frequency = <100000>;
 494         i2c-sda-hold-time-ns = <300>;
 495         i2c-sda-falling-time-ns = <510>;
 496         i2c-scl-falling-time-ns = <510>;
 497         auto_calc_scl_lhcnt;
 498         pinctrl-names = "default";
 499         pinctrl-0 = <&i2c6_pins>;
 500         status = "okay";
 501
 502         imx219: imx219@10 {
 503                 compatible = "sony,imx219";
 504                 reg = <0x10>;
 505                 clocks = <&clk_ext_camera>;
 506                 clock-names = "xclk";
 507                 //reset-gpio = <&gpio 18 0>;
 508                 //DOVDD-supply = <&v2v8>;
 509                 pinctrl-names = "default";
 510                 pinctrl-0 = <&csi_pins>;
 511                 rotation = <0>;
 512                 orientation = <1>; //CAMERA_ORIENTATION_BACK
 513
 514                 port {
 515                         /* CSI2 bus endpoint */
 516                         imx219_to_csi2rx0: endpoint {
 517                                 remote-endpoint = <&csi2rx0_from_imx219>;
 518                                 bus-type = <4>;      /* MIPI CSI-2 D-PHY */
 519                                 clock-lanes = <4>;
 520                                 data-lanes = <0 1>;
 521                                 lane-polarities = <0 0 0>;
 522                                 link-frequencies = /bits/ 64 <456000000>;
 523                         };
 524                 };
 525         };
 526 };
 527
 528 &sdio0 {
 529         max-frequency = <100000000>;
 530         card-detect-delay = <300>;
 531         bus-width = <8>;
 532         cap-mmc-highspeed;
 533         mmc-ddr-1_8v;
 534         mmc-hs200-1_8v;
 535         non-removable;
 536         cap-mmc-hw-reset;
 537         post-power-on-delay-ms = <200>;
 538         status = "okay";
 539 };
 540
 541 &sdio1 {
 542         max-frequency = <100000000>;
 543         card-detect-delay = <300>;
 544         bus-width = <4>;
 545         no-sdio;
 546         no-mmc;
 547         broken-cd;
 548         cap-sd-highspeed;
 549         post-power-on-delay-ms = <200>;
 550         status = "okay";
 551 };
 552
 553 &vin_sysctl {
 554         /* when use dvp open this pinctrl*/
 555         status = "okay";
 556
 557         ports {
 558                 #address-cells = <1>;
 559                 #size-cells = <0>;
 560
 561                 port@1 {
 562                         reg = <1>;
 563                         #address-cells = <1>;
 564                         #size-cells = <0>;
 565
 566                         /* CSI2 bus endpoint */
 567                         csi2rx0_from_imx219: endpoint@0 {
 568                                 reg = <0>;
 569                                 remote-endpoint = <&imx219_to_csi2rx0>;
 570                                 bus-type = <4>;      /* MIPI CSI-2 D-PHY */
 571                                 clock-lanes = <4>;
 572                                 data-lanes = <0 1>;
 573                                 lane-polarities = <0 0 0>;
 574                                 status = "okay";
 575                         };
 576                 };
 577         };
 578 };
 579
 580 &sfctemp {
 581         status = "okay";
 582 };
 583
 584 &jpu {
 585         status = "okay";
 586 };
 587
 588 &vpu_dec {
 589         status = "okay";
 590 };
 591
 592 &vpu_enc {
 593         status = "okay";
 594 };
 595
 596 &gmac0 {
 597         status = "okay";
 598         #address-cells = <1>;
 599         #size-cells = <0>;
 600         phy0: ethernet-phy@0 {
 601                 rxc_dly_en = <1>;
 602                 tx_delay_sel_fe = <5>;
 603                 tx_delay_sel = <0xa>;
 604                 tx_inverted_10 = <0x1>;
 605                 tx_inverted_100 = <0x1>;
 606                 tx_inverted_1000 = <0x1>;
 607         };
 608 };
 609
 610 &gmac1 {
 611         #address-cells = <1>;
 612         #size-cells = <0>;
 613         status = "okay";
 614         phy1: ethernet-phy@1 {
 615                 tx_delay_sel_fe = <5>;
 616                 tx_delay_sel = <0>;
 617                 rxc_dly_en = <0>;
 618                 tx_inverted_10 = <0x1>;
 619                 tx_inverted_100 = <0x1>;
 620                 tx_inverted_1000 = <0x0>;
 621         };
 622 };
 623
 624 &gpu {
 625         status = "okay";
 626 };
 627
 628 &pwmdac {
 629         pinctrl-names = "default";
 630         pinctrl-0 = <&pwmdac0_pins>;
 631         status = "okay";
 632 };
 633
 634 &i2srx_3ch {
 635         pinctrl-names = "default";
 636         pinctrl-0 = <&i2s_clk_pins &i2srx_pins>;
 637         status = "disabled";
 638 };
 639
 640 &i2stx_4ch1 {
 641         pinctrl-names = "default";
 642         pinctrl-0 = <&i2stx_pins>;
 643         status = "disabled";
 644 };
 645
 646 &pwmdac_codec {
 647         status = "okay";
 648 };
 649
 650 &spi0 {
 651         pinctrl-names = "default";
 652         pinctrl-0 = <&ssp0_pins>;
 653         status = "okay";
 654
 655         spi_dev0: spi@0 {
 656                 compatible = "rohm,dh2228fv";
 657                 pl022,com-mode = <1>;
 658                 spi-max-frequency = <10000000>;
 659                 reg = <0>;
 660                 status = "okay";
 661         };
 662 };
 663
 664 &pcie0 {
 665         pinctrl-names = "default", "perst-default", "perst-active";
 666         pinctrl-0 = <&pcie0_wake_default>,
 667                     <&pcie0_clkreq_default>;
 668         pinctrl-1 = <&pcie0_perst_default>;
 669         pinctrl-2 = <&pcie0_perst_active>;
 670         status = "okay";
 671 };
 672
 673 &pcie1 {
 674         pinctrl-names = "default", "perst-default", "perst-active";
 675         pinctrl-0 = <&pcie1_wake_default>,
 676                     <&pcie1_clkreq_default>;
 677         pinctrl-1 = <&pcie1_perst_default>;
 678         pinctrl-2 = <&pcie1_perst_active>;
 679         status = "okay";
 680 };
 681
 682 &mailbox_contrl0 {
 683         status = "okay";
 684 };
 685
 686 &mailbox_client0 {
 687         status = "okay";
 688 };
 689
 690 &display {
 691         status = "okay";
 692 };
 693
 694 &hdmi {
 695         status = "okay";
 696
 697         hdmi_in: port {
 698                 #address-cells = <1>;
 699                 #size-cells = <0>;
 700                 hdmi_in_lcdc: endpoint@0 {
 701                         reg = <0>;
 702                         remote-endpoint = <&dc_out_dpi1>;
 703                 };
 704         };
 705 };
 706
 707 &dc8200 {
 708         status = "okay";
 709
 710         dc_out: port {
 711                 #address-cells = <1>;
 712                 #size-cells = <0>;
 713                 dc_out_dpi0: endpoint@0 {
 714                         reg = <0>;
 715                         remote-endpoint = <&hdmi_input0>;
 716                 };
 717                 dc_out_dpi1: endpoint@1 {
 718                         reg = <1>;
 719                         remote-endpoint = <&hdmi_in_lcdc>;
 720                 };
 721
 722                 dc_out_dpi2: endpoint@2 {
 723                         reg = <2>;
 724                         remote-endpoint = <&mipi_in>;
 725                 };
 726         };
 727 };
 728
 729 &rgb_output {
 730         status = "disabled";
 731
 732         ports {
 733                 #address-cells = <1>;
 734                 #size-cells = <0>;
 735                 port@0 {
 736                         #address-cells = <1>;
 737                         #size-cells = <0>;
 738                         reg = <0>;
 739                         hdmi_input0:endpoint@0 {
 740                                 reg = <0>;
 741                                 remote-endpoint = <&dc_out_dpi0>;
 742                         };
 743                 };
 744         };
 745 };
 746
 747 &dsi_output {
 748         status = "okay";
 749
 750         ports {
 751                 #address-cells = <1>;
 752                 #size-cells = <0>;
 753
 754                 port@0 {
 755                         reg = <0>;
 756                         mipi_in: endpoint {
 757                                 remote-endpoint = <&dc_out_dpi2>;
 758                         };
 759                 };
 760
 761                 port@1 {
 762                         reg = <1>;
 763                         sf_dpi_output: endpoint {
 764                                 remote-endpoint = <&dsi_in_port>;
 765                         };
 766                 };
 767         };
 768 };
 769
 770 &mipi_dsi {
 771         status = "okay";
 772
 773         ports {
 774                 #address-cells = <1>;
 775                 #size-cells = <0>;
 776
 777                 port@0 {
 778                         reg = <0>;
 779                         #address-cells = <1>;
 780                         #size-cells = <0>;
 781
 782                         dsi0_output: endpoint@0 {
 783                                 reg = <0>;
 784                                 remote-endpoint = <&panel_out0>;
 785                         };
 786
 787                         dsi1_output: endpoint@1 {
 788                                 reg = <1>;
 789                                 remote-endpoint = <&panel_out1>;
 790                         };
 791                 };
 792
 793                 port@1{
 794                         reg = <1>;
 795                         dsi_in_port: endpoint {
 796                                 remote-endpoint = <&sf_dpi_output>;
 797                         };
 798                 };
 799
 800         };
 801 };
 802
 803 &mipi_dphy {
 804         status = "okay";
 805 };
 806
 807 &co_process {
 808         status = "okay";
 809 };
 810
 811 &usbdrd30 {
 812         clocks = <&clkgen JH7110_USB_125M>,
 813                  <&clkgen JH7110_USB0_CLK_APP_125>,
 814                  <&clkgen JH7110_USB0_CLK_LPM>,
 815                  <&clkgen JH7110_USB0_CLK_STB>,
 816                  <&clkgen JH7110_USB0_CLK_USB_APB>,
 817                  <&clkgen JH7110_USB0_CLK_AXI>,
 818                  <&clkgen JH7110_USB0_CLK_UTMI_APB>;
 819         clock-names = "125m","app","lpm","stb","apb","axi","utmi";
 820         resets = <&rstgen RSTN_U0_CDN_USB_PWRUP>,
 821                  <&rstgen RSTN_U0_CDN_USB_APB>,
 822                  <&rstgen RSTN_U0_CDN_USB_AXI>,
 823                  <&rstgen RSTN_U0_CDN_USB_UTMI_APB>;
 824         reset-names = "pwrup","apb","axi","utmi";
 825         starfive,usb2-only;
 826         dr_mode = "peripheral"; /*host or peripheral*/
 827         status = "okay";
 828 };
 829
 830 &xrp {
 831         status = "okay";
 832 };
 833
 834 &ptc {
 835         pinctrl-names = "default";
 836         pinctrl-0 = <&pwm_pins>;
 837         status = "okay";
 838 };