arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi

   1 // SPDX-License-Identifier: GPL-2.0 OR MIT
   2 /*
   3  * Copyright (C) 2022 StarFive Technology Co., Ltd.
   4  * Copyright (C) 2022 Emil Renner Berthing <kernel@esmil.dk>
   5  */
   6
   7 /dts-v1/;
   8 #include "jh7110.dtsi"
   9 #include "jh7110-pinfunc.h"
  10 #include <dt-bindings/gpio/gpio.h>
  11
  12 / {
  13         aliases {
  14                 ethernet0 = &gmac0;
  15                 ethernet1 = &gmac1;
  16                 i2c0 = &i2c0;
  17                 i2c2 = &i2c2;
  18                 i2c5 = &i2c5;
  19                 i2c6 = &i2c6;
  20                 serial0 = &uart0;
  21                 mmc0 = &mmc0;
  22                 mmc1 = &mmc1;
  23         };
  24
  25         chosen {
  26                 stdout-path = "serial0:115200n8";
  27         };
  28
  29         cpus {
  30                 timebase-frequency = <4000000>;
  31         };
  32
  33         memory@40000000 {
  34                 device_type = "memory";
  35                 reg = <0x0 0x40000000 0x1 0x0>;
  36         };
  37
  38         thermal-zones {
  39                 cpu-thermal {
  40                         polling-delay-passive = <250>;
  41                         polling-delay = <15000>;
  42
  43                         thermal-sensors = <&sfctemp>;
  44
  45                         cooling-maps {
  46                         };
  47
  48                         trips {
  49                                 cpu_alert0: cpu_alert0 {
  50                                         /* milliCelsius */
  51                                         temperature = <75000>;
  52                                         hysteresis = <2000>;
  53                                         type = "passive";
  54                                 };
  55
  56                                 cpu_crit: cpu_crit {
  57                                         /* milliCelsius */
  58                                         temperature = <90000>;
  59                                         hysteresis = <2000>;
  60                                         type = "critical";
  61                                 };
  62                         };
  63                 };
  64         };
  65
  66         gpio-restart {
  67                 compatible = "gpio-restart";
  68                 gpios = <&sysgpio 35 GPIO_ACTIVE_HIGH>;
  69                 priority = <224>;
  70         };
  71 };
  72
  73 &dvp_clk {
  74         clock-frequency = <74250000>;
  75 };
  76
  77 &gmac0_rgmii_rxin {
  78         clock-frequency = <125000000>;
  79 };
  80
  81 &gmac0_rmii_refin {
  82         clock-frequency = <50000000>;
  83 };
  84
  85 &gmac1_rgmii_rxin {
  86         clock-frequency = <125000000>;
  87 };
  88
  89 &gmac1_rmii_refin {
  90         clock-frequency = <50000000>;
  91 };
  92
  93 &hdmitx0_pixelclk {
  94         clock-frequency = <297000000>;
  95 };
  96
  97 &i2srx_bclk_ext {
  98         clock-frequency = <12288000>;
  99 };
 100
 101 &i2srx_lrck_ext {
 102         clock-frequency = <192000>;
 103 };
 104
 105 &i2stx_bclk_ext {
 106         clock-frequency = <12288000>;
 107 };
 108
 109 &i2stx_lrck_ext {
 110         clock-frequency = <192000>;
 111 };
 112
 113 &mclk_ext {
 114         clock-frequency = <12288000>;
 115 };
 116
 117 &osc {
 118         clock-frequency = <24000000>;
 119 };
 120
 121 &rtc_osc {
 122         clock-frequency = <32768>;
 123 };
 124
 125 &tdm_ext {
 126         clock-frequency = <49152000>;
 127 };
 128
 129 &gmac0 {
 130         phy-handle = <&phy0>;
 131         phy-mode = "rgmii-id";
 132         status = "okay";
 133
 134         mdio {
 135                 #address-cells = <1>;
 136                 #size-cells = <0>;
 137                 compatible = "snps,dwmac-mdio";
 138
 139                 phy0: ethernet-phy@0 {
 140                         reg = <0>;
 141                 };
 142         };
 143 };
 144
 145 &gmac1 {
 146         phy-handle = <&phy1>;
 147         phy-mode = "rgmii-id";
 148         status = "okay";
 149
 150         mdio {
 151                 #address-cells = <1>;
 152                 #size-cells = <0>;
 153                 compatible = "snps,dwmac-mdio";
 154
 155                 phy1: ethernet-phy@1 {
 156                         reg = <0>;
 157                 };
 158         };
 159 };
 160
 161 &i2c0 {
 162         clock-frequency = <100000>;
 163         i2c-sda-hold-time-ns = <300>;
 164         i2c-sda-falling-time-ns = <510>;
 165         i2c-scl-falling-time-ns = <510>;
 166         pinctrl-names = "default";
 167         pinctrl-0 = <&i2c0_pins>;
 168         status = "okay";
 169 };
 170
 171 &i2c2 {
 172         clock-frequency = <100000>;
 173         i2c-sda-hold-time-ns = <300>;
 174         i2c-sda-falling-time-ns = <510>;
 175         i2c-scl-falling-time-ns = <510>;
 176         pinctrl-names = "default";
 177         pinctrl-0 = <&i2c2_pins>;
 178         status = "okay";
 179 };
 180
 181 &i2c5 {
 182         clock-frequency = <100000>;
 183         i2c-sda-hold-time-ns = <300>;
 184         i2c-sda-falling-time-ns = <510>;
 185         i2c-scl-falling-time-ns = <510>;
 186         pinctrl-names = "default";
 187         pinctrl-0 = <&i2c5_pins>;
 188         status = "okay";
 189
 190         axp15060: pmic@36 {
 191                 compatible = "x-powers,axp15060";
 192                 reg = <0x36>;
 193
 194                 regulators {
 195                         vdd_cpu: dcdc2 {
 196                                 regulator-always-on;
 197                                 regulator-min-microvolt = <500000>;
 198                                 regulator-max-microvolt = <1540000>;
 199                                 regulator-name = "vdd-cpu";
 200                         };
 201                 };
 202         };
 203 };
 204
 205 &i2c6 {
 206         clock-frequency = <100000>;
 207         i2c-sda-hold-time-ns = <300>;
 208         i2c-sda-falling-time-ns = <510>;
 209         i2c-scl-falling-time-ns = <510>;
 210         pinctrl-names = "default";
 211         pinctrl-0 = <&i2c6_pins>;
 212         status = "okay";
 213 };
 214
 215 &mmc0 {
 216         max-frequency = <100000000>;
 217         bus-width = <8>;
 218         cap-mmc-highspeed;
 219         mmc-ddr-1_8v;
 220         mmc-hs200-1_8v;
 221         non-removable;
 222         cap-mmc-hw-reset;
 223         post-power-on-delay-ms = <200>;
 224         status = "okay";
 225 };
 226
 227 &mmc1 {
 228         max-frequency = <100000000>;
 229         bus-width = <4>;
 230         no-sdio;
 231         no-mmc;
 232         broken-cd;
 233         cap-sd-highspeed;
 234         post-power-on-delay-ms = <200>;
 235         status = "okay";
 236 };
 237
 238 &pcie0 {
 239         pinctrl-names = "default";
 240         reset-gpios = <&sysgpio 26 GPIO_ACTIVE_LOW>;
 241         phys = <&pciephy0>;
 242         status = "okay";
 243 };
 244
 245 &pcie1 {
 246         pinctrl-names = "default";
 247         reset-gpios = <&sysgpio 28 GPIO_ACTIVE_LOW>;
 248         phys = <&pciephy1>;
 249         status = "okay";
 250 };
 251
 252 &ptc {
 253         pinctrl-names = "default";
 254         pinctrl-0 = <&pwm_pins>;
 255         status = "okay";
 256 };
 257
 258 &sysgpio {
 259         i2c0_pins: i2c0-0 {
 260                 i2c-pins {
 261                         pinmux = <GPIOMUX(57, GPOUT_LOW,
 262                                               GPOEN_SYS_I2C0_CLK,
 263                                               GPI_SYS_I2C0_CLK)>,
 264                                  <GPIOMUX(58, GPOUT_LOW,
 265                                               GPOEN_SYS_I2C0_DATA,
 266                                               GPI_SYS_I2C0_DATA)>;
 267                         bias-disable; /* external pull-up */
 268                         input-enable;
 269                         input-schmitt-enable;
 270                 };
 271         };
 272
 273         i2c2_pins: i2c2-0 {
 274                 i2c-pins {
 275                         pinmux = <GPIOMUX(3, GPOUT_LOW,
 276                                              GPOEN_SYS_I2C2_CLK,
 277                                              GPI_SYS_I2C2_CLK)>,
 278                                  <GPIOMUX(2, GPOUT_LOW,
 279                                              GPOEN_SYS_I2C2_DATA,
 280                                              GPI_SYS_I2C2_DATA)>;
 281                         bias-disable; /* external pull-up */
 282                         input-enable;
 283                         input-schmitt-enable;
 284                 };
 285         };
 286
 287         i2c5_pins: i2c5-0 {
 288                 i2c-pins {
 289                         pinmux = <GPIOMUX(19, GPOUT_LOW,
 290                                               GPOEN_SYS_I2C5_CLK,
 291                                               GPI_SYS_I2C5_CLK)>,
 292                                  <GPIOMUX(20, GPOUT_LOW,
 293                                               GPOEN_SYS_I2C5_DATA,
 294                                               GPI_SYS_I2C5_DATA)>;
 295                         bias-disable; /* external pull-up */
 296                         input-enable;
 297                         input-schmitt-enable;
 298                 };
 299         };
 300
 301         i2c6_pins: i2c6-0 {
 302                 i2c-pins {
 303                         pinmux = <GPIOMUX(16, GPOUT_LOW,
 304                                               GPOEN_SYS_I2C6_CLK,
 305                                               GPI_SYS_I2C6_CLK)>,
 306                                  <GPIOMUX(17, GPOUT_LOW,
 307                                               GPOEN_SYS_I2C6_DATA,
 308                                               GPI_SYS_I2C6_DATA)>;
 309                         bias-disable; /* external pull-up */
 310                         input-enable;
 311                         input-schmitt-enable;
 312                 };
 313         };
 314
 315         pcie0_wake_default: pcie0_wake_default {
 316                 wake-pins {
 317                         pinmux = <GPIOMUX(32, GPOUT_HIGH, GPOEN_ENABLE, GPI_NONE)>;
 318                         bias-disable;
 319                         drive-strength = <2>;
 320                         input-enable;
 321                         input-schmitt-disable;
 322                         slew-rate = <0>;
 323                 };
 324         };
 325
 326         pcie0_clkreq_default: pcie0_clkreq_default {
 327                 clkreq-pins {
 328                         bias-disable;
 329                         pinmux = <GPIOMUX(27, GPOUT_HIGH, GPOEN_ENABLE, GPI_NONE)>;
 330                         drive-strength = <2>;
 331                         input-enable;
 332                         input-schmitt-disable;
 333                         slew-rate = <0>;
 334                 };
 335         };
 336
 337         pcie1_wake_default: pcie1_wake_default {
 338                 wake-pins {
 339                         bias-disable;
 340                         pinmux = <GPIOMUX(21, GPOUT_HIGH, GPOEN_ENABLE, GPI_NONE)>;
 341                         drive-strength = <2>;
 342                         input-enable;
 343                         input-schmitt-disable;
 344                         slew-rate = <0>;
 345                 };
 346         };
 347
 348         pcie1_clkreq_default: pcie1_clkreq_default {
 349                 clkreq-pins {
 350                         bias-disable;
 351                         pinmux = <GPIOMUX(29, GPOUT_HIGH, GPOEN_ENABLE, GPI_NONE)>;
 352                         drive-strength = <2>;
 353                         input-enable;
 354                         input-schmitt-disable;
 355                         slew-rate = <0>;
 356                 };
 357         };
 358
 359         pwm_pins: pwm-0 {
 360                 pwm-pins {
 361                         pinmux = <GPIOMUX(46, GPOUT_SYS_PWM_CHANNEL0,
 362                                         GPOEN_SYS_PWM0_CHANNEL0, GPI_NONE)>,
 363                                         <GPIOMUX(59, GPOUT_SYS_PWM_CHANNEL1,
 364                                         GPOEN_SYS_PWM0_CHANNEL1, GPI_NONE)>;
 365                         bias-disable;
 366                         drive-strength = <12>;
 367                         input-disable;
 368                         input-schmitt-disable;
 369                         slew-rate = <0>;
 370                 };
 371         };
 372
 373         uart0_pins: uart0-0 {
 374                 tx-pins {
 375                         pinmux = <GPIOMUX(5, GPOUT_SYS_UART0_TX,
 376                                              GPOEN_ENABLE,
 377                                              GPI_NONE)>;
 378                         bias-disable;
 379                         drive-strength = <12>;
 380                         input-disable;
 381                         input-schmitt-disable;
 382                         slew-rate = <0>;
 383                 };
 384
 385                 rx-pins {
 386                         pinmux = <GPIOMUX(6, GPOUT_LOW,
 387                                              GPOEN_DISABLE,
 388                                              GPI_SYS_UART0_RX)>;
 389                         bias-disable; /* external pull-up */
 390                         drive-strength = <2>;
 391                         input-enable;
 392                         input-schmitt-enable;
 393                         slew-rate = <0>;
 394                 };
 395         };
 396
 397         mclk_ext_pins: mclk-ext-pins {
 398                 mclk-ext-pins {
 399                         pinmux = <GPIOMUX(4, GPOUT_HIGH,
 400                                              GPOEN_ENABLE,
 401                                              GPI_SYS_MCLK_EXT)>;
 402                 };
 403         };
 404
 405         pwmdac0_pins: pwmdac0-pins {
 406                 pwmdac0-pins-left {
 407                         pinmux = <GPIOMUX(33, GPOUT_SYS_PWMDAC_LEFT,
 408                                              GPOEN_ENABLE,
 409                                              GPI_NONE)>;
 410                 };
 411
 412                 pwmdac0-pins-right {
 413                         pinmux = <GPIOMUX(34, GPOUT_SYS_PWMDAC_RIGHT,
 414                                              GPOEN_ENABLE,
 415                                              GPI_NONE)>;
 416                 };
 417         };
 418 };
 419
 420 &uart0 {
 421         pinctrl-names = "default";
 422         pinctrl-0 = <&uart0_pins>;
 423         status = "okay";
 424 };
 425
 426 &usb0 {
 427         status = "okay";
 428         usbdrd_cdns3: usb@0 {
 429                 dr_mode = "peripheral";
 430         };
 431 };
 432
 433 &U74_1 {
 434         cpu-supply = <&vdd_cpu>;
 435 };
 436
 437 &U74_2 {
 438         cpu-supply = <&vdd_cpu>;
 439 };
 440
 441 &U74_3 {
 442         cpu-supply = <&vdd_cpu>;
 443 };
 444
 445 &U74_4 {
 446         cpu-supply = <&vdd_cpu>;
 447 };
 448
 449 &i2stx_4ch0 {
 450         pinctrl-names = "default";
 451         pinctrl-0 = <&mclk_ext_pins>;
 452         status = "okay";
 453 };
 454
 455 &sound3 {
 456         simple-audio-card,dai-link@0 {
 457                 reg = <0>;
 458                 format = "left_j";
 459                 bitclock-master = <&sndcpu0>;
 460                 frame-master = <&sndcpu0>;
 461                 status = "okay";
 462
 463                 sndcpu0: cpu {
 464                         sound-dai = <&pwmdac>;
 465                 };
 466
 467                 codec {
 468                         sound-dai = <&pwmdac_codec>;
 469                 };
 470         };
 471 };
 472
 473 &pwmdac {
 474         pinctrl-names = "default";
 475         pinctrl-0 = <&pwmdac0_pins>;
 476         status = "okay";
 477 };