arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2-v1.3b.dts

   1 // SPDX-License-Identifier: GPL-2.0 OR MIT
   2 /*
   3  * Copyright (C) 2022 StarFive Technology Co., Ltd.
   4  * Copyright (C) 2022 Emil Renner Berthing <kernel@esmil.dk>
   5  */
   6
   7 /dts-v1/;
   8 #include "jh7110-starfive-visionfive-2.dtsi"
   9
  10 / {
  11         model = "StarFive VisionFive 2 v1.3B";
  12         compatible = "starfive,visionfive-2-v1.3b", "starfive,jh7110";
  13 };
  14
  15 &gmac0 {
  16         starfive,tx-use-rgmii-clk;
  17         assigned-clocks = <&aoncrg JH7110_AONCLK_GMAC0_TX>;
  18         assigned-clock-parents = <&aoncrg JH7110_AONCLK_GMAC0_RMII_RTX>;
  19 };
  20
  21 &gmac1 {
  22         starfive,tx-use-rgmii-clk;
  23         assigned-clocks = <&syscrg JH7110_SYSCLK_GMAC1_TX>;
  24         assigned-clock-parents = <&syscrg JH7110_SYSCLK_GMAC1_RMII_RTX>;
  25 };
  26
  27 &phy0 {
  28         motorcomm,tx-clk-adj-enabled;
  29         motorcomm,tx-clk-100-inverted;
  30         motorcomm,tx-clk-1000-inverted;
  31         rx-internal-delay-ps = <1900>;
  32         tx-internal-delay-ps = <1500>;
  33 };
  34
  35 &phy1 {
  36         motorcomm,tx-clk-adj-enabled;
  37         motorcomm,tx-clk-100-inverted;
  38         rx-internal-delay-ps = <0>;
  39         tx-internal-delay-ps = <0>;
  40 };