arch/riscv/boot/dts/starfive/jh7110-common.dtsi

   1 // SPDX-License-Identifier: GPL-2.0 OR MIT
   2 /*
   3  * Copyright (C) 2022 StarFive Technology Co., Ltd.
   4  * Copyright (C) 2022 Hal Feng <hal.feng@starfivetech.com>
   5  */
   6
   7 /dts-v1/;
   8 #include "jh7110.dtsi"
   9 #include "jh7110_pinctrl.dtsi"
  10
  11 / {
  12         aliases {
  13                 spi0 = &qspi;
  14                 gpio0 = &gpio;
  15                 ethernet0 = &gmac0;
  16                 ethernet1 = &gmac1;
  17                 mmc0 = &sdio0;
  18                 mmc1 = &sdio1;
  19                 serial0 = &uart0;
  20                 serial3 = &uart3;
  21         };
  22
  23         chosen {
  24                 linux,initrd-start = <0x0 0x46100000>;
  25                 linux,initrd-end = <0x0 0x4c000000>;
  26                 stdout-path = "serial0:115200";
  27                 #bootargs = "debug console=ttyS0 rootwait";
  28         };
  29
  30         cpus {
  31                 timebase-frequency = <4000000>;
  32         };
  33
  34         memory@40000000 {
  35                 device_type = "memory";
  36                 reg = <0x0 0x40000000 0x1 0x0>;
  37         };
  38
  39         reserved-memory {
  40                 #address-cells = <2>;
  41                 #size-cells = <2>;
  42                 ranges;
  43
  44                 linux,cma {
  45                         compatible = "shared-dma-pool";
  46                         reusable;
  47                         size = <0x0 0x20000000>;
  48                         alignment = <0x0 0x1000>;
  49                         alloc-ranges = <0x0 0xa0000000 0x0 0x20000000>;
  50                         linux,cma-default;
  51                 };
  52
  53                 e24_mem: e24@c0000000 {
  54                         no-map;
  55                         reg = <0x0 0xc0110000 0x0 0xf0000>;
  56                 };
  57
  58                 xrp_reserved: xrpbuffer@f0000000 {
  59                         reg = <0x0 0xf0000000 0x0 0x01ffffff
  60                                 0x0 0xf2000000 0x0 0x00001000
  61                                 0x0 0xf2001000 0x0 0x00fff000
  62                                 0x0 0xf3000000 0x0 0x00001000>;
  63                 };
  64
  65         };
  66 };
  67
  68 &uart0 {
  69         pinctrl-names = "default";
  70         pinctrl-0 = <&uart0_pins>;
  71         status = "okay";
  72 };
  73
  74 &uart3 {
  75         pinctrl-names = "default";
  76         pinctrl-0 = <&uart3_pins>;
  77         status = "okay";
  78 };
  79
  80 &dma {
  81         status = "okay";
  82 };
  83
  84 &trng {
  85         status = "okay";
  86 };
  87
  88 &i2c0 {
  89         clock-frequency = <100000>;
  90         i2c-sda-hold-time-ns = <300>;
  91         i2c-sda-falling-time-ns = <3000>;
  92         i2c-scl-falling-time-ns = <3000>;
  93         auto_calc_scl_lhcnt;
  94         pinctrl-names = "default";
  95         pinctrl-0 = <&i2c0_pins>;
  96         status = "okay";
  97
  98         ac108_a: ac108@3b {
  99                 compatible = "x-power,ac108_0";
 100                 reg = <0x3b>;
 101                 #sound-dai-cells = <0>;
 102                 data-protocol = <0>;
 103         };
 104
 105         wm8960: codec@1a {
 106                 compatible = "wlf,wm8960";
 107                 reg = <0x1a>;
 108                 #sound-dai-cells = <0>;
 109
 110                 wlf,shared-lrclk;
 111         };
 112 };
 113
 114 &i2c1 {
 115         clock-frequency = <100000>;
 116         i2c-sda-hold-time-ns = <300>;
 117         i2c-sda-falling-time-ns = <3000>;
 118         i2c-scl-falling-time-ns = <3000>;
 119         auto_calc_scl_lhcnt;
 120         pinctrl-names = "default";
 121         pinctrl-0 = <&i2c1_pins>;
 122         status = "okay";
 123
 124 };
 125
 126 &i2c2 {
 127         clock-frequency = <100000>;
 128         i2c-sda-hold-time-ns = <300>;
 129         i2c-sda-falling-time-ns = <3000>;
 130         i2c-scl-falling-time-ns = <3000>;
 131         auto_calc_scl_lhcnt;
 132         pinctrl-names = "default";
 133         pinctrl-0 = <&i2c2_pins>;
 134         status = "okay";
 135 };
 136
 137 &i2c3 {
 138         clock-frequency = <100000>;
 139         i2c-sda-hold-time-ns = <300>;
 140         i2c-sda-falling-time-ns = <3000>;
 141         i2c-scl-falling-time-ns = <3000>;
 142         auto_calc_scl_lhcnt;
 143         pinctrl-names = "default";
 144         pinctrl-0 = <&i2c3_pins>;
 145         status = "okay";
 146
 147         tda998x@70 {
 148                 compatible = "nxp,tda998x";
 149                 reg = <0x70>;
 150
 151                 port {
 152                         tda998x_0_input: endpoint {
 153                                 remote-endpoint = <&hdmi_out>;
 154                         };
 155                 };
 156         };
 157 };
 158
 159 &i2c4 {
 160         clock-frequency = <100000>;
 161         i2c-sda-hold-time-ns = <300>;
 162         i2c-sda-falling-time-ns = <3000>;
 163         i2c-scl-falling-time-ns = <3000>;
 164         auto_calc_scl_lhcnt;
 165         pinctrl-names = "default";
 166         pinctrl-0 = <&i2c4_pins>;
 167         status = "okay";
 168
 169         ov5640: ov5640@3c {
 170                 compatible = "ovti,ov5640";
 171                 reg = <0x3c>;
 172                 clocks = <&clk_ext_camera>;
 173                 clock-names = "xclk";
 174                 //DOVDD-supply = <&v2v8>;
 175                 rotation = <180>;
 176                 port {
 177                         // Parallel bus endpoint
 178                         ov5640_to_parallel: endpoint {
 179                                 remote-endpoint = <&parallel_from_ov5640>;
 180                                 bus-type = <5>;         /* Parallel */
 181                                 bus-width = <8>;
 182                                 data-shift = <2>;       /* lines 13:6 are used */
 183                                 hsync-active = <0>;
 184                                 vsync-active = <1>;
 185                                 pclk-sample = <1>;
 186                         };
 187                 };
 188         };
 189
 190         sc2235: sc2235@30 {
 191                 compatible = "sc2235";
 192                 reg = <0x30>;
 193                 clocks = <&clk_ext_camera>;
 194                 clock-names = "xclk";
 195
 196                 port {
 197                         /* Parallel bus endpoint */
 198                         sc2235_to_parallel: endpoint {
 199                                 remote-endpoint = <&parallel_from_sc2235>;
 200                                 bus-type = <5>;      /* Parallel */
 201                                 bus-width = <8>;
 202                                 data-shift = <2>; /* lines 13:6 are used */
 203                                 hsync-active = <1>;
 204                                 vsync-active = <1>;
 205                                 pclk-sample = <1>;
 206                         };
 207                 };
 208         };
 209 };
 210
 211 &i2c5 {
 212         clock-frequency = <100000>;
 213         i2c-sda-hold-time-ns = <300>;
 214         i2c-sda-falling-time-ns = <3000>;
 215         i2c-scl-falling-time-ns = <3000>;
 216         auto_calc_scl_lhcnt;
 217         pinctrl-names = "default";
 218         pinctrl-0 = <&i2c5_pins>;
 219         status = "okay";
 220
 221         pmic@50 {
 222                 compatible = "starfive,pmic";
 223                 reg = <0x50>;
 224         };
 225 };
 226
 227 &i2c6 {
 228         clock-frequency = <100000>;
 229         i2c-sda-hold-time-ns = <300>;
 230         i2c-sda-falling-time-ns = <3000>;
 231         i2c-scl-falling-time-ns = <3000>;
 232         auto_calc_scl_lhcnt;
 233         pinctrl-names = "default";
 234         pinctrl-0 = <&i2c6_pins>;
 235         status = "okay";
 236
 237         ov4689: ov4689@36 {
 238                 compatible = "ovti,ov4689";
 239                 reg = <0x36>;
 240                 clocks = <&clk_ext_camera>;
 241                 clock-names = "xclk";
 242                 //reset-gpio = <&gpio 18 0>;
 243                 rotation = <180>;
 244
 245                 port {
 246                         /* Parallel bus endpoint */
 247                         ov4689_to_csi2rx0: endpoint {
 248                                 remote-endpoint = <&csi2rx0_from_ov4689>;
 249                                 bus-type = <4>;         /* MIPI CSI-2 D-PHY */
 250                                 clock-lanes = <0>;
 251                                 data-lanes = <1 2 3 4>;
 252                         };
 253                 };
 254         };
 255
 256         ov13850@10 {
 257                 compatible = "ovti,ov13850";
 258                 reg = <0x10>;
 259                 clocks = <&clk_ext_camera>;
 260                 clock-names = "xclk";
 261                 //reset-gpio = <&gpio 18 0>;
 262                 rotation = <0>;
 263
 264                 port {
 265                         /* CSI2 bus endpoint */
 266                         ov13850_to_csi2rx0: endpoint {
 267                                 remote-endpoint = <&csi2rx0_from_ov13850>;
 268                                 bus-type = <4>;      /* MIPI CSI-2 D-PHY */
 269                                 clock-lanes = <2>;
 270                                 data-lanes = <0 1>;
 271                         };
 272                 };
 273         };
 274 };
 275 /* default sd card */
 276 &sdio0 {
 277         clock-frequency = <102400000>;
 278         max-frequency = <200000000>;
 279         card-detect-delay = <300>;
 280         bus-width = <4>;
 281         broken-cd;
 282         cap-sd-highspeed;
 283         post-power-on-delay-ms = <200>;
 284         pinctrl-names = "default";
 285         pinctrl-0 = <&sdcard0_pins>;
 286         //cd-gpios = <&gpio 23 0>;
 287         status = "okay";
 288 };
 289
 290 &sdio1 {
 291         clock-frequency = <4000000>;
 292         max-frequency = <1000000>;
 293         card-detect-delay = <300>;
 294         bus-width = <4>;
 295         cap-sd-highspeed;
 296         cap-sdio-irq;
 297         cap-mmc-hw-reset;
 298         non-removable;
 299         enable-sdio-wakeup;
 300         keep-power-in-suspend;
 301         cap-mmc-highspeed;
 302         post-power-on-delay-ms = <200>;
 303         pinctrl-names = "default";
 304         pinctrl-0 = <&mmc1_pins>;
 305         status = "okay";
 306 };
 307
 308 &vin_sysctl {
 309         /* when use dvp open this pinctrl*/
 310         //pinctrl-names = "default";
 311         //pinctrl-0 = <&dvp_pins>;
 312         status = "okay";
 313
 314         ports {
 315                 #address-cells = <1>;
 316                 #size-cells = <0>;
 317
 318                 port@2 {
 319                         reg = <2>;
 320                         #address-cells = <1>;
 321                         #size-cells = <0>;
 322
 323                         /* Parallel bus endpoint */
 324                         parallel_from_ov5640: endpoint@0 {
 325                                 reg = <0>;
 326                                 remote-endpoint = <&ov5640_to_parallel>;
 327                                 bus-type = <5>;         /* Parallel */
 328                                 bus-width = <8>;
 329                                 data-shift = <2>;       /* lines 9:2 are used */
 330                                 hsync-active = <1>;
 331                                 vsync-active = <0>;
 332                                 pclk-sample = <1>;
 333                                 status = "failed";
 334                         };
 335
 336                         /* Parallel bus endpoint */
 337                         parallel_from_sc2235: endpoint@1 {
 338                                 reg = <1>;
 339                                 remote-endpoint = <&sc2235_to_parallel>;
 340                                 bus-type = <5>;         /* Parallel */
 341                                 bus-width = <8>;
 342                                 data-shift = <2>;       /* lines 9:2 are used */
 343                                 hsync-active = <1>;
 344                                 vsync-active = <0>;
 345                                 pclk-sample = <1>;
 346                                 status = "okay";
 347                         };
 348                 };
 349
 350                 port@3 {
 351                         reg = <3>;
 352                         #address-cells = <1>;
 353                         #size-cells = <0>;
 354
 355                         /* CSI2 bus endpoint */
 356                         csi2rx0_from_ov13850: endpoint@0 {
 357                                 reg = <0>;
 358                                 remote-endpoint = <&ov13850_to_csi2rx0>;
 359                                 bus-type = <4>;      /* MIPI CSI-2 D-PHY */
 360                                 clock-lanes = <0>;
 361                                 data-lanes = <1 2 3 4>;
 362                                 status = "failed";
 363                         };
 364
 365                         /* CSI2 bus endpoint */
 366                         csi2rx0_from_ov4689: endpoint@1 {
 367                                 reg = <1>;
 368                                 remote-endpoint = <&ov4689_to_csi2rx0>;
 369                                 bus-type = <4>;      /* MIPI CSI-2 D-PHY */
 370                                 clock-lanes = <0>;
 371                                 data-lanes = <1 2 3 4>;
 372                                 status = "okay";
 373                         };
 374                 };
 375         };
 376 };
 377
 378 &sfctemp {
 379         status = "okay";
 380 };
 381
 382 &jpu {
 383         status = "okay";
 384 };
 385
 386 &vpu_dec {
 387         status = "okay";
 388 };
 389
 390 &vpu_enc {
 391         status = "okay";
 392 };
 393
 394 &gmac0 {
 395         status = "okay";
 396 };
 397
 398 &gmac1 {
 399         #address-cells = <1>;
 400         #size-cells = <0>;
 401         status = "okay";
 402         phy0: ethernet-phy@0 {
 403                 rxc-skew-ps = <1060>;
 404                 txc-skew-ps = <1800>;
 405                 reg = <0>;
 406         };
 407 };
 408
 409 &gpu {
 410         status = "okay";
 411 };
 412
 413 &can0 {
 414         pinctrl-names = "default";
 415         pinctrl-0 = <&can0_pins>;
 416         status = "okay";
 417 };
 418
 419 &can1 {
 420         status = "okay";
 421 };
 422
 423 &tdm {
 424         pinctrl-names = "default";
 425         pinctrl-0 = <&tdm0_pins>;
 426         status = "okay";
 427 };
 428
 429 &spdif0 {
 430         status = "okay";
 431 };
 432
 433 &pwmdac {
 434         pinctrl-names = "default";
 435         pinctrl-0 = <&pwmdac0_pins>;
 436         status = "okay";
 437 };
 438
 439 &i2stx {
 440         status = "disabled";
 441 };
 442
 443 &pdm {
 444         pinctrl-names = "default";
 445         pinctrl-0 = <&pdm0_pins>;
 446         status = "okay";
 447 };
 448
 449 &i2srx_3ch {
 450         pinctrl-names = "default";
 451         pinctrl-0 = <&i2s_clk_pins>;
 452         status = "okay";
 453 };
 454
 455 &i2stx_4ch0 {
 456         status = "okay";
 457 };
 458
 459 &i2stx_4ch1 {
 460         pinctrl-names = "default";
 461         pinctrl-0 = <&i2s_clk_pins &i2stx_pins>;
 462         status = "disabled";
 463 };
 464
 465 &ptc {
 466         pinctrl-names = "default";
 467         pinctrl-0 = <&pwm_ch0_pins>;
 468         status = "okay";
 469 };
 470
 471 &spdif_transmitter {
 472         status = "okay";
 473 };
 474
 475 &spdif_receiver {
 476         status = "okay";
 477 };
 478
 479 &pwmdac_codec {
 480         status = "okay";
 481 };
 482
 483 &dmic_codec {
 484         status = "okay";
 485 };
 486
 487 &spi0 {
 488         pinctrl-names = "default";
 489         pinctrl-0 = <&ssp0_pins>;
 490         status = "okay";
 491
 492         spi_dev0: spi@0 {
 493                 compatible = "rohm,dh2228fv";
 494                 pl022,com-mode = <1>;
 495                 spi-max-frequency = <10000000>;
 496                 reg = <0>;
 497                 status = "okay";
 498         };
 499 };
 500
 501 &spi1 {
 502         pinctrl-names = "default";
 503         pinctrl-0 = <&ssp1_pins>;
 504         status = "disabled";
 505
 506         spi_dev1: spi@0 {
 507                 compatible = "rohm,dh2228fv";
 508                 pl022,com-mode = <1>;
 509                 spi-max-frequency = <10000000>;
 510                 reg = <0>;
 511                 status = "okay";
 512         };
 513 };
 514
 515 &spi2 {
 516         pinctrl-names = "default";
 517         pinctrl-0 = <&ssp2_pins>;
 518         status = "disabled";
 519
 520         spi_dev2: spi@0 {
 521                 compatible = "rohm,dh2228fv";
 522                 pl022,com-mode = <1>;
 523                 spi-max-frequency = <10000000>;
 524                 reg = <0>;
 525                 status = "okay";
 526         };
 527 };
 528
 529 &spi3 {
 530         pinctrl-names = "default";
 531         pinctrl-0 = <&ssp3_pins>;
 532         status = "disabled";
 533
 534         spi_dev3: spi@0 {
 535                 compatible = "rohm,dh2228fv";
 536                 pl022,com-mode = <1>;
 537                 spi-max-frequency = <10000000>;
 538                 reg = <0>;
 539                 status = "okay";
 540         };
 541 };
 542
 543 &spi4 {
 544         pinctrl-names = "default";
 545         pinctrl-0 = <&ssp4_pins>;
 546         status = "disabled";
 547
 548         spi_dev4: spi@0 {
 549                 compatible = "rohm,dh2228fv";
 550                 pl022,com-mode = <1>;
 551                 spi-max-frequency = <10000000>;
 552                 reg = <0>;
 553                 status = "okay";
 554         };
 555 };
 556
 557 &spi5 {
 558         pinctrl-names = "default";
 559         pinctrl-0 = <&ssp5_pins>;
 560         status = "disabled";
 561
 562         spi_dev5: spi@0 {
 563                 compatible = "rohm,dh2228fv";
 564                 pl022,com-mode = <1>;
 565                 spi-max-frequency = <10000000>;
 566                 reg = <0>;
 567                 status = "okay";
 568         };
 569 };
 570
 571 &spi6 {
 572         pinctrl-names = "default";
 573         pinctrl-0 = <&ssp6_pins>;
 574         status = "disabled";
 575
 576         spi_dev6: spi@0 {
 577                 compatible = "rohm,dh2228fv";
 578                 pl022,com-mode = <1>;
 579                 spi-max-frequency = <10000000>;
 580                 reg = <0>;
 581                 status = "okay";
 582         };
 583 };
 584
 585 &pcie0 {
 586         pinctrl-names = "perst-default", "perst-active", "power-active";
 587         pinctrl-0 = <&pcie0_perst_default>;
 588         pinctrl-1 = <&pcie0_perst_active>;
 589         pinctrl-2 = <&pcie0_power_active>;
 590         status = "okay";
 591 };
 592
 593 &pcie1 {
 594         pinctrl-names = "perst-default", "perst-active", "power-active";
 595         pinctrl-0 = <&pcie1_perst_default>;
 596         pinctrl-1 = <&pcie1_perst_active>;
 597         pinctrl-2 = <&pcie1_power_active>;
 598         status = "okay";
 599 };
 600
 601 &mailbox_contrl0 {
 602         status = "okay";
 603 };
 604
 605 &mailbox_client0 {
 606         status = "okay";
 607 };
 608
 609 &display {
 610         status = "okay";
 611 };
 612
 613 &hdmi {
 614         status = "okay";
 615         pinctrl-names = "default";
 616         pinctrl-0 = <&inno_hdmi_pins>;
 617
 618         hdmi_in: port {
 619                 #address-cells = <1>;
 620                 #size-cells = <0>;
 621                 hdmi_in_lcdc: endpoint@0 {
 622                         reg = <0>;
 623                         remote-endpoint = <&dc_out_dpi1>;
 624                 };
 625         };
 626 };
 627
 628 &dc8200 {
 629         //pinctrl-names = "default";
 630         //pinctrl-0 = <&rgb_pad_pins>;
 631         status = "okay";
 632
 633         dc_out: port {
 634                 #address-cells = <1>;
 635                 #size-cells = <0>;
 636                 dc_out_dpi0: endpoint@0 {
 637                         reg = <0>;
 638                         remote-endpoint = <&hdmi_input0>;
 639                 };
 640                 dc_out_dpi1: endpoint@1 {
 641                         reg = <1>;
 642                         remote-endpoint = <&hdmi_in_lcdc>;
 643                 };
 644         };
 645 };
 646
 647 &hdmi_output {
 648         status = "okay";
 649
 650         ports {
 651                 #address-cells = <1>;
 652                 #size-cells = <0>;
 653                 port@0 {
 654                         #address-cells = <1>;
 655                         #size-cells = <0>;
 656                         reg = <0>;
 657                         hdmi_input0:endpoint@0 {
 658                                 reg = <0>;
 659                                 remote-endpoint = <&dc_out_dpi0>;
 660                         };
 661                 };
 662                 port@1 {
 663                         reg = <1>;
 664                         hdmi_out:endpoint {
 665                                 remote-endpoint = <&tda998x_0_input>;
 666                         };
 667                 };
 668         };
 669 };
 670
 671 &co_process {
 672         status = "okay";
 673 };
 674
 675 &usbdrd30 {
 676         pinctrl-names = "default";
 677         pinctrl-0 = <&usb_pins>;
 678         dr_mode = "host"; /*host or peripheral*/
 679         status = "okay";
 680 };
 681
 682 &xrp {
 683         status = "okay";
 684 };