1 menu "RISC-V architecture"
11 config TARGET_AX25_AE350
12 bool "Support ax25-ae350"
14 config TARGET_QEMU_VIRT
15 bool "Support QEMU Virt Board"
17 config TARGET_SIFIVE_FU540
18 bool "Support SiFive FU540 Board"
22 # board-specific options below
23 source "board/AndesTech/ax25-ae350/Kconfig"
24 source "board/emulation/qemu-riscv/Kconfig"
25 source "board/sifive/fu540/Kconfig"
27 # platform-specific options below
28 source "arch/riscv/cpu/ax25/Kconfig"
29 source "arch/riscv/cpu/generic/Kconfig"
31 # architecture-specific options below
41 Choose this option to target the RV32I base integer instruction set.
48 Choose this option to target the RV64I base integer instruction set.
57 bool "medium low code model"
59 U-Boot and its statically defined symbols must lie within a single 2 GiB
60 address range and must lie between absolute addresses -2 GiB and +2 GiB.
63 bool "medium any code model"
65 U-Boot and its statically defined symbols must be within any single 2 GiB
77 Choose this option to build U-Boot for RISC-V M-Mode.
82 Choose this option to build U-Boot for RISC-V S-Mode.
87 bool "Emit compressed instructions"
90 Adds "C" to the ISA subsets that the toolchain is allowed to emit
91 when building U-Boot, which results in compressed instructions in the
105 depends on RISCV_MMODE
109 The SiFive CLINT block holds memory-mapped control and status registers
110 associated with software and timer interrupts.
114 depends on RISCV_MMODE
118 The Andes PLIC block holds memory-mapped claim and pending registers
119 associated with software interrupt.
123 default y if RISCV_SMODE
125 The provides the riscv_get_time() API that is implemented using the
126 standard rdtime instruction. This is the case for S-mode U-Boot, and
127 is useful for processors that support rdtime in M-mode too.
129 config SYS_MALLOC_F_LEN
133 bool "Symmetric Multi-Processing"
135 This enables support for systems with more than one CPU. If
136 you say N here, U-Boot will run on single and multiprocessor
137 machines, but will use only one CPU of a multiprocessor
138 machine. If you say Y here, U-Boot will run on many, but not
139 all, single processor machines.
142 int "Maximum number of CPUs (2-32)"
147 On multiprocessor machines, U-Boot sets up a stack for each CPU.
148 Stack memory is pre-allocated. U-Boot must therefore know the
149 maximum number of CPUs that may be present.
153 default y if RISCV_SMODE
156 config STACK_SIZE_SHIFT