2 * Routines providing a simple monitor for use on the PowerMac.
4 * Copyright (C) 1996-2005 Paul Mackerras.
5 * Copyright (C) 2001 PPC64 Team, IBM Corp
6 * Copyrignt (C) 2006 Michael Ellerman, IBM Corp
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License
10 * as published by the Free Software Foundation; either version
11 * 2 of the License, or (at your option) any later version.
14 #include <linux/kernel.h>
15 #include <linux/errno.h>
16 #include <linux/sched/signal.h>
17 #include <linux/smp.h>
19 #include <linux/reboot.h>
20 #include <linux/delay.h>
21 #include <linux/kallsyms.h>
22 #include <linux/kmsg_dump.h>
23 #include <linux/cpumask.h>
24 #include <linux/export.h>
25 #include <linux/sysrq.h>
26 #include <linux/interrupt.h>
27 #include <linux/irq.h>
28 #include <linux/bug.h>
29 #include <linux/nmi.h>
30 #include <linux/ctype.h>
32 #include <asm/debugfs.h>
33 #include <asm/ptrace.h>
35 #include <asm/string.h>
37 #include <asm/machdep.h>
39 #include <asm/processor.h>
40 #include <asm/pgtable.h>
42 #include <asm/mmu_context.h>
43 #include <asm/cputable.h>
45 #include <asm/sstep.h>
46 #include <asm/irq_regs.h>
48 #include <asm/spu_priv1.h>
49 #include <asm/setjmp.h>
51 #include <asm/debug.h>
52 #include <asm/hw_breakpoint.h>
55 #include <asm/firmware.h>
56 #include <asm/code-patching.h>
59 #include <asm/hvcall.h>
63 #if defined(CONFIG_PPC_SPLPAR)
64 #include <asm/plpar_wrappers.h>
66 static inline long plapr_set_ciabr(unsigned long ciabr) {return 0; };
73 static cpumask_t cpus_in_xmon = CPU_MASK_NONE;
74 static unsigned long xmon_taken = 1;
75 static int xmon_owner;
79 #endif /* CONFIG_SMP */
81 static unsigned long in_xmon __read_mostly = 0;
82 static int xmon_on = IS_ENABLED(CONFIG_XMON_DEFAULT);
84 static unsigned long adrs;
86 #define MAX_DUMP (128 * 1024)
87 static unsigned long ndump = 64;
88 static unsigned long nidump = 16;
89 static unsigned long ncsum = 4096;
91 static char tmpstr[128];
92 static int tracing_enabled;
94 static long bus_error_jmp[JMP_BUF_LEN];
95 static int catch_memory_errors;
96 static int catch_spr_faults;
97 static long *xmon_fault_jmp[NR_CPUS];
99 /* Breakpoint stuff */
101 unsigned long address;
102 unsigned int instr[2];
108 /* Bits in bpt.enabled */
114 static struct bpt bpts[NBPTS];
115 static struct bpt dabr;
116 static struct bpt *iabr;
117 static unsigned bpinstr = 0x7fe00008; /* trap */
119 #define BP_NUM(bp) ((bp) - bpts + 1)
122 static int cmds(struct pt_regs *);
123 static int mread(unsigned long, void *, int);
124 static int mwrite(unsigned long, void *, int);
125 static int handle_fault(struct pt_regs *);
126 static void byterev(unsigned char *, int);
127 static void memex(void);
128 static int bsesc(void);
129 static void dump(void);
130 static void prdump(unsigned long, long);
131 static int ppc_inst_dump(unsigned long, long, int);
132 static void dump_log_buf(void);
134 #ifdef CONFIG_PPC_POWERNV
135 static void dump_opal_msglog(void);
137 static inline void dump_opal_msglog(void)
139 printf("Machine is not running OPAL firmware.\n");
143 static void backtrace(struct pt_regs *);
144 static void excprint(struct pt_regs *);
145 static void prregs(struct pt_regs *);
146 static void memops(int);
147 static void memlocate(void);
148 static void memzcan(void);
149 static void memdiffs(unsigned char *, unsigned char *, unsigned, unsigned);
151 int scanhex(unsigned long *valp);
152 static void scannl(void);
153 static int hexdigit(int);
154 void getstring(char *, int);
155 static void flush_input(void);
156 static int inchar(void);
157 static void take_input(char *);
158 static int read_spr(int, unsigned long *);
159 static void write_spr(int, unsigned long);
160 static void super_regs(void);
161 static void remove_bpts(void);
162 static void insert_bpts(void);
163 static void remove_cpu_bpts(void);
164 static void insert_cpu_bpts(void);
165 static struct bpt *at_breakpoint(unsigned long pc);
166 static struct bpt *in_breakpoint_table(unsigned long pc, unsigned long *offp);
167 static int do_step(struct pt_regs *);
168 static void bpt_cmds(void);
169 static void cacheflush(void);
170 static int cpu_cmd(void);
171 static void csum(void);
172 static void bootcmds(void);
173 static void proccall(void);
174 static void show_tasks(void);
175 void dump_segments(void);
176 static void symbol_lookup(void);
177 static void xmon_show_stack(unsigned long sp, unsigned long lr,
179 static void xmon_print_symbol(unsigned long address, const char *mid,
181 static const char *getvecname(unsigned long vec);
183 static int do_spu_cmd(void);
186 static void dump_tlb_44x(void);
188 #ifdef CONFIG_PPC_BOOK3E
189 static void dump_tlb_book3e(void);
198 #ifdef __LITTLE_ENDIAN__
199 #define GETWORD(v) (((v)[3] << 24) + ((v)[2] << 16) + ((v)[1] << 8) + (v)[0])
201 #define GETWORD(v) (((v)[0] << 24) + ((v)[1] << 16) + ((v)[2] << 8) + (v)[3])
204 static char *help_string = "\
206 b show breakpoints\n\
207 bd set data breakpoint\n\
208 bi set instruction breakpoint\n\
209 bc clear breakpoint\n"
212 c print cpus stopped in xmon\n\
213 c# try to switch to cpu number h (in hex)\n"
218 d1 dump 1 byte values\n\
219 d2 dump 2 byte values\n\
220 d4 dump 4 byte values\n\
221 d8 dump 8 byte values\n\
222 di dump instructions\n\
223 df dump float values\n\
224 dd dump double values\n\
225 dl dump the kernel log buffer\n"
226 #ifdef CONFIG_PPC_POWERNV
228 do dump the OPAL message log\n"
232 dp[#] dump paca for current cpu, or cpu #\n\
233 dpa dump paca for all possible cpus\n"
236 dr dump stream of raw bytes\n\
237 dt dump the tracing buffers (uses printk)\n\
238 dtc dump the tracing buffers for current CPU (uses printk)\n\
240 #ifdef CONFIG_PPC_POWERNV
241 " dx# dump xive on CPU #\n\
242 dxi# dump xive irq state #\n\
243 dxa dump xive on all CPUs\n"
245 " e print exception information\n\
247 la lookup symbol+offset of specified address\n\
248 ls lookup address of specified symbol\n\
249 m examine/change memory\n\
250 mm move a block of memory\n\
251 ms set a block of memory\n\
252 md compare two blocks of memory\n\
253 ml locate a block of memory\n\
254 mz zero a block of memory\n\
255 mi show information about memory allocation\n\
256 p call a procedure\n\
257 P list processes/tasks\n\
260 #ifdef CONFIG_SPU_BASE
261 " ss stop execution on all spus\n\
262 sr restore execution on stopped spus\n\
263 sf # dump spu fields for spu # (in hex)\n\
264 sd # dump spu local store for spu # (in hex)\n\
265 sdi # disassemble spu local store for spu # (in hex)\n"
267 " S print special registers\n\
270 Sw #v write v to SPR #\n\
272 x exit monitor and recover\n\
273 X exit monitor and don't recover\n"
274 #if defined(CONFIG_PPC64) && !defined(CONFIG_PPC_BOOK3E)
275 " u dump segment table or SLB\n"
276 #elif defined(CONFIG_PPC_STD_MMU_32)
277 " u dump segment registers\n"
278 #elif defined(CONFIG_44x) || defined(CONFIG_PPC_BOOK3E)
282 " # n limit output to n lines per page (for dp, dpa, dl)\n"
287 static struct pt_regs *xmon_regs;
289 static inline void sync(void)
291 asm volatile("sync; isync");
294 static inline void store_inst(void *p)
296 asm volatile ("dcbst 0,%0; sync; icbi 0,%0; isync" : : "r" (p));
299 static inline void cflush(void *p)
301 asm volatile ("dcbf 0,%0; icbi 0,%0" : : "r" (p));
304 static inline void cinval(void *p)
306 asm volatile ("dcbi 0,%0; icbi 0,%0" : : "r" (p));
310 * write_ciabr() - write the CIABR SPR
311 * @ciabr: The value to write.
313 * This function writes a value to the CIARB register either directly
314 * through mtspr instruction if the kernel is in HV privilege mode or
315 * call a hypervisor function to achieve the same in case the kernel
316 * is in supervisor privilege mode.
318 static void write_ciabr(unsigned long ciabr)
320 if (!cpu_has_feature(CPU_FTR_ARCH_207S))
323 if (cpu_has_feature(CPU_FTR_HVMODE)) {
324 mtspr(SPRN_CIABR, ciabr);
327 plapr_set_ciabr(ciabr);
331 * set_ciabr() - set the CIABR
332 * @addr: The value to set.
334 * This function sets the correct privilege value into the the HW
335 * breakpoint address before writing it up in the CIABR register.
337 static void set_ciabr(unsigned long addr)
341 if (cpu_has_feature(CPU_FTR_HVMODE))
342 addr |= CIABR_PRIV_HYPER;
344 addr |= CIABR_PRIV_SUPER;
349 * Disable surveillance (the service processor watchdog function)
350 * while we are in xmon.
351 * XXX we should re-enable it when we leave. :)
353 #define SURVEILLANCE_TOKEN 9000
355 static inline void disable_surveillance(void)
357 #ifdef CONFIG_PPC_PSERIES
358 /* Since this can't be a module, args should end up below 4GB. */
359 static struct rtas_args args;
363 * At this point we have got all the cpus we can into
364 * xmon, so there is hopefully no other cpu calling RTAS
365 * at the moment, even though we don't take rtas.lock.
366 * If we did try to take rtas.lock there would be a
367 * real possibility of deadlock.
369 token = rtas_token("set-indicator");
370 if (token == RTAS_UNKNOWN_SERVICE)
373 rtas_call_unlocked(&args, token, 3, 1, NULL, SURVEILLANCE_TOKEN, 0, 0);
375 #endif /* CONFIG_PPC_PSERIES */
379 static int xmon_speaker;
381 static void get_output_lock(void)
383 int me = smp_processor_id() + 0x100;
384 int last_speaker = 0, prev;
387 if (xmon_speaker == me)
391 last_speaker = cmpxchg(&xmon_speaker, 0, me);
392 if (last_speaker == 0)
396 * Wait a full second for the lock, we might be on a slow
397 * console, but check every 100us.
400 while (xmon_speaker == last_speaker) {
406 /* hostile takeover */
407 prev = cmpxchg(&xmon_speaker, last_speaker, me);
408 if (prev == last_speaker)
415 static void release_output_lock(void)
420 int cpus_are_in_xmon(void)
422 return !cpumask_empty(&cpus_in_xmon);
425 static bool wait_for_other_cpus(int ncpus)
427 unsigned long timeout;
429 /* We wait for 2s, which is a metric "little while" */
430 for (timeout = 20000; timeout != 0; --timeout) {
431 if (cpumask_weight(&cpus_in_xmon) >= ncpus)
439 #endif /* CONFIG_SMP */
441 static inline int unrecoverable_excp(struct pt_regs *regs)
443 #if defined(CONFIG_4xx) || defined(CONFIG_PPC_BOOK3E)
444 /* We have no MSR_RI bit on 4xx or Book3e, so we simply return false */
447 return ((regs->msr & MSR_RI) == 0);
451 static int xmon_core(struct pt_regs *regs, int fromipi)
455 long recurse_jmp[JMP_BUF_LEN];
456 unsigned long offset;
463 local_irq_save(flags);
466 tracing_enabled = tracing_is_on();
469 bp = in_breakpoint_table(regs->nip, &offset);
471 regs->nip = bp->address + offset;
472 atomic_dec(&bp->ref_count);
478 cpu = smp_processor_id();
479 if (cpumask_test_cpu(cpu, &cpus_in_xmon)) {
481 * We catch SPR read/write faults here because the 0x700, 0xf60
482 * etc. handlers don't call debugger_fault_handler().
484 if (catch_spr_faults)
485 longjmp(bus_error_jmp, 1);
488 printf("cpu 0x%x: Exception %lx %s in xmon, "
489 "returning to main loop\n",
490 cpu, regs->trap, getvecname(TRAP(regs)));
491 release_output_lock();
492 longjmp(xmon_fault_jmp[cpu], 1);
495 if (setjmp(recurse_jmp) != 0) {
496 if (!in_xmon || !xmon_gate) {
498 printf("xmon: WARNING: bad recursive fault "
499 "on cpu 0x%x\n", cpu);
500 release_output_lock();
503 secondary = !(xmon_taken && cpu == xmon_owner);
507 xmon_fault_jmp[cpu] = recurse_jmp;
510 if ((regs->msr & (MSR_IR|MSR_PR|MSR_64BIT)) == (MSR_IR|MSR_64BIT))
511 bp = at_breakpoint(regs->nip);
512 if (bp || unrecoverable_excp(regs))
519 printf("cpu 0x%x stopped at breakpoint 0x%lx (",
521 xmon_print_symbol(regs->nip, " ", ")\n");
523 if (unrecoverable_excp(regs))
524 printf("WARNING: exception is not recoverable, "
526 release_output_lock();
529 cpumask_set_cpu(cpu, &cpus_in_xmon);
534 while (secondary && !xmon_gate) {
540 secondary = test_and_set_bit(0, &in_xmon);
543 touch_nmi_watchdog();
547 if (!secondary && !xmon_gate) {
548 /* we are the first cpu to come in */
549 /* interrupt other cpu(s) */
550 int ncpus = num_online_cpus();
556 * A system reset (trap == 0x100) can be triggered on
557 * all CPUs, so when we come in via 0x100 try waiting
558 * for the other CPUs to come in before we send the
559 * debugger break (IPI). This is similar to
560 * crash_kexec_secondary().
562 if (TRAP(regs) != 0x100 || !wait_for_other_cpus(ncpus))
563 smp_send_debugger_break();
565 wait_for_other_cpus(ncpus);
568 disable_surveillance();
569 /* for breakpoint or single step, print the current instr. */
570 if (bp || TRAP(regs) == 0xd00)
571 ppc_inst_dump(regs->nip, 1, 0);
572 printf("enter ? for help\n");
576 touch_nmi_watchdog();
583 if (cpu == xmon_owner) {
584 if (!test_and_set_bit(0, &xmon_taken)) {
590 while (cpu == xmon_owner)
594 touch_nmi_watchdog();
605 /* have switched to some other cpu */
610 cpumask_clear_cpu(cpu, &cpus_in_xmon);
611 xmon_fault_jmp[cpu] = NULL;
613 /* UP is simple... */
615 printf("Exception %lx %s in xmon, returning to main loop\n",
616 regs->trap, getvecname(TRAP(regs)));
617 longjmp(xmon_fault_jmp[0], 1);
619 if (setjmp(recurse_jmp) == 0) {
620 xmon_fault_jmp[0] = recurse_jmp;
624 bp = at_breakpoint(regs->nip);
626 printf("Stopped at breakpoint %lx (", BP_NUM(bp));
627 xmon_print_symbol(regs->nip, " ", ")\n");
629 if (unrecoverable_excp(regs))
630 printf("WARNING: exception is not recoverable, "
633 disable_surveillance();
634 /* for breakpoint or single step, print the current instr. */
635 if (bp || TRAP(regs) == 0xd00)
636 ppc_inst_dump(regs->nip, 1, 0);
637 printf("enter ? for help\n");
647 if (regs->msr & MSR_DE) {
648 bp = at_breakpoint(regs->nip);
650 regs->nip = (unsigned long) &bp->instr[0];
651 atomic_inc(&bp->ref_count);
655 if ((regs->msr & (MSR_IR|MSR_PR|MSR_64BIT)) == (MSR_IR|MSR_64BIT)) {
656 bp = at_breakpoint(regs->nip);
658 int stepped = emulate_step(regs, bp->instr[0]);
660 regs->nip = (unsigned long) &bp->instr[0];
661 atomic_inc(&bp->ref_count);
662 } else if (stepped < 0) {
663 printf("Couldn't single-step %s instruction\n",
664 (IS_RFID(bp->instr[0])? "rfid": "mtmsrd"));
671 touch_nmi_watchdog();
672 local_irq_restore(flags);
674 return cmd != 'X' && cmd != EOF;
677 int xmon(struct pt_regs *excp)
682 ppc_save_regs(®s);
686 return xmon_core(excp, 0);
690 irqreturn_t xmon_irq(int irq, void *d)
693 local_irq_save(flags);
694 printf("Keyboard interrupt\n");
695 xmon(get_irq_regs());
696 local_irq_restore(flags);
700 static int xmon_bpt(struct pt_regs *regs)
703 unsigned long offset;
705 if ((regs->msr & (MSR_IR|MSR_PR|MSR_64BIT)) != (MSR_IR|MSR_64BIT))
708 /* Are we at the trap at bp->instr[1] for some bp? */
709 bp = in_breakpoint_table(regs->nip, &offset);
710 if (bp != NULL && offset == 4) {
711 regs->nip = bp->address + 4;
712 atomic_dec(&bp->ref_count);
716 /* Are we at a breakpoint? */
717 bp = at_breakpoint(regs->nip);
726 static int xmon_sstep(struct pt_regs *regs)
734 static int xmon_break_match(struct pt_regs *regs)
736 if ((regs->msr & (MSR_IR|MSR_PR|MSR_64BIT)) != (MSR_IR|MSR_64BIT))
738 if (dabr.enabled == 0)
744 static int xmon_iabr_match(struct pt_regs *regs)
746 if ((regs->msr & (MSR_IR|MSR_PR|MSR_64BIT)) != (MSR_IR|MSR_64BIT))
754 static int xmon_ipi(struct pt_regs *regs)
757 if (in_xmon && !cpumask_test_cpu(smp_processor_id(), &cpus_in_xmon))
763 static int xmon_fault_handler(struct pt_regs *regs)
766 unsigned long offset;
768 if (in_xmon && catch_memory_errors)
769 handle_fault(regs); /* doesn't return */
771 if ((regs->msr & (MSR_IR|MSR_PR|MSR_64BIT)) == (MSR_IR|MSR_64BIT)) {
772 bp = in_breakpoint_table(regs->nip, &offset);
774 regs->nip = bp->address + offset;
775 atomic_dec(&bp->ref_count);
782 static struct bpt *at_breakpoint(unsigned long pc)
788 for (i = 0; i < NBPTS; ++i, ++bp)
789 if (bp->enabled && pc == bp->address)
794 static struct bpt *in_breakpoint_table(unsigned long nip, unsigned long *offp)
798 off = nip - (unsigned long) bpts;
799 if (off >= sizeof(bpts))
801 off %= sizeof(struct bpt);
802 if (off != offsetof(struct bpt, instr[0])
803 && off != offsetof(struct bpt, instr[1]))
805 *offp = off - offsetof(struct bpt, instr[0]);
806 return (struct bpt *) (nip - off);
809 static struct bpt *new_breakpoint(unsigned long a)
814 bp = at_breakpoint(a);
818 for (bp = bpts; bp < &bpts[NBPTS]; ++bp) {
819 if (!bp->enabled && atomic_read(&bp->ref_count) == 0) {
821 bp->instr[1] = bpinstr;
822 store_inst(&bp->instr[1]);
827 printf("Sorry, no free breakpoints. Please clear one first.\n");
831 static void insert_bpts(void)
837 for (i = 0; i < NBPTS; ++i, ++bp) {
838 if ((bp->enabled & (BP_TRAP|BP_CIABR)) == 0)
840 if (mread(bp->address, &bp->instr[0], 4) != 4) {
841 printf("Couldn't read instruction at %lx, "
842 "disabling breakpoint there\n", bp->address);
846 if (IS_MTMSRD(bp->instr[0]) || IS_RFID(bp->instr[0])) {
847 printf("Breakpoint at %lx is on an mtmsrd or rfid "
848 "instruction, disabling it\n", bp->address);
852 store_inst(&bp->instr[0]);
853 if (bp->enabled & BP_CIABR)
855 if (patch_instruction((unsigned int *)bp->address,
857 printf("Couldn't write instruction at %lx, "
858 "disabling breakpoint there\n", bp->address);
859 bp->enabled &= ~BP_TRAP;
862 store_inst((void *)bp->address);
866 static void insert_cpu_bpts(void)
868 struct arch_hw_breakpoint brk;
871 brk.address = dabr.address;
872 brk.type = (dabr.enabled & HW_BRK_TYPE_DABR) | HW_BRK_TYPE_PRIV_ALL;
874 __set_breakpoint(&brk);
878 set_ciabr(iabr->address);
881 static void remove_bpts(void)
888 for (i = 0; i < NBPTS; ++i, ++bp) {
889 if ((bp->enabled & (BP_TRAP|BP_CIABR)) != BP_TRAP)
891 if (mread(bp->address, &instr, 4) == 4
893 && patch_instruction(
894 (unsigned int *)bp->address, bp->instr[0]) != 0)
895 printf("Couldn't remove breakpoint at %lx\n",
898 store_inst((void *)bp->address);
902 static void remove_cpu_bpts(void)
904 hw_breakpoint_disable();
908 static void set_lpp_cmd(void)
912 if (!scanhex(&lpp)) {
913 printf("Invalid number.\n");
916 xmon_set_pagination_lpp(lpp);
918 /* Command interpreting routine */
919 static char *last_cmd;
922 cmds(struct pt_regs *excp)
929 xmon_show_stack(excp->gpr[1], excp->link, excp->nip);
933 printf("%x:", smp_processor_id());
934 #endif /* CONFIG_SMP */
940 if (last_cmd == NULL)
942 take_input(last_cmd);
976 prregs(excp); /* print regs */
991 if (do_spu_cmd() == 0)
1002 printf(" <no input ...>\n");
1006 xmon_puts(help_string);
1030 #ifdef CONFIG_PPC_STD_MMU
1034 #elif defined(CONFIG_44x)
1038 #elif defined(CONFIG_PPC_BOOK3E)
1044 printf("Unrecognized command: ");
1046 if (' ' < cmd && cmd <= '~')
1049 printf("\\x%x", cmd);
1051 } while (cmd != '\n');
1052 printf(" (type ? for help)\n");
1059 static int do_step(struct pt_regs *regs)
1061 regs->msr |= MSR_DE;
1062 mtspr(SPRN_DBCR0, mfspr(SPRN_DBCR0) | DBCR0_IC | DBCR0_IDM);
1067 * Step a single instruction.
1068 * Some instructions we emulate, others we execute with MSR_SE set.
1070 static int do_step(struct pt_regs *regs)
1075 /* check we are in 64-bit kernel mode, translation enabled */
1076 if ((regs->msr & (MSR_64BIT|MSR_PR|MSR_IR)) == (MSR_64BIT|MSR_IR)) {
1077 if (mread(regs->nip, &instr, 4) == 4) {
1078 stepped = emulate_step(regs, instr);
1080 printf("Couldn't single-step %s instruction\n",
1081 (IS_RFID(instr)? "rfid": "mtmsrd"));
1085 regs->trap = 0xd00 | (regs->trap & 1);
1086 printf("stepped to ");
1087 xmon_print_symbol(regs->nip, " ", "\n");
1088 ppc_inst_dump(regs->nip, 1, 0);
1093 regs->msr |= MSR_SE;
1098 static void bootcmds(void)
1104 ppc_md.restart(NULL);
1105 else if (cmd == 'h')
1107 else if (cmd == 'p')
1112 static int cpu_cmd(void)
1115 unsigned long cpu, first_cpu, last_cpu;
1118 if (!scanhex(&cpu)) {
1119 /* print cpus waiting or in xmon */
1120 printf("cpus stopped:");
1121 last_cpu = first_cpu = NR_CPUS;
1122 for_each_possible_cpu(cpu) {
1123 if (cpumask_test_cpu(cpu, &cpus_in_xmon)) {
1124 if (cpu == last_cpu + 1) {
1127 if (last_cpu != first_cpu)
1128 printf("-0x%lx", last_cpu);
1129 last_cpu = first_cpu = cpu;
1130 printf(" 0x%lx", cpu);
1134 if (last_cpu != first_cpu)
1135 printf("-0x%lx", last_cpu);
1139 /* try to switch to cpu specified */
1140 if (!cpumask_test_cpu(cpu, &cpus_in_xmon)) {
1141 printf("cpu 0x%x isn't in xmon\n", cpu);
1148 while (!xmon_taken) {
1149 if (--timeout == 0) {
1150 if (test_and_set_bit(0, &xmon_taken))
1152 /* take control back */
1154 xmon_owner = smp_processor_id();
1155 printf("cpu 0x%x didn't take control\n", cpu);
1163 #endif /* CONFIG_SMP */
1166 static unsigned short fcstab[256] = {
1167 0x0000, 0x1189, 0x2312, 0x329b, 0x4624, 0x57ad, 0x6536, 0x74bf,
1168 0x8c48, 0x9dc1, 0xaf5a, 0xbed3, 0xca6c, 0xdbe5, 0xe97e, 0xf8f7,
1169 0x1081, 0x0108, 0x3393, 0x221a, 0x56a5, 0x472c, 0x75b7, 0x643e,
1170 0x9cc9, 0x8d40, 0xbfdb, 0xae52, 0xdaed, 0xcb64, 0xf9ff, 0xe876,
1171 0x2102, 0x308b, 0x0210, 0x1399, 0x6726, 0x76af, 0x4434, 0x55bd,
1172 0xad4a, 0xbcc3, 0x8e58, 0x9fd1, 0xeb6e, 0xfae7, 0xc87c, 0xd9f5,
1173 0x3183, 0x200a, 0x1291, 0x0318, 0x77a7, 0x662e, 0x54b5, 0x453c,
1174 0xbdcb, 0xac42, 0x9ed9, 0x8f50, 0xfbef, 0xea66, 0xd8fd, 0xc974,
1175 0x4204, 0x538d, 0x6116, 0x709f, 0x0420, 0x15a9, 0x2732, 0x36bb,
1176 0xce4c, 0xdfc5, 0xed5e, 0xfcd7, 0x8868, 0x99e1, 0xab7a, 0xbaf3,
1177 0x5285, 0x430c, 0x7197, 0x601e, 0x14a1, 0x0528, 0x37b3, 0x263a,
1178 0xdecd, 0xcf44, 0xfddf, 0xec56, 0x98e9, 0x8960, 0xbbfb, 0xaa72,
1179 0x6306, 0x728f, 0x4014, 0x519d, 0x2522, 0x34ab, 0x0630, 0x17b9,
1180 0xef4e, 0xfec7, 0xcc5c, 0xddd5, 0xa96a, 0xb8e3, 0x8a78, 0x9bf1,
1181 0x7387, 0x620e, 0x5095, 0x411c, 0x35a3, 0x242a, 0x16b1, 0x0738,
1182 0xffcf, 0xee46, 0xdcdd, 0xcd54, 0xb9eb, 0xa862, 0x9af9, 0x8b70,
1183 0x8408, 0x9581, 0xa71a, 0xb693, 0xc22c, 0xd3a5, 0xe13e, 0xf0b7,
1184 0x0840, 0x19c9, 0x2b52, 0x3adb, 0x4e64, 0x5fed, 0x6d76, 0x7cff,
1185 0x9489, 0x8500, 0xb79b, 0xa612, 0xd2ad, 0xc324, 0xf1bf, 0xe036,
1186 0x18c1, 0x0948, 0x3bd3, 0x2a5a, 0x5ee5, 0x4f6c, 0x7df7, 0x6c7e,
1187 0xa50a, 0xb483, 0x8618, 0x9791, 0xe32e, 0xf2a7, 0xc03c, 0xd1b5,
1188 0x2942, 0x38cb, 0x0a50, 0x1bd9, 0x6f66, 0x7eef, 0x4c74, 0x5dfd,
1189 0xb58b, 0xa402, 0x9699, 0x8710, 0xf3af, 0xe226, 0xd0bd, 0xc134,
1190 0x39c3, 0x284a, 0x1ad1, 0x0b58, 0x7fe7, 0x6e6e, 0x5cf5, 0x4d7c,
1191 0xc60c, 0xd785, 0xe51e, 0xf497, 0x8028, 0x91a1, 0xa33a, 0xb2b3,
1192 0x4a44, 0x5bcd, 0x6956, 0x78df, 0x0c60, 0x1de9, 0x2f72, 0x3efb,
1193 0xd68d, 0xc704, 0xf59f, 0xe416, 0x90a9, 0x8120, 0xb3bb, 0xa232,
1194 0x5ac5, 0x4b4c, 0x79d7, 0x685e, 0x1ce1, 0x0d68, 0x3ff3, 0x2e7a,
1195 0xe70e, 0xf687, 0xc41c, 0xd595, 0xa12a, 0xb0a3, 0x8238, 0x93b1,
1196 0x6b46, 0x7acf, 0x4854, 0x59dd, 0x2d62, 0x3ceb, 0x0e70, 0x1ff9,
1197 0xf78f, 0xe606, 0xd49d, 0xc514, 0xb1ab, 0xa022, 0x92b9, 0x8330,
1198 0x7bc7, 0x6a4e, 0x58d5, 0x495c, 0x3de3, 0x2c6a, 0x1ef1, 0x0f78
1201 #define FCS(fcs, c) (((fcs) >> 8) ^ fcstab[((fcs) ^ (c)) & 0xff])
1210 if (!scanhex(&adrs))
1212 if (!scanhex(&ncsum))
1215 for (i = 0; i < ncsum; ++i) {
1216 if (mread(adrs+i, &v, 1) == 0) {
1217 printf("csum stopped at "REG"\n", adrs+i);
1222 printf("%x\n", fcs);
1226 * Check if this is a suitable place to put a breakpoint.
1228 static long check_bp_loc(unsigned long addr)
1233 if (!is_kernel_addr(addr)) {
1234 printf("Breakpoints may only be placed at kernel addresses\n");
1237 if (!mread(addr, &instr, sizeof(instr))) {
1238 printf("Can't read instruction at address %lx\n", addr);
1241 if (IS_MTMSRD(instr) || IS_RFID(instr)) {
1242 printf("Breakpoints may not be placed on mtmsrd or rfid "
1249 static char *breakpoint_help_string =
1250 "Breakpoint command usage:\n"
1251 "b show breakpoints\n"
1252 "b <addr> [cnt] set breakpoint at given instr addr\n"
1253 "bc clear all breakpoints\n"
1254 "bc <n/addr> clear breakpoint number n or at addr\n"
1255 "bi <addr> [cnt] set hardware instr breakpoint (POWER8 only)\n"
1256 "bd <addr> [cnt] set hardware data breakpoint\n"
1269 #ifndef CONFIG_PPC_8xx
1270 static const char badaddr[] = "Only kernel addresses are permitted for breakpoints\n";
1272 case 'd': /* bd - hardware data breakpoint */
1277 else if (cmd == 'w')
1283 if (scanhex(&dabr.address)) {
1284 if (!is_kernel_addr(dabr.address)) {
1288 dabr.address &= ~HW_BRK_TYPE_DABR;
1289 dabr.enabled = mode | BP_DABR;
1293 case 'i': /* bi - hardware instr breakpoint */
1294 if (!cpu_has_feature(CPU_FTR_ARCH_207S)) {
1295 printf("Hardware instruction breakpoint "
1296 "not supported on this cpu\n");
1300 iabr->enabled &= ~BP_CIABR;
1305 if (!check_bp_loc(a))
1307 bp = new_breakpoint(a);
1309 bp->enabled |= BP_CIABR;
1317 /* clear all breakpoints */
1318 for (i = 0; i < NBPTS; ++i)
1319 bpts[i].enabled = 0;
1322 printf("All breakpoints cleared\n");
1326 if (a <= NBPTS && a >= 1) {
1327 /* assume a breakpoint number */
1328 bp = &bpts[a-1]; /* bp nums are 1 based */
1330 /* assume a breakpoint address */
1331 bp = at_breakpoint(a);
1333 printf("No breakpoint at %lx\n", a);
1338 printf("Cleared breakpoint %lx (", BP_NUM(bp));
1339 xmon_print_symbol(bp->address, " ", ")\n");
1347 printf(breakpoint_help_string);
1352 /* print all breakpoints */
1353 printf(" type address\n");
1355 printf(" data "REG" [", dabr.address);
1356 if (dabr.enabled & 1)
1358 if (dabr.enabled & 2)
1362 for (bp = bpts; bp < &bpts[NBPTS]; ++bp) {
1365 printf("%2x %s ", BP_NUM(bp),
1366 (bp->enabled & BP_CIABR) ? "inst": "trap");
1367 xmon_print_symbol(bp->address, " ", "\n");
1372 if (!check_bp_loc(a))
1374 bp = new_breakpoint(a);
1376 bp->enabled |= BP_TRAP;
1381 /* Very cheap human name for vector lookup. */
1383 const char *getvecname(unsigned long vec)
1388 case 0x100: ret = "(System Reset)"; break;
1389 case 0x200: ret = "(Machine Check)"; break;
1390 case 0x300: ret = "(Data Access)"; break;
1392 if (radix_enabled())
1393 ret = "(Data Access Out of Range)";
1395 ret = "(Data SLB Access)";
1397 case 0x400: ret = "(Instruction Access)"; break;
1399 if (radix_enabled())
1400 ret = "(Instruction Access Out of Range)";
1402 ret = "(Instruction SLB Access)";
1404 case 0x500: ret = "(Hardware Interrupt)"; break;
1405 case 0x600: ret = "(Alignment)"; break;
1406 case 0x700: ret = "(Program Check)"; break;
1407 case 0x800: ret = "(FPU Unavailable)"; break;
1408 case 0x900: ret = "(Decrementer)"; break;
1409 case 0x980: ret = "(Hypervisor Decrementer)"; break;
1410 case 0xa00: ret = "(Doorbell)"; break;
1411 case 0xc00: ret = "(System Call)"; break;
1412 case 0xd00: ret = "(Single Step)"; break;
1413 case 0xe40: ret = "(Emulation Assist)"; break;
1414 case 0xe60: ret = "(HMI)"; break;
1415 case 0xe80: ret = "(Hypervisor Doorbell)"; break;
1416 case 0xf00: ret = "(Performance Monitor)"; break;
1417 case 0xf20: ret = "(Altivec Unavailable)"; break;
1418 case 0x1300: ret = "(Instruction Breakpoint)"; break;
1419 case 0x1500: ret = "(Denormalisation)"; break;
1420 case 0x1700: ret = "(Altivec Assist)"; break;
1426 static void get_function_bounds(unsigned long pc, unsigned long *startp,
1427 unsigned long *endp)
1429 unsigned long size, offset;
1432 *startp = *endp = 0;
1435 if (setjmp(bus_error_jmp) == 0) {
1436 catch_memory_errors = 1;
1438 name = kallsyms_lookup(pc, &size, &offset, NULL, tmpstr);
1440 *startp = pc - offset;
1441 *endp = pc - offset + size;
1445 catch_memory_errors = 0;
1448 #define LRSAVE_OFFSET (STACK_FRAME_LR_SAVE * sizeof(unsigned long))
1449 #define MARKER_OFFSET (STACK_FRAME_MARKER * sizeof(unsigned long))
1451 static void xmon_show_stack(unsigned long sp, unsigned long lr,
1454 int max_to_print = 64;
1456 unsigned long newsp;
1457 unsigned long marker;
1458 struct pt_regs regs;
1460 while (max_to_print--) {
1461 if (!is_kernel_addr(sp)) {
1463 printf("SP (%lx) is in userspace\n", sp);
1467 if (!mread(sp + LRSAVE_OFFSET, &ip, sizeof(unsigned long))
1468 || !mread(sp, &newsp, sizeof(unsigned long))) {
1469 printf("Couldn't read stack frame at %lx\n", sp);
1474 * For the first stack frame, try to work out if
1475 * LR and/or the saved LR value in the bottommost
1476 * stack frame are valid.
1478 if ((pc | lr) != 0) {
1479 unsigned long fnstart, fnend;
1480 unsigned long nextip;
1483 get_function_bounds(pc, &fnstart, &fnend);
1486 mread(newsp + LRSAVE_OFFSET, &nextip,
1487 sizeof(unsigned long));
1489 if (!is_kernel_addr(lr)
1490 || (fnstart <= lr && lr < fnend))
1492 } else if (lr == nextip) {
1494 } else if (is_kernel_addr(lr)
1495 && !(fnstart <= lr && lr < fnend)) {
1496 printf("[link register ] ");
1497 xmon_print_symbol(lr, " ", "\n");
1500 printf("["REG"] ", sp);
1501 xmon_print_symbol(ip, " ", " (unreliable)\n");
1506 printf("["REG"] ", sp);
1507 xmon_print_symbol(ip, " ", "\n");
1510 /* Look for "regshere" marker to see if this is
1511 an exception frame. */
1512 if (mread(sp + MARKER_OFFSET, &marker, sizeof(unsigned long))
1513 && marker == STACK_FRAME_REGS_MARKER) {
1514 if (mread(sp + STACK_FRAME_OVERHEAD, ®s, sizeof(regs))
1516 printf("Couldn't read registers at %lx\n",
1517 sp + STACK_FRAME_OVERHEAD);
1520 printf("--- Exception: %lx %s at ", regs.trap,
1521 getvecname(TRAP(®s)));
1524 xmon_print_symbol(pc, " ", "\n");
1534 static void backtrace(struct pt_regs *excp)
1539 xmon_show_stack(sp, 0, 0);
1541 xmon_show_stack(excp->gpr[1], excp->link, excp->nip);
1545 static void print_bug_trap(struct pt_regs *regs)
1548 const struct bug_entry *bug;
1551 if (regs->msr & MSR_PR)
1552 return; /* not in kernel */
1553 addr = regs->nip; /* address of trap instruction */
1554 if (!is_kernel_addr(addr))
1556 bug = find_bug(regs->nip);
1559 if (is_warning_bug(bug))
1562 #ifdef CONFIG_DEBUG_BUGVERBOSE
1563 printf("kernel BUG at %s:%u!\n",
1564 bug->file, bug->line);
1566 printf("kernel BUG at %p!\n", (void *)bug->bug_addr);
1568 #endif /* CONFIG_BUG */
1571 static void excprint(struct pt_regs *fp)
1576 printf("cpu 0x%x: ", smp_processor_id());
1577 #endif /* CONFIG_SMP */
1580 printf("Vector: %lx %s at [%lx]\n", fp->trap, getvecname(trap), fp);
1582 xmon_print_symbol(fp->nip, ": ", "\n");
1584 printf(" lr: ", fp->link);
1585 xmon_print_symbol(fp->link, ": ", "\n");
1587 printf(" sp: %lx\n", fp->gpr[1]);
1588 printf(" msr: %lx\n", fp->msr);
1590 if (trap == 0x300 || trap == 0x380 || trap == 0x600 || trap == 0x200) {
1591 printf(" dar: %lx\n", fp->dar);
1593 printf(" dsisr: %lx\n", fp->dsisr);
1596 printf(" current = 0x%lx\n", current);
1598 printf(" paca = 0x%lx\t softe: %d\t irq_happened: 0x%02x\n",
1599 local_paca, local_paca->soft_enabled, local_paca->irq_happened);
1602 printf(" pid = %ld, comm = %s\n",
1603 current->pid, current->comm);
1609 printf(linux_banner);
1612 static void prregs(struct pt_regs *fp)
1616 struct pt_regs regs;
1618 if (scanhex(&base)) {
1619 if (setjmp(bus_error_jmp) == 0) {
1620 catch_memory_errors = 1;
1622 regs = *(struct pt_regs *)base;
1626 catch_memory_errors = 0;
1627 printf("*** Error reading registers from "REG"\n",
1631 catch_memory_errors = 0;
1636 if (FULL_REGS(fp)) {
1637 for (n = 0; n < 16; ++n)
1638 printf("R%.2ld = "REG" R%.2ld = "REG"\n",
1639 n, fp->gpr[n], n+16, fp->gpr[n+16]);
1641 for (n = 0; n < 7; ++n)
1642 printf("R%.2ld = "REG" R%.2ld = "REG"\n",
1643 n, fp->gpr[n], n+7, fp->gpr[n+7]);
1646 for (n = 0; n < 32; ++n) {
1647 printf("R%.2d = %.8x%s", n, fp->gpr[n],
1648 (n & 3) == 3? "\n": " ");
1649 if (n == 12 && !FULL_REGS(fp)) {
1656 xmon_print_symbol(fp->nip, " ", "\n");
1657 if (TRAP(fp) != 0xc00 && cpu_has_feature(CPU_FTR_CFAR)) {
1659 xmon_print_symbol(fp->orig_gpr3, " ", "\n");
1662 xmon_print_symbol(fp->link, " ", "\n");
1663 printf("msr = "REG" cr = %.8lx\n", fp->msr, fp->ccr);
1664 printf("ctr = "REG" xer = "REG" trap = %4lx\n",
1665 fp->ctr, fp->xer, fp->trap);
1667 if (trap == 0x300 || trap == 0x380 || trap == 0x600)
1668 printf("dar = "REG" dsisr = %.8lx\n", fp->dar, fp->dsisr);
1671 static void cacheflush(void)
1674 unsigned long nflush;
1679 scanhex((void *)&adrs);
1684 nflush = (nflush + L1_CACHE_BYTES - 1) / L1_CACHE_BYTES;
1685 if (setjmp(bus_error_jmp) == 0) {
1686 catch_memory_errors = 1;
1690 for (; nflush > 0; --nflush, adrs += L1_CACHE_BYTES)
1691 cflush((void *) adrs);
1693 for (; nflush > 0; --nflush, adrs += L1_CACHE_BYTES)
1694 cinval((void *) adrs);
1697 /* wait a little while to see if we get a machine check */
1700 catch_memory_errors = 0;
1703 extern unsigned long xmon_mfspr(int spr, unsigned long default_value);
1704 extern void xmon_mtspr(int spr, unsigned long value);
1707 read_spr(int n, unsigned long *vp)
1709 unsigned long ret = -1UL;
1712 if (setjmp(bus_error_jmp) == 0) {
1713 catch_spr_faults = 1;
1716 ret = xmon_mfspr(n, *vp);
1722 catch_spr_faults = 0;
1728 write_spr(int n, unsigned long val)
1730 if (setjmp(bus_error_jmp) == 0) {
1731 catch_spr_faults = 1;
1738 printf("SPR 0x%03x (%4d) Faulted during write\n", n, n);
1740 catch_spr_faults = 0;
1743 static void dump_206_sprs(void)
1746 if (!cpu_has_feature(CPU_FTR_ARCH_206))
1749 /* Actually some of these pre-date 2.06, but whatevs */
1751 printf("srr0 = %.16lx srr1 = %.16lx dsisr = %.8x\n",
1752 mfspr(SPRN_SRR0), mfspr(SPRN_SRR1), mfspr(SPRN_DSISR));
1753 printf("dscr = %.16lx ppr = %.16lx pir = %.8x\n",
1754 mfspr(SPRN_DSCR), mfspr(SPRN_PPR), mfspr(SPRN_PIR));
1755 printf("amr = %.16lx uamor = %.16lx\n",
1756 mfspr(SPRN_AMR), mfspr(SPRN_UAMOR));
1758 if (!(mfmsr() & MSR_HV))
1761 printf("sdr1 = %.16lx hdar = %.16lx hdsisr = %.8x\n",
1762 mfspr(SPRN_SDR1), mfspr(SPRN_HDAR), mfspr(SPRN_HDSISR));
1763 printf("hsrr0 = %.16lx hsrr1 = %.16lx hdec = %.16lx\n",
1764 mfspr(SPRN_HSRR0), mfspr(SPRN_HSRR1), mfspr(SPRN_HDEC));
1765 printf("lpcr = %.16lx pcr = %.16lx lpidr = %.8x\n",
1766 mfspr(SPRN_LPCR), mfspr(SPRN_PCR), mfspr(SPRN_LPID));
1767 printf("hsprg0 = %.16lx hsprg1 = %.16lx amor = %.16lx\n",
1768 mfspr(SPRN_HSPRG0), mfspr(SPRN_HSPRG1), mfspr(SPRN_AMOR));
1769 printf("dabr = %.16lx dabrx = %.16lx\n",
1770 mfspr(SPRN_DABR), mfspr(SPRN_DABRX));
1774 static void dump_207_sprs(void)
1779 if (!cpu_has_feature(CPU_FTR_ARCH_207S))
1782 printf("dpdes = %.16lx tir = %.16lx cir = %.8x\n",
1783 mfspr(SPRN_DPDES), mfspr(SPRN_TIR), mfspr(SPRN_CIR));
1785 printf("fscr = %.16lx tar = %.16lx pspb = %.8x\n",
1786 mfspr(SPRN_FSCR), mfspr(SPRN_TAR), mfspr(SPRN_PSPB));
1790 /* Only if TM has been enabled in the kernel */
1791 printf("tfhar = %.16lx tfiar = %.16lx texasr = %.16lx\n",
1792 mfspr(SPRN_TFHAR), mfspr(SPRN_TFIAR),
1793 mfspr(SPRN_TEXASR));
1796 printf("mmcr0 = %.16lx mmcr1 = %.16lx mmcr2 = %.16lx\n",
1797 mfspr(SPRN_MMCR0), mfspr(SPRN_MMCR1), mfspr(SPRN_MMCR2));
1798 printf("pmc1 = %.8x pmc2 = %.8x pmc3 = %.8x pmc4 = %.8x\n",
1799 mfspr(SPRN_PMC1), mfspr(SPRN_PMC2),
1800 mfspr(SPRN_PMC3), mfspr(SPRN_PMC4));
1801 printf("mmcra = %.16lx siar = %.16lx pmc5 = %.8x\n",
1802 mfspr(SPRN_MMCRA), mfspr(SPRN_SIAR), mfspr(SPRN_PMC5));
1803 printf("sdar = %.16lx sier = %.16lx pmc6 = %.8x\n",
1804 mfspr(SPRN_SDAR), mfspr(SPRN_SIER), mfspr(SPRN_PMC6));
1805 printf("ebbhr = %.16lx ebbrr = %.16lx bescr = %.16lx\n",
1806 mfspr(SPRN_EBBHR), mfspr(SPRN_EBBRR), mfspr(SPRN_BESCR));
1807 printf("iamr = %.16lx\n", mfspr(SPRN_IAMR));
1809 if (!(msr & MSR_HV))
1812 printf("hfscr = %.16lx dhdes = %.16lx rpr = %.16lx\n",
1813 mfspr(SPRN_HFSCR), mfspr(SPRN_DHDES), mfspr(SPRN_RPR));
1814 printf("dawr = %.16lx dawrx = %.16lx ciabr = %.16lx\n",
1815 mfspr(SPRN_DAWR), mfspr(SPRN_DAWRX), mfspr(SPRN_CIABR));
1819 static void dump_300_sprs(void)
1822 bool hv = mfmsr() & MSR_HV;
1824 if (!cpu_has_feature(CPU_FTR_ARCH_300))
1827 printf("pidr = %.16lx tidr = %.16lx\n",
1828 mfspr(SPRN_PID), mfspr(SPRN_TIDR));
1829 printf("asdr = %.16lx psscr = %.16lx\n",
1830 mfspr(SPRN_ASDR), hv ? mfspr(SPRN_PSSCR)
1831 : mfspr(SPRN_PSSCR_PR));
1836 printf("ptcr = %.16lx\n",
1841 static void dump_one_spr(int spr, bool show_unimplemented)
1846 if (!read_spr(spr, &val)) {
1847 printf("SPR 0x%03x (%4d) Faulted during read\n", spr, spr);
1851 if (val == 0xdeadbeef) {
1852 /* Looks like read was a nop, confirm */
1854 if (!read_spr(spr, &val)) {
1855 printf("SPR 0x%03x (%4d) Faulted during read\n", spr, spr);
1859 if (val == 0x0badcafe) {
1860 if (show_unimplemented)
1861 printf("SPR 0x%03x (%4d) Unimplemented\n", spr, spr);
1866 printf("SPR 0x%03x (%4d) = 0x%lx\n", spr, spr, val);
1869 static void super_regs(void)
1871 static unsigned long regno;
1879 unsigned long sp, toc;
1880 asm("mr %0,1" : "=r" (sp) :);
1881 asm("mr %0,2" : "=r" (toc) :);
1883 printf("msr = "REG" sprg0 = "REG"\n",
1884 mfmsr(), mfspr(SPRN_SPRG0));
1885 printf("pvr = "REG" sprg1 = "REG"\n",
1886 mfspr(SPRN_PVR), mfspr(SPRN_SPRG1));
1887 printf("dec = "REG" sprg2 = "REG"\n",
1888 mfspr(SPRN_DEC), mfspr(SPRN_SPRG2));
1889 printf("sp = "REG" sprg3 = "REG"\n", sp, mfspr(SPRN_SPRG3));
1890 printf("toc = "REG" dar = "REG"\n", toc, mfspr(SPRN_DAR));
1902 read_spr(regno, &val);
1904 write_spr(regno, val);
1905 dump_one_spr(regno, true);
1910 dump_one_spr(regno, true);
1914 for (spr = 1; spr < 1024; ++spr)
1915 dump_one_spr(spr, false);
1923 * Stuff for reading and writing memory safely
1926 mread(unsigned long adrs, void *buf, int size)
1932 if (setjmp(bus_error_jmp) == 0) {
1933 catch_memory_errors = 1;
1939 *(u16 *)q = *(u16 *)p;
1942 *(u32 *)q = *(u32 *)p;
1945 *(u64 *)q = *(u64 *)p;
1948 for( ; n < size; ++n) {
1954 /* wait a little while to see if we get a machine check */
1958 catch_memory_errors = 0;
1963 mwrite(unsigned long adrs, void *buf, int size)
1969 if (setjmp(bus_error_jmp) == 0) {
1970 catch_memory_errors = 1;
1976 *(u16 *)p = *(u16 *)q;
1979 *(u32 *)p = *(u32 *)q;
1982 *(u64 *)p = *(u64 *)q;
1985 for ( ; n < size; ++n) {
1991 /* wait a little while to see if we get a machine check */
1995 printf("*** Error writing address "REG"\n", adrs + n);
1997 catch_memory_errors = 0;
2001 static int fault_type;
2002 static int fault_except;
2003 static char *fault_chars[] = { "--", "**", "##" };
2005 static int handle_fault(struct pt_regs *regs)
2007 fault_except = TRAP(regs);
2008 switch (TRAP(regs)) {
2020 longjmp(bus_error_jmp, 1);
2025 #define SWAP(a, b, t) ((t) = (a), (a) = (b), (b) = (t))
2028 byterev(unsigned char *val, int size)
2034 SWAP(val[0], val[1], t);
2037 SWAP(val[0], val[3], t);
2038 SWAP(val[1], val[2], t);
2040 case 8: /* is there really any use for this? */
2041 SWAP(val[0], val[7], t);
2042 SWAP(val[1], val[6], t);
2043 SWAP(val[2], val[5], t);
2044 SWAP(val[3], val[4], t);
2052 static char *memex_help_string =
2053 "Memory examine command usage:\n"
2054 "m [addr] [flags] examine/change memory\n"
2055 " addr is optional. will start where left off.\n"
2056 " flags may include chars from this set:\n"
2057 " b modify by bytes (default)\n"
2058 " w modify by words (2 byte)\n"
2059 " l modify by longs (4 byte)\n"
2060 " d modify by doubleword (8 byte)\n"
2061 " r toggle reverse byte order mode\n"
2062 " n do not read memory (for i/o spaces)\n"
2063 " . ok to read (default)\n"
2064 "NOTE: flags are saved as defaults\n"
2067 static char *memex_subcmd_help_string =
2068 "Memory examine subcommands:\n"
2069 " hexval write this val to current location\n"
2070 " 'string' write chars from string to this location\n"
2071 " ' increment address\n"
2072 " ^ decrement address\n"
2073 " / increment addr by 0x10. //=0x100, ///=0x1000, etc\n"
2074 " \\ decrement addr by 0x10. \\\\=0x100, \\\\\\=0x1000, etc\n"
2075 " ` clear no-read flag\n"
2076 " ; stay at this addr\n"
2077 " v change to byte mode\n"
2078 " w change to word (2 byte) mode\n"
2079 " l change to long (4 byte) mode\n"
2080 " u change to doubleword (8 byte) mode\n"
2081 " m addr change current addr\n"
2082 " n toggle no-read flag\n"
2083 " r toggle byte reverse flag\n"
2084 " < count back up count bytes\n"
2085 " > count skip forward count bytes\n"
2086 " x exit this mode\n"
2092 int cmd, inc, i, nslash;
2094 unsigned char val[16];
2096 scanhex((void *)&adrs);
2099 printf(memex_help_string);
2105 while ((cmd = skipbl()) != '\n') {
2107 case 'b': size = 1; break;
2108 case 'w': size = 2; break;
2109 case 'l': size = 4; break;
2110 case 'd': size = 8; break;
2111 case 'r': brev = !brev; break;
2112 case 'n': mnoread = 1; break;
2113 case '.': mnoread = 0; break;
2122 n = mread(adrs, val, size);
2123 printf(REG"%c", adrs, brev? 'r': ' ');
2128 for (i = 0; i < n; ++i)
2129 printf("%.2x", val[i]);
2130 for (; i < size; ++i)
2131 printf("%s", fault_chars[fault_type]);
2138 for (i = 0; i < size; ++i)
2139 val[i] = n >> (i * 8);
2142 mwrite(adrs, val, size);
2155 else if( n == '\'' )
2157 for (i = 0; i < size; ++i)
2158 val[i] = n >> (i * 8);
2161 mwrite(adrs, val, size);
2197 adrs -= 1 << nslash;
2201 adrs += 1 << nslash;
2205 adrs += 1 << -nslash;
2209 adrs -= 1 << -nslash;
2212 scanhex((void *)&adrs);
2231 printf(memex_subcmd_help_string);
2246 case 'n': c = '\n'; break;
2247 case 'r': c = '\r'; break;
2248 case 'b': c = '\b'; break;
2249 case 't': c = '\t'; break;
2254 static void xmon_rawdump (unsigned long adrs, long ndump)
2257 unsigned char temp[16];
2259 for (n = ndump; n > 0;) {
2261 nr = mread(adrs, temp, r);
2263 for (m = 0; m < r; ++m) {
2265 printf("%.2x", temp[m]);
2267 printf("%s", fault_chars[fault_type]);
2276 static void dump_tracing(void)
2282 ftrace_dump(DUMP_ORIG);
2284 ftrace_dump(DUMP_ALL);
2288 static void dump_one_paca(int cpu)
2290 struct paca_struct *p;
2291 #ifdef CONFIG_PPC_STD_MMU_64
2295 if (setjmp(bus_error_jmp) != 0) {
2296 printf("*** Error dumping paca for cpu 0x%x!\n", cpu);
2300 catch_memory_errors = 1;
2305 printf("paca for cpu 0x%x @ %p:\n", cpu, p);
2307 printf(" %-*s = %s\n", 20, "possible", cpu_possible(cpu) ? "yes" : "no");
2308 printf(" %-*s = %s\n", 20, "present", cpu_present(cpu) ? "yes" : "no");
2309 printf(" %-*s = %s\n", 20, "online", cpu_online(cpu) ? "yes" : "no");
2311 #define DUMP(paca, name, format) \
2312 printf(" %-*s = %#-*"format"\t(0x%lx)\n", 20, #name, 18, paca->name, \
2313 offsetof(struct paca_struct, name));
2315 DUMP(p, lock_token, "x");
2316 DUMP(p, paca_index, "x");
2317 DUMP(p, kernel_toc, "lx");
2318 DUMP(p, kernelbase, "lx");
2319 DUMP(p, kernel_msr, "lx");
2320 DUMP(p, emergency_sp, "p");
2321 #ifdef CONFIG_PPC_BOOK3S_64
2322 DUMP(p, nmi_emergency_sp, "p");
2323 DUMP(p, mc_emergency_sp, "p");
2324 DUMP(p, in_nmi, "x");
2325 DUMP(p, in_mce, "x");
2326 DUMP(p, hmi_event_available, "x");
2328 DUMP(p, data_offset, "lx");
2329 DUMP(p, hw_cpu_id, "x");
2330 DUMP(p, cpu_start, "x");
2331 DUMP(p, kexec_state, "x");
2332 #ifdef CONFIG_PPC_STD_MMU_64
2333 for (i = 0; i < SLB_NUM_BOLTED; i++) {
2336 if (!p->slb_shadow_ptr)
2339 esid = be64_to_cpu(p->slb_shadow_ptr->save_area[i].esid);
2340 vsid = be64_to_cpu(p->slb_shadow_ptr->save_area[i].vsid);
2343 printf(" slb_shadow[%d]: = 0x%016lx 0x%016lx\n",
2347 DUMP(p, vmalloc_sllp, "x");
2348 DUMP(p, slb_cache_ptr, "x");
2349 for (i = 0; i < SLB_CACHE_ENTRIES; i++)
2350 printf(" slb_cache[%d]: = 0x%016lx\n", i, p->slb_cache[i]);
2352 DUMP(p, dscr_default, "llx");
2353 #ifdef CONFIG_PPC_BOOK3E
2355 DUMP(p, kernel_pgd, "p");
2356 DUMP(p, tcd_ptr, "p");
2357 DUMP(p, mc_kstack, "p");
2358 DUMP(p, crit_kstack, "p");
2359 DUMP(p, dbg_kstack, "p");
2361 DUMP(p, __current, "p");
2362 DUMP(p, kstack, "lx");
2363 DUMP(p, stab_rr, "lx");
2364 DUMP(p, saved_r1, "lx");
2365 DUMP(p, trap_save, "x");
2366 DUMP(p, soft_enabled, "x");
2367 DUMP(p, irq_happened, "x");
2368 DUMP(p, io_sync, "x");
2369 DUMP(p, irq_work_pending, "x");
2370 DUMP(p, nap_state_lost, "x");
2371 DUMP(p, sprg_vdso, "llx");
2373 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM
2374 DUMP(p, tm_scratch, "llx");
2377 #ifdef CONFIG_PPC_POWERNV
2378 DUMP(p, core_idle_state_ptr, "p");
2379 DUMP(p, thread_idle_state, "x");
2380 DUMP(p, thread_mask, "x");
2381 DUMP(p, subcore_sibling_mask, "x");
2384 DUMP(p, accounting.utime, "llx");
2385 DUMP(p, accounting.stime, "llx");
2386 DUMP(p, accounting.utime_scaled, "llx");
2387 DUMP(p, accounting.starttime, "llx");
2388 DUMP(p, accounting.starttime_user, "llx");
2389 DUMP(p, accounting.startspurr, "llx");
2390 DUMP(p, accounting.utime_sspurr, "llx");
2391 DUMP(p, accounting.steal_time, "llx");
2394 catch_memory_errors = 0;
2398 static void dump_all_pacas(void)
2402 if (num_possible_cpus() == 0) {
2403 printf("No possible cpus, use 'dp #' to dump individual cpus\n");
2407 for_each_possible_cpu(cpu)
2411 static void dump_pacas(void)
2422 termch = c; /* Put c back, it wasn't 'a' */
2427 dump_one_paca(xmon_owner);
2431 #ifdef CONFIG_PPC_POWERNV
2432 static void dump_one_xive(int cpu)
2434 unsigned int hwid = get_hard_smp_processor_id(cpu);
2436 opal_xive_dump(XIVE_DUMP_TM_HYP, hwid);
2437 opal_xive_dump(XIVE_DUMP_TM_POOL, hwid);
2438 opal_xive_dump(XIVE_DUMP_TM_OS, hwid);
2439 opal_xive_dump(XIVE_DUMP_TM_USER, hwid);
2440 opal_xive_dump(XIVE_DUMP_VP, hwid);
2441 opal_xive_dump(XIVE_DUMP_EMU_STATE, hwid);
2443 if (setjmp(bus_error_jmp) != 0) {
2444 catch_memory_errors = 0;
2445 printf("*** Error dumping xive on cpu %d\n", cpu);
2449 catch_memory_errors = 1;
2451 xmon_xive_do_dump(cpu);
2454 catch_memory_errors = 0;
2457 static void dump_all_xives(void)
2461 if (num_possible_cpus() == 0) {
2462 printf("No possible cpus, use 'dx #' to dump individual cpus\n");
2466 for_each_possible_cpu(cpu)
2470 static void dump_one_xive_irq(u32 num)
2477 rc = opal_xive_get_irq_config(num, &vp, &prio, &lirq);
2478 xmon_printf("IRQ 0x%x config: vp=0x%llx prio=%d lirq=0x%x (rc=%lld)\n",
2479 num, be64_to_cpu(vp), prio, be32_to_cpu(lirq), rc);
2482 static void dump_xives(void)
2487 if (!xive_enabled()) {
2488 printf("Xive disabled on this system\n");
2496 } else if (c == 'i') {
2498 dump_one_xive_irq(num);
2502 termch = c; /* Put c back, it wasn't 'a' */
2507 dump_one_xive(xmon_owner);
2509 #endif /* CONFIG_PPC_POWERNV */
2511 static void dump_by_size(unsigned long addr, long count, int size)
2513 unsigned char temp[16];
2517 count = ALIGN(count, 16);
2519 for (i = 0; i < count; i += 16, addr += 16) {
2522 if (mread(addr, temp, 16) != 16) {
2523 printf("\nFaulted reading %d bytes from 0x"REG"\n", 16, addr);
2527 for (j = 0; j < 16; j += size) {
2530 case 1: val = temp[j]; break;
2531 case 2: val = *(u16 *)&temp[j]; break;
2532 case 4: val = *(u32 *)&temp[j]; break;
2533 case 8: val = *(u64 *)&temp[j]; break;
2537 printf("%0*lx", size * 2, val);
2546 static char last[] = { "d?\n" };
2553 xmon_start_pagination();
2555 xmon_end_pagination();
2559 #ifdef CONFIG_PPC_POWERNV
2561 xmon_start_pagination();
2563 xmon_end_pagination();
2576 scanhex((void *)&adrs);
2583 else if (nidump > MAX_DUMP)
2585 adrs += ppc_inst_dump(adrs, nidump, 1);
2587 } else if (c == 'l') {
2589 } else if (c == 'o') {
2591 } else if (c == 'r') {
2595 xmon_rawdump(adrs, ndump);
2602 else if (ndump > MAX_DUMP)
2610 ndump = ALIGN(ndump, 16);
2611 dump_by_size(adrs, ndump, c - '0');
2616 prdump(adrs, ndump);
2625 prdump(unsigned long adrs, long ndump)
2627 long n, m, c, r, nr;
2628 unsigned char temp[16];
2630 for (n = ndump; n > 0;) {
2634 nr = mread(adrs, temp, r);
2636 for (m = 0; m < r; ++m) {
2637 if ((m & (sizeof(long) - 1)) == 0 && m > 0)
2640 printf("%.2x", temp[m]);
2642 printf("%s", fault_chars[fault_type]);
2644 for (; m < 16; ++m) {
2645 if ((m & (sizeof(long) - 1)) == 0)
2650 for (m = 0; m < r; ++m) {
2653 putchar(' ' <= c && c <= '~'? c: '.');
2666 typedef int (*instruction_dump_func)(unsigned long inst, unsigned long addr);
2669 generic_inst_dump(unsigned long adr, long count, int praddr,
2670 instruction_dump_func dump_func)
2673 unsigned long first_adr;
2674 unsigned long inst, last_inst = 0;
2675 unsigned char val[4];
2678 for (first_adr = adr; count > 0; --count, adr += 4) {
2679 nr = mread(adr, val, 4);
2682 const char *x = fault_chars[fault_type];
2683 printf(REG" %s%s%s%s\n", adr, x, x, x, x);
2687 inst = GETWORD(val);
2688 if (adr > first_adr && inst == last_inst) {
2698 printf(REG" %.8x", adr, inst);
2700 dump_func(inst, adr);
2703 return adr - first_adr;
2707 ppc_inst_dump(unsigned long adr, long count, int praddr)
2709 return generic_inst_dump(adr, count, praddr, print_insn_powerpc);
2713 print_address(unsigned long addr)
2715 xmon_print_symbol(addr, "\t# ", "");
2721 struct kmsg_dumper dumper = { .active = 1 };
2722 unsigned char buf[128];
2725 if (setjmp(bus_error_jmp) != 0) {
2726 printf("Error dumping printk buffer!\n");
2730 catch_memory_errors = 1;
2733 kmsg_dump_rewind_nolock(&dumper);
2734 xmon_start_pagination();
2735 while (kmsg_dump_get_line_nolock(&dumper, false, buf, sizeof(buf), &len)) {
2739 xmon_end_pagination();
2742 /* wait a little while to see if we get a machine check */
2744 catch_memory_errors = 0;
2747 #ifdef CONFIG_PPC_POWERNV
2748 static void dump_opal_msglog(void)
2750 unsigned char buf[128];
2754 if (!firmware_has_feature(FW_FEATURE_OPAL)) {
2755 printf("Machine is not running OPAL firmware.\n");
2759 if (setjmp(bus_error_jmp) != 0) {
2760 printf("Error dumping OPAL msglog!\n");
2764 catch_memory_errors = 1;
2767 xmon_start_pagination();
2768 while ((res = opal_msglog_copy(buf, pos, sizeof(buf) - 1))) {
2770 printf("Error dumping OPAL msglog! Error: %zd\n", res);
2777 xmon_end_pagination();
2780 /* wait a little while to see if we get a machine check */
2782 catch_memory_errors = 0;
2787 * Memory operations - move, set, print differences
2789 static unsigned long mdest; /* destination address */
2790 static unsigned long msrc; /* source address */
2791 static unsigned long mval; /* byte value to set memory to */
2792 static unsigned long mcount; /* # bytes to affect */
2793 static unsigned long mdiffs; /* max # differences to print */
2798 scanhex((void *)&mdest);
2799 if( termch != '\n' )
2801 scanhex((void *)(cmd == 's'? &mval: &msrc));
2802 if( termch != '\n' )
2804 scanhex((void *)&mcount);
2807 memmove((void *)mdest, (void *)msrc, mcount);
2810 memset((void *)mdest, mval, mcount);
2813 if( termch != '\n' )
2815 scanhex((void *)&mdiffs);
2816 memdiffs((unsigned char *)mdest, (unsigned char *)msrc, mcount, mdiffs);
2822 memdiffs(unsigned char *p1, unsigned char *p2, unsigned nb, unsigned maxpr)
2827 for( n = nb; n > 0; --n )
2828 if( *p1++ != *p2++ )
2829 if( ++prt <= maxpr )
2830 printf("%.16x %.2x # %.16x %.2x\n", p1 - 1,
2831 p1[-1], p2 - 1, p2[-1]);
2833 printf("Total of %d differences\n", prt);
2836 static unsigned mend;
2837 static unsigned mask;
2843 unsigned char val[4];
2846 scanhex((void *)&mdest);
2847 if (termch != '\n') {
2849 scanhex((void *)&mend);
2850 if (termch != '\n') {
2852 scanhex((void *)&mval);
2854 if (termch != '\n') termch = 0;
2855 scanhex((void *)&mask);
2859 for (a = mdest; a < mend; a += 4) {
2860 if (mread(a, val, 4) == 4
2861 && ((GETWORD(val) ^ mval) & mask) == 0) {
2862 printf("%.16x: %.16x\n", a, GETWORD(val));
2869 static unsigned long mskip = 0x1000;
2870 static unsigned long mlim = 0xffffffff;
2880 if (termch != '\n') termch = 0;
2882 if (termch != '\n') termch = 0;
2885 for (a = mdest; a < mlim; a += mskip) {
2886 ok = mread(a, &v, 1);
2888 printf("%.8x .. ", a);
2889 } else if (!ok && ook)
2890 printf("%.8x\n", a - mskip);
2896 printf("%.8x\n", a - mskip);
2899 static void show_task(struct task_struct *tsk)
2904 * Cloned from kdb_task_state_char(), which is not entirely
2905 * appropriate for calling from xmon. This could be moved
2906 * to a common, generic, routine used by both.
2908 state = (tsk->state == 0) ? 'R' :
2909 (tsk->state < 0) ? 'U' :
2910 (tsk->state & TASK_UNINTERRUPTIBLE) ? 'D' :
2911 (tsk->state & TASK_STOPPED) ? 'T' :
2912 (tsk->state & TASK_TRACED) ? 'C' :
2913 (tsk->exit_state & EXIT_ZOMBIE) ? 'Z' :
2914 (tsk->exit_state & EXIT_DEAD) ? 'E' :
2915 (tsk->state & TASK_INTERRUPTIBLE) ? 'S' : '?';
2917 printf("%p %016lx %6d %6d %c %2d %s\n", tsk,
2919 tsk->pid, tsk->parent->pid,
2920 state, task_thread_info(tsk)->cpu,
2924 static void show_tasks(void)
2927 struct task_struct *tsk = NULL;
2929 printf(" task_struct ->thread.ksp PID PPID S P CMD\n");
2932 tsk = (struct task_struct *)tskv;
2934 if (setjmp(bus_error_jmp) != 0) {
2935 catch_memory_errors = 0;
2936 printf("*** Error dumping task %p\n", tsk);
2940 catch_memory_errors = 1;
2946 for_each_process(tsk)
2951 catch_memory_errors = 0;
2954 static void proccall(void)
2956 unsigned long args[8];
2959 typedef unsigned long (*callfunc_t)(unsigned long, unsigned long,
2960 unsigned long, unsigned long, unsigned long,
2961 unsigned long, unsigned long, unsigned long);
2964 if (!scanhex(&adrs))
2968 for (i = 0; i < 8; ++i)
2970 for (i = 0; i < 8; ++i) {
2971 if (!scanhex(&args[i]) || termch == '\n')
2975 func = (callfunc_t) adrs;
2977 if (setjmp(bus_error_jmp) == 0) {
2978 catch_memory_errors = 1;
2980 ret = func(args[0], args[1], args[2], args[3],
2981 args[4], args[5], args[6], args[7]);
2983 printf("return value is 0x%lx\n", ret);
2985 printf("*** %x exception occurred\n", fault_except);
2987 catch_memory_errors = 0;
2990 /* Input scanning routines */
3001 while( c == ' ' || c == '\t' )
3007 static char *regnames[N_PTREGS] = {
3008 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
3009 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
3010 "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
3011 "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31",
3012 "pc", "msr", "or3", "ctr", "lr", "xer", "ccr",
3018 "trap", "dar", "dsisr", "res"
3022 scanhex(unsigned long *vp)
3029 /* parse register name */
3033 for (i = 0; i < sizeof(regname) - 1; ++i) {
3042 for (i = 0; i < N_PTREGS; ++i) {
3043 if (strcmp(regnames[i], regname) == 0) {
3044 if (xmon_regs == NULL) {
3045 printf("regs not available\n");
3048 *vp = ((unsigned long *)xmon_regs)[i];
3052 printf("invalid register name '%%%s'\n", regname);
3056 /* skip leading "0x" if any */
3070 } else if (c == '$') {
3072 for (i=0; i<63; i++) {
3074 if (isspace(c) || c == '\0') {
3082 if (setjmp(bus_error_jmp) == 0) {
3083 catch_memory_errors = 1;
3085 *vp = kallsyms_lookup_name(tmpstr);
3088 catch_memory_errors = 0;
3090 printf("unknown symbol '%s'\n", tmpstr);
3123 static int hexdigit(int c)
3125 if( '0' <= c && c <= '9' )
3127 if( 'A' <= c && c <= 'F' )
3128 return c - ('A' - 10);
3129 if( 'a' <= c && c <= 'f' )
3130 return c - ('a' - 10);
3135 getstring(char *s, int size)
3146 } while( c != ' ' && c != '\t' && c != '\n' );
3151 static char line[256];
3152 static char *lineptr;
3163 if (lineptr == NULL || *lineptr == 0) {
3164 if (xmon_gets(line, sizeof(line)) == NULL) {
3174 take_input(char *str)
3183 int type = inchar();
3185 static char tmp[64];
3190 xmon_print_symbol(addr, ": ", "\n");
3195 if (setjmp(bus_error_jmp) == 0) {
3196 catch_memory_errors = 1;
3198 addr = kallsyms_lookup_name(tmp);
3200 printf("%s: %lx\n", tmp, addr);
3202 printf("Symbol '%s' not found.\n", tmp);
3205 catch_memory_errors = 0;
3212 /* Print an address in numeric and symbolic form (if possible) */
3213 static void xmon_print_symbol(unsigned long address, const char *mid,
3217 const char *name = NULL;
3218 unsigned long offset, size;
3220 printf(REG, address);
3221 if (setjmp(bus_error_jmp) == 0) {
3222 catch_memory_errors = 1;
3224 name = kallsyms_lookup(address, &size, &offset, &modname,
3227 /* wait a little while to see if we get a machine check */
3231 catch_memory_errors = 0;
3234 printf("%s%s+%#lx/%#lx", mid, name, offset, size);
3236 printf(" [%s]", modname);
3238 printf("%s", after);
3241 #ifdef CONFIG_PPC_STD_MMU_64
3242 void dump_segments(void)
3245 unsigned long esid,vsid;
3248 printf("SLB contents of cpu 0x%x\n", smp_processor_id());
3250 for (i = 0; i < mmu_slb_size; i++) {
3251 asm volatile("slbmfee %0,%1" : "=r" (esid) : "r" (i));
3252 asm volatile("slbmfev %0,%1" : "=r" (vsid) : "r" (i));
3257 printf("%02d %016lx %016lx", i, esid, vsid);
3259 if (!(esid & SLB_ESID_V)) {
3264 llp = vsid & SLB_VSID_LLP;
3265 if (vsid & SLB_VSID_B_1T) {
3266 printf(" 1T ESID=%9lx VSID=%13lx LLP:%3lx \n",
3268 (vsid & ~SLB_VSID_B) >> SLB_VSID_SHIFT_1T,
3271 printf(" 256M ESID=%9lx VSID=%13lx LLP:%3lx \n",
3273 (vsid & ~SLB_VSID_B) >> SLB_VSID_SHIFT,
3280 #ifdef CONFIG_PPC_STD_MMU_32
3281 void dump_segments(void)
3286 for (i = 0; i < 16; ++i)
3287 printf(" %x", mfsrin(i));
3293 static void dump_tlb_44x(void)
3297 for (i = 0; i < PPC44x_TLB_SIZE; i++) {
3298 unsigned long w0,w1,w2;
3299 asm volatile("tlbre %0,%1,0" : "=r" (w0) : "r" (i));
3300 asm volatile("tlbre %0,%1,1" : "=r" (w1) : "r" (i));
3301 asm volatile("tlbre %0,%1,2" : "=r" (w2) : "r" (i));
3302 printf("[%02x] %08x %08x %08x ", i, w0, w1, w2);
3303 if (w0 & PPC44x_TLB_VALID) {
3304 printf("V %08x -> %01x%08x %c%c%c%c%c",
3305 w0 & PPC44x_TLB_EPN_MASK,
3306 w1 & PPC44x_TLB_ERPN_MASK,
3307 w1 & PPC44x_TLB_RPN_MASK,
3308 (w2 & PPC44x_TLB_W) ? 'W' : 'w',
3309 (w2 & PPC44x_TLB_I) ? 'I' : 'i',
3310 (w2 & PPC44x_TLB_M) ? 'M' : 'm',
3311 (w2 & PPC44x_TLB_G) ? 'G' : 'g',
3312 (w2 & PPC44x_TLB_E) ? 'E' : 'e');
3317 #endif /* CONFIG_44x */
3319 #ifdef CONFIG_PPC_BOOK3E
3320 static void dump_tlb_book3e(void)
3322 u32 mmucfg, pidmask, lpidmask;
3324 int i, tlb, ntlbs, pidsz, lpidsz, rasz, lrat = 0;
3326 static const char *pgsz_names[] = {
3361 /* Gather some infos about the MMU */
3362 mmucfg = mfspr(SPRN_MMUCFG);
3363 mmu_version = (mmucfg & 3) + 1;
3364 ntlbs = ((mmucfg >> 2) & 3) + 1;
3365 pidsz = ((mmucfg >> 6) & 0x1f) + 1;
3366 lpidsz = (mmucfg >> 24) & 0xf;
3367 rasz = (mmucfg >> 16) & 0x7f;
3368 if ((mmu_version > 1) && (mmucfg & 0x10000))
3370 printf("Book3E MMU MAV=%d.0,%d TLBs,%d-bit PID,%d-bit LPID,%d-bit RA\n",
3371 mmu_version, ntlbs, pidsz, lpidsz, rasz);
3372 pidmask = (1ul << pidsz) - 1;
3373 lpidmask = (1ul << lpidsz) - 1;
3374 ramask = (1ull << rasz) - 1;
3376 for (tlb = 0; tlb < ntlbs; tlb++) {
3378 int nent, assoc, new_cc = 1;
3379 printf("TLB %d:\n------\n", tlb);
3382 tlbcfg = mfspr(SPRN_TLB0CFG);
3385 tlbcfg = mfspr(SPRN_TLB1CFG);
3388 tlbcfg = mfspr(SPRN_TLB2CFG);
3391 tlbcfg = mfspr(SPRN_TLB3CFG);
3394 printf("Unsupported TLB number !\n");
3397 nent = tlbcfg & 0xfff;
3398 assoc = (tlbcfg >> 24) & 0xff;
3399 for (i = 0; i < nent; i++) {
3400 u32 mas0 = MAS0_TLBSEL(tlb);
3401 u32 mas1 = MAS1_TSIZE(BOOK3E_PAGESZ_4K);
3404 int esel = i, cc = i;
3412 mas0 |= MAS0_ESEL(esel);
3413 mtspr(SPRN_MAS0, mas0);
3414 mtspr(SPRN_MAS1, mas1);
3415 mtspr(SPRN_MAS2, mas2);
3416 asm volatile("tlbre 0,0,0" : : : "memory");
3417 mas1 = mfspr(SPRN_MAS1);
3418 mas2 = mfspr(SPRN_MAS2);
3419 mas7_mas3 = mfspr(SPRN_MAS7_MAS3);
3420 if (assoc && (i % assoc) == 0)
3422 if (!(mas1 & MAS1_VALID))
3425 printf("%04x- ", i);
3427 printf("%04x-%c", cc, 'A' + esel);
3429 printf(" |%c", 'A' + esel);
3431 printf(" %016llx %04x %s %c%c AS%c",
3433 (mas1 >> 16) & 0x3fff,
3434 pgsz_names[(mas1 >> 7) & 0x1f],
3435 mas1 & MAS1_IND ? 'I' : ' ',
3436 mas1 & MAS1_IPROT ? 'P' : ' ',
3437 mas1 & MAS1_TS ? '1' : '0');
3438 printf(" %c%c%c%c%c%c%c",
3439 mas2 & MAS2_X0 ? 'a' : ' ',
3440 mas2 & MAS2_X1 ? 'v' : ' ',
3441 mas2 & MAS2_W ? 'w' : ' ',
3442 mas2 & MAS2_I ? 'i' : ' ',
3443 mas2 & MAS2_M ? 'm' : ' ',
3444 mas2 & MAS2_G ? 'g' : ' ',
3445 mas2 & MAS2_E ? 'e' : ' ');
3446 printf(" %016llx", mas7_mas3 & ramask & ~0x7ffull);
3447 if (mas1 & MAS1_IND)
3449 pgsz_names[(mas7_mas3 >> 1) & 0x1f]);
3451 printf(" U%c%c%c S%c%c%c\n",
3452 mas7_mas3 & MAS3_UX ? 'x' : ' ',
3453 mas7_mas3 & MAS3_UW ? 'w' : ' ',
3454 mas7_mas3 & MAS3_UR ? 'r' : ' ',
3455 mas7_mas3 & MAS3_SX ? 'x' : ' ',
3456 mas7_mas3 & MAS3_SW ? 'w' : ' ',
3457 mas7_mas3 & MAS3_SR ? 'r' : ' ');
3461 #endif /* CONFIG_PPC_BOOK3E */
3463 static void xmon_init(int enable)
3467 __debugger_ipi = xmon_ipi;
3468 __debugger_bpt = xmon_bpt;
3469 __debugger_sstep = xmon_sstep;
3470 __debugger_iabr_match = xmon_iabr_match;
3471 __debugger_break_match = xmon_break_match;
3472 __debugger_fault_handler = xmon_fault_handler;
3475 __debugger_ipi = NULL;
3476 __debugger_bpt = NULL;
3477 __debugger_sstep = NULL;
3478 __debugger_iabr_match = NULL;
3479 __debugger_break_match = NULL;
3480 __debugger_fault_handler = NULL;
3484 #ifdef CONFIG_MAGIC_SYSRQ
3485 static void sysrq_handle_xmon(int key)
3487 /* ensure xmon is enabled */
3489 debugger(get_irq_regs());
3494 static struct sysrq_key_op sysrq_xmon_op = {
3495 .handler = sysrq_handle_xmon,
3496 .help_msg = "xmon(x)",
3497 .action_msg = "Entering xmon",
3500 static int __init setup_xmon_sysrq(void)
3502 register_sysrq_key('x', &sysrq_xmon_op);
3505 device_initcall(setup_xmon_sysrq);
3506 #endif /* CONFIG_MAGIC_SYSRQ */
3508 #ifdef CONFIG_DEBUG_FS
3509 static int xmon_dbgfs_set(void *data, u64 val)
3517 static int xmon_dbgfs_get(void *data, u64 *val)
3523 DEFINE_SIMPLE_ATTRIBUTE(xmon_dbgfs_ops, xmon_dbgfs_get,
3524 xmon_dbgfs_set, "%llu\n");
3526 static int __init setup_xmon_dbgfs(void)
3528 debugfs_create_file("xmon", 0600, powerpc_debugfs_root, NULL,
3532 device_initcall(setup_xmon_dbgfs);
3533 #endif /* CONFIG_DEBUG_FS */
3535 static int xmon_early __initdata;
3537 static int __init early_parse_xmon(char *p)
3539 if (!p || strncmp(p, "early", 5) == 0) {
3540 /* just "xmon" is equivalent to "xmon=early" */
3544 } else if (strncmp(p, "on", 2) == 0) {
3547 } else if (strncmp(p, "off", 3) == 0)
3554 early_param("xmon", early_parse_xmon);
3556 void __init xmon_setup(void)
3564 #ifdef CONFIG_SPU_BASE
3568 u64 saved_mfc_sr1_RW;
3569 u32 saved_spu_runcntl_RW;
3570 unsigned long dump_addr;
3574 #define XMON_NUM_SPUS 16 /* Enough for current hardware */
3576 static struct spu_info spu_info[XMON_NUM_SPUS];
3578 void xmon_register_spus(struct list_head *list)
3582 list_for_each_entry(spu, list, full_list) {
3583 if (spu->number >= XMON_NUM_SPUS) {
3588 spu_info[spu->number].spu = spu;
3589 spu_info[spu->number].stopped_ok = 0;
3590 spu_info[spu->number].dump_addr = (unsigned long)
3591 spu_info[spu->number].spu->local_store;
3595 static void stop_spus(void)
3601 for (i = 0; i < XMON_NUM_SPUS; i++) {
3602 if (!spu_info[i].spu)
3605 if (setjmp(bus_error_jmp) == 0) {
3606 catch_memory_errors = 1;
3609 spu = spu_info[i].spu;
3611 spu_info[i].saved_spu_runcntl_RW =
3612 in_be32(&spu->problem->spu_runcntl_RW);
3614 tmp = spu_mfc_sr1_get(spu);
3615 spu_info[i].saved_mfc_sr1_RW = tmp;
3617 tmp &= ~MFC_STATE1_MASTER_RUN_CONTROL_MASK;
3618 spu_mfc_sr1_set(spu, tmp);
3623 spu_info[i].stopped_ok = 1;
3625 printf("Stopped spu %.2d (was %s)\n", i,
3626 spu_info[i].saved_spu_runcntl_RW ?
3627 "running" : "stopped");
3629 catch_memory_errors = 0;
3630 printf("*** Error stopping spu %.2d\n", i);
3632 catch_memory_errors = 0;
3636 static void restart_spus(void)
3641 for (i = 0; i < XMON_NUM_SPUS; i++) {
3642 if (!spu_info[i].spu)
3645 if (!spu_info[i].stopped_ok) {
3646 printf("*** Error, spu %d was not successfully stopped"
3647 ", not restarting\n", i);
3651 if (setjmp(bus_error_jmp) == 0) {
3652 catch_memory_errors = 1;
3655 spu = spu_info[i].spu;
3656 spu_mfc_sr1_set(spu, spu_info[i].saved_mfc_sr1_RW);
3657 out_be32(&spu->problem->spu_runcntl_RW,
3658 spu_info[i].saved_spu_runcntl_RW);
3663 printf("Restarted spu %.2d\n", i);
3665 catch_memory_errors = 0;
3666 printf("*** Error restarting spu %.2d\n", i);
3668 catch_memory_errors = 0;
3672 #define DUMP_WIDTH 23
3673 #define DUMP_VALUE(format, field, value) \
3675 if (setjmp(bus_error_jmp) == 0) { \
3676 catch_memory_errors = 1; \
3678 printf(" %-*s = "format"\n", DUMP_WIDTH, \
3683 catch_memory_errors = 0; \
3684 printf(" %-*s = *** Error reading field.\n", \
3685 DUMP_WIDTH, #field); \
3687 catch_memory_errors = 0; \
3690 #define DUMP_FIELD(obj, format, field) \
3691 DUMP_VALUE(format, field, obj->field)
3693 static void dump_spu_fields(struct spu *spu)
3695 printf("Dumping spu fields at address %p:\n", spu);
3697 DUMP_FIELD(spu, "0x%x", number);
3698 DUMP_FIELD(spu, "%s", name);
3699 DUMP_FIELD(spu, "0x%lx", local_store_phys);
3700 DUMP_FIELD(spu, "0x%p", local_store);
3701 DUMP_FIELD(spu, "0x%lx", ls_size);
3702 DUMP_FIELD(spu, "0x%x", node);
3703 DUMP_FIELD(spu, "0x%lx", flags);
3704 DUMP_FIELD(spu, "%d", class_0_pending);
3705 DUMP_FIELD(spu, "0x%lx", class_0_dar);
3706 DUMP_FIELD(spu, "0x%lx", class_1_dar);
3707 DUMP_FIELD(spu, "0x%lx", class_1_dsisr);
3708 DUMP_FIELD(spu, "0x%lx", irqs[0]);
3709 DUMP_FIELD(spu, "0x%lx", irqs[1]);
3710 DUMP_FIELD(spu, "0x%lx", irqs[2]);
3711 DUMP_FIELD(spu, "0x%x", slb_replace);
3712 DUMP_FIELD(spu, "%d", pid);
3713 DUMP_FIELD(spu, "0x%p", mm);
3714 DUMP_FIELD(spu, "0x%p", ctx);
3715 DUMP_FIELD(spu, "0x%p", rq);
3716 DUMP_FIELD(spu, "0x%p", timestamp);
3717 DUMP_FIELD(spu, "0x%lx", problem_phys);
3718 DUMP_FIELD(spu, "0x%p", problem);
3719 DUMP_VALUE("0x%x", problem->spu_runcntl_RW,
3720 in_be32(&spu->problem->spu_runcntl_RW));
3721 DUMP_VALUE("0x%x", problem->spu_status_R,
3722 in_be32(&spu->problem->spu_status_R));
3723 DUMP_VALUE("0x%x", problem->spu_npc_RW,
3724 in_be32(&spu->problem->spu_npc_RW));
3725 DUMP_FIELD(spu, "0x%p", priv2);
3726 DUMP_FIELD(spu, "0x%p", pdata);
3730 spu_inst_dump(unsigned long adr, long count, int praddr)
3732 return generic_inst_dump(adr, count, praddr, print_insn_spu);
3735 static void dump_spu_ls(unsigned long num, int subcmd)
3737 unsigned long offset, addr, ls_addr;
3739 if (setjmp(bus_error_jmp) == 0) {
3740 catch_memory_errors = 1;
3742 ls_addr = (unsigned long)spu_info[num].spu->local_store;
3746 catch_memory_errors = 0;
3747 printf("*** Error: accessing spu info for spu %d\n", num);
3750 catch_memory_errors = 0;
3752 if (scanhex(&offset))
3753 addr = ls_addr + offset;
3755 addr = spu_info[num].dump_addr;
3757 if (addr >= ls_addr + LS_SIZE) {
3758 printf("*** Error: address outside of local store\n");
3764 addr += spu_inst_dump(addr, 16, 1);
3774 spu_info[num].dump_addr = addr;
3777 static int do_spu_cmd(void)
3779 static unsigned long num = 0;
3780 int cmd, subcmd = 0;
3792 if (isxdigit(subcmd) || subcmd == '\n')
3796 if (num >= XMON_NUM_SPUS || !spu_info[num].spu) {
3797 printf("*** Error: invalid spu number\n");
3803 dump_spu_fields(spu_info[num].spu);
3806 dump_spu_ls(num, subcmd);
3817 #else /* ! CONFIG_SPU_BASE */
3818 static int do_spu_cmd(void)