arch/powerpc/platforms/powernv/smp.c

   1 /*
   2  * SMP support for PowerNV machines.
   3  *
   4  * Copyright 2011 IBM Corp.
   5  *
   6  * This program is free software; you can redistribute it and/or
   7  * modify it under the terms of the GNU General Public License
   8  * as published by the Free Software Foundation; either version
   9  * 2 of the License, or (at your option) any later version.
  10  */
  11
  12 #include <linux/kernel.h>
  13 #include <linux/module.h>
  14 #include <linux/sched.h>
  15 #include <linux/sched/hotplug.h>
  16 #include <linux/smp.h>
  17 #include <linux/interrupt.h>
  18 #include <linux/delay.h>
  19 #include <linux/init.h>
  20 #include <linux/spinlock.h>
  21 #include <linux/cpu.h>
  22
  23 #include <asm/irq.h>
  24 #include <asm/smp.h>
  25 #include <asm/paca.h>
  26 #include <asm/machdep.h>
  27 #include <asm/cputable.h>
  28 #include <asm/firmware.h>
  29 #include <asm/vdso_datapage.h>
  30 #include <asm/cputhreads.h>
  31 #include <asm/xics.h>
  32 #include <asm/xive.h>
  33 #include <asm/opal.h>
  34 #include <asm/runlatch.h>
  35 #include <asm/code-patching.h>
  36 #include <asm/dbell.h>
  37 #include <asm/kvm_ppc.h>
  38 #include <asm/ppc-opcode.h>
  39 #include <asm/cpuidle.h>
  40 #include <asm/kexec.h>
  41 #include <asm/reg.h>
  42 #include <asm/powernv.h>
  43
  44 #include "powernv.h"
  45
  46 #ifdef DEBUG
  47 #include <asm/udbg.h>
  48 #define DBG(fmt...) udbg_printf(fmt)
  49 #else
  50 #define DBG(fmt...)
  51 #endif
  52
  53 static void pnv_smp_setup_cpu(int cpu)
  54 {
  55         /*
  56          * P9 workaround for CI vector load (see traps.c),
  57          * enable the corresponding HMI interrupt
  58          */
  59         if (pvr_version_is(PVR_POWER9))
  60                 mtspr(SPRN_HMEER, mfspr(SPRN_HMEER) | PPC_BIT(17));
  61
  62         if (xive_enabled())
  63                 xive_smp_setup_cpu();
  64         else if (cpu != boot_cpuid)
  65                 xics_setup_cpu();
  66 }
  67
  68 static int pnv_smp_kick_cpu(int nr)
  69 {
  70         unsigned int pcpu;
  71         unsigned long start_here =
  72                         __pa(ppc_function_entry(generic_secondary_smp_init));
  73         long rc;
  74         uint8_t status;
  75
  76         if (nr < 0 || nr >= nr_cpu_ids)
  77                 return -EINVAL;
  78
  79         pcpu = get_hard_smp_processor_id(nr);
  80         /*
  81          * If we already started or OPAL is not supported, we just
  82          * kick the CPU via the PACA
  83          */
  84         if (paca_ptrs[nr]->cpu_start || !firmware_has_feature(FW_FEATURE_OPAL))
  85                 goto kick;
  86
  87         /*
  88          * At this point, the CPU can either be spinning on the way in
  89          * from kexec or be inside OPAL waiting to be started for the
  90          * first time. OPAL v3 allows us to query OPAL to know if it
  91          * has the CPUs, so we do that
  92          */
  93         rc = opal_query_cpu_status(pcpu, &status);
  94         if (rc != OPAL_SUCCESS) {
  95                 pr_warn("OPAL Error %ld querying CPU %d state\n", rc, nr);
  96                 return -ENODEV;
  97         }
  98
  99         /*
 100          * Already started, just kick it, probably coming from
 101          * kexec and spinning
 102          */
 103         if (status == OPAL_THREAD_STARTED)
 104                 goto kick;
 105
 106         /*
 107          * Available/inactive, let's kick it
 108          */
 109         if (status == OPAL_THREAD_INACTIVE) {
 110                 pr_devel("OPAL: Starting CPU %d (HW 0x%x)...\n", nr, pcpu);
 111                 rc = opal_start_cpu(pcpu, start_here);
 112                 if (rc != OPAL_SUCCESS) {
 113                         pr_warn("OPAL Error %ld starting CPU %d\n", rc, nr);
 114                         return -ENODEV;
 115                 }
 116         } else {
 117                 /*
 118                  * An unavailable CPU (or any other unknown status)
 119                  * shouldn't be started. It should also
 120                  * not be in the possible map but currently it can
 121                  * happen
 122                  */
 123                 pr_devel("OPAL: CPU %d (HW 0x%x) is unavailable"
 124                          " (status %d)...\n", nr, pcpu, status);
 125                 return -ENODEV;
 126         }
 127
 128 kick:
 129         return smp_generic_kick_cpu(nr);
 130 }
 131
 132 #ifdef CONFIG_HOTPLUG_CPU
 133
 134 static int pnv_smp_cpu_disable(void)
 135 {
 136         int cpu = smp_processor_id();
 137
 138         /* This is identical to pSeries... might consolidate by
 139          * moving migrate_irqs_away to a ppc_md with default to
 140          * the generic fixup_irqs. --BenH.
 141          */
 142         set_cpu_online(cpu, false);
 143         vdso_data->processorCount--;
 144         if (cpu == boot_cpuid)
 145                 boot_cpuid = cpumask_any(cpu_online_mask);
 146         if (xive_enabled())
 147                 xive_smp_disable_cpu();
 148         else
 149                 xics_migrate_irqs_away();
 150         return 0;
 151 }
 152
 153 static void pnv_flush_interrupts(void)
 154 {
 155         if (cpu_has_feature(CPU_FTR_ARCH_300)) {
 156                 if (xive_enabled())
 157                         xive_flush_interrupt();
 158                 else
 159                         icp_opal_flush_interrupt();
 160         } else {
 161                 icp_native_flush_interrupt();
 162         }
 163 }
 164
 165 static void pnv_smp_cpu_kill_self(void)
 166 {
 167         unsigned long srr1, unexpected_mask, wmask;
 168         unsigned int cpu;
 169         u64 lpcr_val;
 170
 171         /* Standard hot unplug procedure */
 172
 173         idle_task_exit();
 174         current->active_mm = NULL; /* for sanity */
 175         cpu = smp_processor_id();
 176         DBG("CPU%d offline\n", cpu);
 177         generic_set_cpu_dead(cpu);
 178         smp_wmb();
 179
 180         wmask = SRR1_WAKEMASK;
 181         if (cpu_has_feature(CPU_FTR_ARCH_207S))
 182                 wmask = SRR1_WAKEMASK_P8;
 183
 184         /*
 185          * This turns the irq soft-disabled state we're called with, into a
 186          * hard-disabled state with pending irq_happened interrupts cleared.
 187          *
 188          * PACA_IRQ_DEC   - Decrementer should be ignored.
 189          * PACA_IRQ_HMI   - Can be ignored, processing is done in real mode.
 190          * PACA_IRQ_DBELL, EE, PMI - Unexpected.
 191          */
 192         hard_irq_disable();
 193         if (generic_check_cpu_restart(cpu))
 194                 goto out;
 195
 196         unexpected_mask = ~(PACA_IRQ_DEC | PACA_IRQ_HMI | PACA_IRQ_HARD_DIS);
 197         if (local_paca->irq_happened & unexpected_mask) {
 198                 if (local_paca->irq_happened & PACA_IRQ_EE)
 199                         pnv_flush_interrupts();
 200                 DBG("CPU%d Unexpected exit while offline irq_happened=%lx!\n",
 201                                 cpu, local_paca->irq_happened);
 202         }
 203         local_paca->irq_happened = PACA_IRQ_HARD_DIS;
 204
 205         /*
 206          * We don't want to take decrementer interrupts while we are
 207          * offline, so clear LPCR:PECE1. We keep PECE2 (and
 208          * LPCR_PECE_HVEE on P9) enabled so as to let IPIs in.
 209          *
 210          * If the CPU gets woken up by a special wakeup, ensure that
 211          * the SLW engine sets LPCR with decrementer bit cleared, else
 212          * the CPU will come back to the kernel due to a spurious
 213          * wakeup.
 214          */
 215         lpcr_val = mfspr(SPRN_LPCR) & ~(u64)LPCR_PECE1;
 216         pnv_program_cpu_hotplug_lpcr(cpu, lpcr_val);
 217
 218         while (!generic_check_cpu_restart(cpu)) {
 219                 /*
 220                  * Clear IPI flag, since we don't handle IPIs while
 221                  * offline, except for those when changing micro-threading
 222                  * mode, which are handled explicitly below, and those
 223                  * for coming online, which are handled via
 224                  * generic_check_cpu_restart() calls.
 225                  */
 226                 kvmppc_clear_host_ipi(cpu);
 227
 228                 srr1 = pnv_cpu_offline(cpu);
 229
 230                 WARN_ON_ONCE(!irqs_disabled());
 231                 WARN_ON(lazy_irq_pending());
 232
 233                 /*
 234                  * If the SRR1 value indicates that we woke up due to
 235                  * an external interrupt, then clear the interrupt.
 236                  * We clear the interrupt before checking for the
 237                  * reason, so as to avoid a race where we wake up for
 238                  * some other reason, find nothing and clear the interrupt
 239                  * just as some other cpu is sending us an interrupt.
 240                  * If we returned from power7_nap as a result of
 241                  * having finished executing in a KVM guest, then srr1
 242                  * contains 0.
 243                  */
 244                 if (((srr1 & wmask) == SRR1_WAKEEE) ||
 245                     ((srr1 & wmask) == SRR1_WAKEHVI)) {
 246                         pnv_flush_interrupts();
 247                 } else if ((srr1 & wmask) == SRR1_WAKEHDBELL) {
 248                         unsigned long msg = PPC_DBELL_TYPE(PPC_DBELL_SERVER);
 249                         asm volatile(PPC_MSGCLR(%0) : : "r" (msg));
 250                 } else if ((srr1 & wmask) == SRR1_WAKERESET) {
 251                         irq_set_pending_from_srr1(srr1);
 252                         /* Does not return */
 253                 }
 254
 255                 smp_mb();
 256
 257                 /*
 258                  * For kdump kernels, we process the ipi and jump to
 259                  * crash_ipi_callback
 260                  */
 261                 if (kdump_in_progress()) {
 262                         /*
 263                          * If we got to this point, we've not used
 264                          * NMI's, otherwise we would have gone
 265                          * via the SRR1_WAKERESET path. We are
 266                          * using regular IPI's for waking up offline
 267                          * threads.
 268                          */
 269                         struct pt_regs regs;
 270
 271                         ppc_save_regs(&regs);
 272                         crash_ipi_callback(&regs);
 273                         /* Does not return */
 274                 }
 275
 276                 if (cpu_core_split_required())
 277                         continue;
 278
 279                 if (srr1 && !generic_check_cpu_restart(cpu))
 280                         DBG("CPU%d Unexpected exit while offline srr1=%lx!\n",
 281                                         cpu, srr1);
 282
 283         }
 284
 285         /*
 286          * Re-enable decrementer interrupts in LPCR.
 287          *
 288          * Further, we want stop states to be woken up by decrementer
 289          * for non-hotplug cases. So program the LPCR via stop api as
 290          * well.
 291          */
 292         lpcr_val = mfspr(SPRN_LPCR) | (u64)LPCR_PECE1;
 293         pnv_program_cpu_hotplug_lpcr(cpu, lpcr_val);
 294 out:
 295         DBG("CPU%d coming online...\n", cpu);
 296 }
 297
 298 #endif /* CONFIG_HOTPLUG_CPU */
 299
 300 static int pnv_cpu_bootable(unsigned int nr)
 301 {
 302         /*
 303          * Starting with POWER8, the subcore logic relies on all threads of a
 304          * core being booted so that they can participate in split mode
 305          * switches. So on those machines we ignore the smt_enabled_at_boot
 306          * setting (smt-enabled on the kernel command line).
 307          */
 308         if (cpu_has_feature(CPU_FTR_ARCH_207S))
 309                 return 1;
 310
 311         return smp_generic_cpu_bootable(nr);
 312 }
 313
 314 static int pnv_smp_prepare_cpu(int cpu)
 315 {
 316         if (xive_enabled())
 317                 return xive_smp_prepare_cpu(cpu);
 318         return 0;
 319 }
 320
 321 /* Cause IPI as setup by the interrupt controller (xics or xive) */
 322 static void (*ic_cause_ipi)(int cpu);
 323
 324 static void pnv_cause_ipi(int cpu)
 325 {
 326         if (doorbell_try_core_ipi(cpu))
 327                 return;
 328
 329         ic_cause_ipi(cpu);
 330 }
 331
 332 static void __init pnv_smp_probe(void)
 333 {
 334         if (xive_enabled())
 335                 xive_smp_probe();
 336         else
 337                 xics_smp_probe();
 338
 339         if (cpu_has_feature(CPU_FTR_DBELL)) {
 340                 ic_cause_ipi = smp_ops->cause_ipi;
 341                 WARN_ON(!ic_cause_ipi);
 342
 343                 if (cpu_has_feature(CPU_FTR_ARCH_300))
 344                         smp_ops->cause_ipi = doorbell_global_ipi;
 345                 else
 346                         smp_ops->cause_ipi = pnv_cause_ipi;
 347         }
 348 }
 349
 350 static int pnv_system_reset_exception(struct pt_regs *regs)
 351 {
 352         if (smp_handle_nmi_ipi(regs))
 353                 return 1;
 354         return 0;
 355 }
 356
 357 static int pnv_cause_nmi_ipi(int cpu)
 358 {
 359         int64_t rc;
 360
 361         if (cpu >= 0) {
 362                 int h = get_hard_smp_processor_id(cpu);
 363
 364                 if (opal_check_token(OPAL_QUIESCE))
 365                         opal_quiesce(QUIESCE_HOLD, h);
 366
 367                 rc = opal_signal_system_reset(h);
 368
 369                 if (opal_check_token(OPAL_QUIESCE))
 370                         opal_quiesce(QUIESCE_RESUME, h);
 371
 372                 if (rc != OPAL_SUCCESS)
 373                         return 0;
 374                 return 1;
 375
 376         } else if (cpu == NMI_IPI_ALL_OTHERS) {
 377                 bool success = true;
 378                 int c;
 379
 380                 if (opal_check_token(OPAL_QUIESCE))
 381                         opal_quiesce(QUIESCE_HOLD, -1);
 382
 383                 /*
 384                  * We do not use broadcasts (yet), because it's not clear
 385                  * exactly what semantics Linux wants or the firmware should
 386                  * provide.
 387                  */
 388                 for_each_online_cpu(c) {
 389                         if (c == smp_processor_id())
 390                                 continue;
 391
 392                         rc = opal_signal_system_reset(
 393                                                 get_hard_smp_processor_id(c));
 394                         if (rc != OPAL_SUCCESS)
 395                                 success = false;
 396                 }
 397
 398                 if (opal_check_token(OPAL_QUIESCE))
 399                         opal_quiesce(QUIESCE_RESUME, -1);
 400
 401                 if (success)
 402                         return 1;
 403
 404                 /*
 405                  * Caller will fall back to doorbells, which may pick
 406                  * up the remainders.
 407                  */
 408         }
 409
 410         return 0;
 411 }
 412
 413 static struct smp_ops_t pnv_smp_ops = {
 414         .message_pass   = NULL, /* Use smp_muxed_ipi_message_pass */
 415         .cause_ipi      = NULL, /* Filled at runtime by pnv_smp_probe() */
 416         .cause_nmi_ipi  = NULL,
 417         .probe          = pnv_smp_probe,
 418         .prepare_cpu    = pnv_smp_prepare_cpu,
 419         .kick_cpu       = pnv_smp_kick_cpu,
 420         .setup_cpu      = pnv_smp_setup_cpu,
 421         .cpu_bootable   = pnv_cpu_bootable,
 422 #ifdef CONFIG_HOTPLUG_CPU
 423         .cpu_disable    = pnv_smp_cpu_disable,
 424         .cpu_die        = generic_cpu_die,
 425 #endif /* CONFIG_HOTPLUG_CPU */
 426 };
 427
 428 /* This is called very early during platform setup_arch */
 429 void __init pnv_smp_init(void)
 430 {
 431         if (opal_check_token(OPAL_SIGNAL_SYSTEM_RESET)) {
 432                 ppc_md.system_reset_exception = pnv_system_reset_exception;
 433                 pnv_smp_ops.cause_nmi_ipi = pnv_cause_nmi_ipi;
 434         }
 435         smp_ops = &pnv_smp_ops;
 436
 437 #ifdef CONFIG_HOTPLUG_CPU
 438         ppc_md.cpu_die  = pnv_smp_cpu_kill_self;
 439 #ifdef CONFIG_KEXEC_CORE
 440         crash_wake_offline = 1;
 441 #endif
 442 #endif
 443 }