1 menu "Platform support"
3 config PPC_MULTIPLATFORM
5 depends on PPC64 || 6xx
10 depends on 6xx && PPC_MULTIPLATFORM
12 source "arch/powerpc/platforms/pseries/Kconfig"
13 source "arch/powerpc/platforms/iseries/Kconfig"
14 source "arch/powerpc/platforms/chrp/Kconfig"
15 source "arch/powerpc/platforms/512x/Kconfig"
16 source "arch/powerpc/platforms/52xx/Kconfig"
17 source "arch/powerpc/platforms/powermac/Kconfig"
18 source "arch/powerpc/platforms/prep/Kconfig"
19 source "arch/powerpc/platforms/maple/Kconfig"
20 source "arch/powerpc/platforms/pasemi/Kconfig"
21 source "arch/powerpc/platforms/ps3/Kconfig"
22 source "arch/powerpc/platforms/cell/Kconfig"
23 source "arch/powerpc/platforms/8xx/Kconfig"
24 source "arch/powerpc/platforms/82xx/Kconfig"
25 source "arch/powerpc/platforms/83xx/Kconfig"
26 source "arch/powerpc/platforms/85xx/Kconfig"
27 source "arch/powerpc/platforms/86xx/Kconfig"
28 source "arch/powerpc/platforms/embedded6xx/Kconfig"
29 source "arch/powerpc/platforms/44x/Kconfig"
30 source "arch/powerpc/platforms/40x/Kconfig"
31 source "arch/powerpc/platforms/amigaone/Kconfig"
35 depends on PPC_MULTIPLATFORM
37 Support for running natively on the hardware, i.e. without
38 a hypervisor. This option is not user-selectable but should
39 be selected by all platforms that need it.
41 config UDBG_RTAS_CONSOLE
42 bool "RTAS based debug console"
47 bool "BEAT based debug console"
52 depends on PPC_PSERIES
74 depends on PPC_MULTIPLATFORM && PPC64
81 config RTAS_ERROR_LOGGING
87 bool "Proc interface to RTAS"
92 tristate "Firmware flash interface"
93 depends on PPC64 && RTAS_PROC
96 tristate "Support for PMI"
97 depends on PPC_IBM_CELL_BLADE
99 PMI (Platform Management Interrupt) is a way to
100 communicate with the BMC (Baseboard Management Controller).
101 It is used in some IBM Cell blades.
108 config MPIC_U3_HT_IRQS
113 config MPIC_BROKEN_REGREAD
117 This option enables a MPIC driver workaround for some chips
118 that have a bug that causes some interrupt source information
119 to not read back properly. It is safe to use on other chips as
120 well, but enabling it uses about 8KB of memory to keep copies
121 of the register contents in software.
124 depends on PPC_PSERIES || PPC_ISERIES
129 depends on PPC_PSERIES
130 bool "Support for GX bus based adapters"
132 Bus device driver for GX bus based adapters.
142 config PPC_INDIRECT_IO
151 source "drivers/cpufreq/Kconfig"
153 menu "CPU Frequency drivers"
157 bool "Support for Apple PowerBooks"
158 depends on ADB_PMU && PPC32
159 select CPU_FREQ_TABLE
161 This adds support for frequency switching on Apple PowerBooks,
162 this currently includes some models of iBook & Titanium
165 config CPU_FREQ_PMAC64
166 bool "Support for some Apple G5s"
167 depends on PPC_PMAC && PPC64
168 select CPU_FREQ_TABLE
170 This adds support for frequency switching on Apple iMac G5,
171 and some of the more recent desktop G5 machines as well.
173 config PPC_PASEMI_CPUFREQ
174 bool "Support for PA Semi PWRficient"
175 depends on PPC_PASEMI
177 select CPU_FREQ_TABLE
179 This adds the support for frequency switching on PA Semi
180 PWRficient processors.
184 config PPC601_SYNC_FIX
185 bool "Workarounds for PPC601 bugs"
186 depends on 6xx && (PPC_PREP || PPC_PMAC)
188 Some versions of the PPC601 (the first PowerPC chip) have bugs which
189 mean that extra synchronization instructions are required near
190 certain instructions, typically those that make major changes to the
191 CPU state. These extra instructions reduce performance slightly.
192 If you say N here, these extra instructions will not be included,
193 resulting in a kernel which will run faster but may not run at all
194 on some systems with the PPC601 chip.
196 If in doubt, say Y here.
199 bool "On-chip CPU temperature sensor support"
202 G3 and G4 processors have an on-chip temperature sensor called the
203 'Thermal Assist Unit (TAU)', which, in theory, can measure the on-die
204 temperature within 2-4 degrees Celsius. This option shows the current
205 on-die temperature in /proc/cpuinfo if the cpu supports it.
207 Unfortunately, on some chip revisions, this sensor is very inaccurate
208 and in many cases, does not work at all, so don't assume the cpu
209 temp is actually what /proc/cpuinfo says it is.
212 bool "Interrupt driven TAU driver (DANGEROUS)"
215 The TAU supports an interrupt driven mode which causes an interrupt
216 whenever the temperature goes out of range. This is the fastest way
217 to get notified the temp has exceeded a range. With this option off,
218 a timer is used to re-check the temperature periodically.
220 However, on some cpus it appears that the TAU interrupt hardware
221 is buggy and can cause a situation which would lead unexplained hard
224 Unless you are extending the TAU driver, or enjoy kernel/hardware
225 debugging, leave this option off.
228 bool "Average high and low temp"
231 The TAU hardware can compare the temperature to an upper and lower
232 bound. The default behavior is to show both the upper and lower
233 bound in /proc/cpuinfo. If the range is large, the temperature is
234 either changing a lot, or the TAU hardware is broken (likely on some
235 G4's). If the range is small (around 4 degrees), the temperature is
236 relatively stable. If you say Y here, a single temperature value,
237 halfway between the upper and lower bounds, will be reported in
240 If in doubt, say N here.
243 bool "Freescale QUICC Engine (QE) Support"
248 The QUICC Engine (QE) is a new generation of communications
249 coprocessors on Freescale embedded CPUs (akin to CPM in older chips).
250 Selecting this option means that you wish to build a kernel
251 for a machine with a QE coprocessor.
254 bool "QE GPIO support"
255 depends on QUICC_ENGINE
257 select ARCH_REQUIRE_GPIOLIB
259 Say Y here if you're going to use hardware that connects to the
263 bool "Enable support for the CPM2 (Communications Processor Module)"
264 depends on MPC85xx || 8260
267 select PPC_PCI_CHOICE
268 select ARCH_REQUIRE_GPIOLIB
271 The CPM2 (Communications Processor Module) is a coprocessor on
272 embedded CPUs made by Freescale. Selecting this option means that
273 you wish to build a kernel for a machine with a CPM2 coprocessor
274 on it (826x, 827x, 8560).
277 tristate "Axon DDR2 memory device driver"
278 depends on PPC_IBM_CELL_BLADE
281 It registers one block device per Axon's DDR2 memory bank found
282 on a system. Block devices are called axonram?, their major and
283 minor numbers are available in /proc/devices, /proc/partitions or
284 in /sys/block/axonram?/dev.
289 select GENERIC_ISA_DMA
291 Supports for the ULI1575 PCIe south bridge that exists on some
292 Freescale reference boards. The boards all use the ULI in pretty
302 Uses information from the OF or flattened device tree to instatiate
303 platform devices for direct mapped RTC chips like the DS1742 or DS1743.
305 source "arch/powerpc/sysdev/bestcomm/Kconfig"
308 bool "MPC8xxx GPIO support"
309 depends on PPC_MPC831x || PPC_MPC834x || PPC_MPC837x || PPC_85xx || PPC_86xx
311 select ARCH_REQUIRE_GPIOLIB
313 Say Y here if you're going to use hardware that connects to the
314 MPC831x/834x/837x/8572/8610 GPIOs.
317 bool "Support for simple, memory-mapped GPIO controllers"
320 select ARCH_REQUIRE_GPIOLIB
322 Say Y here to support simple, memory-mapped GPIO controllers.
323 These are usually BCSRs used to control board's switches, LEDs,
324 chip-selects, Ethernet/USB PHY's power and various other small
325 on-board peripherals.
327 config MCU_MPC8349EMITX
328 tristate "MPC8349E-mITX MCU driver"
329 depends on I2C && PPC_83xx
331 select ARCH_REQUIRE_GPIOLIB
333 Say Y here to enable soft power-off functionality on the Freescale
334 boards with the MPC8349E-mITX-compatible MCU chips. This driver will
335 also register MCU GPIOs with the generic GPIO API, so you'll able
336 to use MCU pins as GPIOs.