2 * MPC83xx suspend support
4 * Author: Scott Wood <scottwood@freescale.com>
6 * Copyright (c) 2006-2007 Freescale Semiconductor, Inc.
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License version 2 as published
10 * by the Free Software Foundation.
13 #include <linux/init.h>
15 #include <linux/types.h>
16 #include <linux/ioport.h>
17 #include <linux/interrupt.h>
18 #include <linux/wait.h>
19 #include <linux/kthread.h>
20 #include <linux/freezer.h>
21 #include <linux/suspend.h>
22 #include <linux/fsl_devices.h>
23 #include <linux/of_platform.h>
28 #include <asm/mpc6xx.h>
30 #include <sysdev/fsl_soc.h>
32 #define PMCCR1_NEXT_STATE 0x0C /* Next state for power management */
33 #define PMCCR1_NEXT_STATE_SHIFT 2
34 #define PMCCR1_CURR_STATE 0x03 /* Current state for power management*/
35 #define IMMR_SYSCR_OFFSET 0x100
36 #define IMMR_RCW_OFFSET 0x900
37 #define RCW_PCI_HOST 0x80000000
39 void mpc83xx_enter_deep_sleep(phys_addr_t immrbase);
43 #define PMCCR_DLPEN 2 /* DDR SDRAM low power enable */
44 #define PMCCR_SLPEN 1 /* System low power enable */
48 /* All but PMCI are deep-sleep only */
49 #define PMCER_GPIO 0x100
50 #define PMCER_PCI 0x080
51 #define PMCER_USB 0x040
52 #define PMCER_ETSEC1 0x020
53 #define PMCER_ETSEC2 0x010
54 #define PMCER_TIMER 0x008
55 #define PMCER_INT1 0x004
56 #define PMCER_INT2 0x002
57 #define PMCER_PMCI 0x001
58 #define PMCER_ALL 0x1FF
62 #define PMCCR1_USE_STATE 0x80000000
63 #define PMCCR1_PME_EN 0x00000080
64 #define PMCCR1_ASSERT_PME 0x00000040
65 #define PMCCR1_POWER_OFF 0x00000020
76 struct mpc83xx_clock {
82 struct mpc83xx_syscr {
92 struct mpc83xx_saved {
102 static struct of_device *pmc_dev;
103 static int has_deep_sleep, deep_sleeping;
105 static struct mpc83xx_pmc __iomem *pmc_regs;
106 static struct mpc83xx_clock __iomem *clock_regs;
107 static struct mpc83xx_syscr __iomem *syscr_regs;
108 static struct mpc83xx_saved saved_regs;
109 static int is_pci_agent, wake_from_pci;
110 static phys_addr_t immrbase;
111 static int pci_pm_state;
112 static DECLARE_WAIT_QUEUE_HEAD(agent_wq);
114 int fsl_deep_sleep(void)
116 return deep_sleeping;
118 EXPORT_SYMBOL(fsl_deep_sleep);
120 static int mpc83xx_change_state(void)
123 u32 reg_cfg1 = in_be32(&pmc_regs->config1);
126 pci_pm_state = (reg_cfg1 & PMCCR1_NEXT_STATE) >>
127 PMCCR1_NEXT_STATE_SHIFT;
128 curr_state = reg_cfg1 & PMCCR1_CURR_STATE;
130 if (curr_state != pci_pm_state) {
131 reg_cfg1 &= ~PMCCR1_CURR_STATE;
132 reg_cfg1 |= pci_pm_state;
133 out_be32(&pmc_regs->config1, reg_cfg1);
143 static irqreturn_t pmc_irq_handler(int irq, void *dev_id)
145 u32 event = in_be32(&pmc_regs->event);
148 if (mpc83xx_change_state())
152 out_be32(&pmc_regs->event, event);
159 static void mpc83xx_suspend_restore_regs(void)
161 out_be32(&syscr_regs->sicrl, saved_regs.sicrl);
162 out_be32(&syscr_regs->sicrh, saved_regs.sicrh);
163 out_be32(&clock_regs->sccr, saved_regs.sccr);
166 static void mpc83xx_suspend_save_regs(void)
168 saved_regs.sicrl = in_be32(&syscr_regs->sicrl);
169 saved_regs.sicrh = in_be32(&syscr_regs->sicrh);
170 saved_regs.sccr = in_be32(&clock_regs->sccr);
173 static int mpc83xx_suspend_enter(suspend_state_t state)
177 /* Don't go to sleep if there's a race where pci_pm_state changes
178 * between the agent thread checking it and the PM code disabling
182 if (pci_pm_state != (deep_sleeping ? 3 : 2))
185 out_be32(&pmc_regs->config1,
186 in_be32(&pmc_regs->config1) | PMCCR1_PME_EN);
189 /* Put the system into low-power mode and the RAM
190 * into self-refresh mode once the core goes to
194 out_be32(&pmc_regs->config, PMCCR_SLPEN | PMCCR_DLPEN);
196 /* If it has deep sleep (i.e. it's an 831x or compatible),
197 * disable power to the core upon entering sleep mode. This will
198 * require going through the boot firmware upon a wakeup event.
202 mpc83xx_suspend_save_regs();
204 out_be32(&pmc_regs->mask, PMCER_ALL);
206 out_be32(&pmc_regs->config1,
207 in_be32(&pmc_regs->config1) | PMCCR1_POWER_OFF);
211 mpc83xx_enter_deep_sleep(immrbase);
213 out_be32(&pmc_regs->config1,
214 in_be32(&pmc_regs->config1) & ~PMCCR1_POWER_OFF);
216 out_be32(&pmc_regs->mask, PMCER_PMCI);
218 mpc83xx_suspend_restore_regs();
220 out_be32(&pmc_regs->mask, PMCER_PMCI);
222 mpc6xx_enter_standby();
228 out_be32(&pmc_regs->config1,
229 in_be32(&pmc_regs->config1) & ~PMCCR1_PME_EN);
234 static void mpc83xx_suspend_end(void)
239 static int mpc83xx_suspend_valid(suspend_state_t state)
241 return state == PM_SUSPEND_STANDBY || state == PM_SUSPEND_MEM;
244 static int mpc83xx_suspend_begin(suspend_state_t state)
247 case PM_SUSPEND_STANDBY:
262 static int agent_thread_fn(void *data)
265 wait_event_interruptible(agent_wq, pci_pm_state >= 2);
268 if (signal_pending(current) || pci_pm_state < 2)
271 /* With a preemptible kernel (or SMP), this could race with
272 * a userspace-driven suspend request. It's probably best
273 * to avoid mixing the two with such a configuration (or
274 * else fix it by adding a mutex to state_store that we can
280 pm_suspend(pci_pm_state == 3 ? PM_SUSPEND_MEM :
289 static void mpc83xx_set_agent(void)
291 out_be32(&pmc_regs->config1, PMCCR1_USE_STATE);
292 out_be32(&pmc_regs->mask, PMCER_PMCI);
294 kthread_run(agent_thread_fn, NULL, "PCI power mgt");
297 static int mpc83xx_is_pci_agent(void)
299 struct mpc83xx_rcw __iomem *rcw_regs;
302 rcw_regs = ioremap(get_immrbase() + IMMR_RCW_OFFSET,
303 sizeof(struct mpc83xx_rcw));
308 ret = !(in_be32(&rcw_regs->rcwhr) & RCW_PCI_HOST);
314 static struct platform_suspend_ops mpc83xx_suspend_ops = {
315 .valid = mpc83xx_suspend_valid,
316 .begin = mpc83xx_suspend_begin,
317 .enter = mpc83xx_suspend_enter,
318 .end = mpc83xx_suspend_end,
321 static int pmc_probe(struct of_device *ofdev,
322 const struct of_device_id *match)
324 struct device_node *np = ofdev->node;
326 struct pmc_type *type = match->data;
329 if (!of_device_is_available(np))
332 has_deep_sleep = type->has_deep_sleep;
333 immrbase = get_immrbase();
336 is_pci_agent = mpc83xx_is_pci_agent();
337 if (is_pci_agent < 0)
340 ret = of_address_to_resource(np, 0, &res);
344 pmc_irq = irq_of_parse_and_map(np, 0);
345 if (pmc_irq != NO_IRQ) {
346 ret = request_irq(pmc_irq, pmc_irq_handler, IRQF_SHARED,
353 pmc_regs = ioremap(res.start, sizeof(struct mpc83xx_pmc));
360 ret = of_address_to_resource(np, 1, &res);
366 clock_regs = ioremap(res.start, sizeof(struct mpc83xx_pmc));
373 if (has_deep_sleep) {
374 syscr_regs = ioremap(immrbase + IMMR_SYSCR_OFFSET,
375 sizeof(*syscr_regs));
385 suspend_set_ops(&mpc83xx_suspend_ops);
393 if (pmc_irq != NO_IRQ)
394 free_irq(pmc_irq, ofdev);
399 static int pmc_remove(struct of_device *ofdev)
404 static struct pmc_type pmc_types[] = {
413 static struct of_device_id pmc_match[] = {
415 .compatible = "fsl,mpc8313-pmc",
416 .data = &pmc_types[0],
419 .compatible = "fsl,mpc8349-pmc",
420 .data = &pmc_types[1],
425 static struct of_platform_driver pmc_driver = {
426 .name = "mpc83xx-pmc",
427 .match_table = pmc_match,
432 static int pmc_init(void)
434 return of_register_platform_driver(&pmc_driver);
437 module_init(pmc_init);