2 * ppc64 MMU hashtable management routines
4 * (c) Copyright IBM Corp. 2003, 2005
6 * Maintained by: Benjamin Herrenschmidt
7 * <benh@kernel.crashing.org>
9 * This file is covered by the GNU Public Licence v2 as
10 * described in the kernel's COPYING file.
14 #include <asm/pgtable.h>
17 #include <asm/types.h>
18 #include <asm/ppc_asm.h>
19 #include <asm/asm-offsets.h>
20 #include <asm/cputable.h>
27 * +-> Back chain (SP + 256)
28 * | General register save area (SP + 112)
29 * | Parameter save area (SP + 48)
30 * | TOC save area (SP + 40)
31 * | link editor doubleword (SP + 32)
32 * | compiler doubleword (SP + 24)
33 * | LR save area (SP + 16)
34 * | CR save area (SP + 8)
35 * SP ---> +-- Back chain (SP + 0)
38 #ifndef CONFIG_PPC_64K_PAGES
40 /*****************************************************************************
42 * 4K SW & 4K HW pages implementation *
44 *****************************************************************************/
48 * _hash_page_4K(unsigned long ea, unsigned long access, unsigned long vsid,
49 * pte_t *ptep, unsigned long trap, int local, int ssize)
51 * Adds a 4K page to the hash table in a segment of 4K pages only
54 _GLOBAL(__hash_page_4K)
57 stdu r1,-STACKFRAMESIZE(r1)
58 /* Save all params that we need after a function call */
59 std r6,STK_PARAM(R6)(r1)
60 std r8,STK_PARAM(R8)(r1)
61 std r9,STK_PARAM(R9)(r1)
63 /* Save non-volatile registers.
64 * r31 will hold "old PTE"
68 * r27 is hashtab mask (maybe dynamic patched instead ?)
70 std r27,STK_REG(R27)(r1)
71 std r28,STK_REG(R28)(r1)
72 std r29,STK_REG(R29)(r1)
73 std r30,STK_REG(R30)(r1)
74 std r31,STK_REG(R31)(r1)
78 * Check permissions, atomically mark the linux PTE busy
83 /* Check access rights (access & ~(pte_val(*ptep))) */
85 bne- htab_wrong_access
86 /* Check if PTE is busy */
87 andi. r0,r31,_PAGE_BUSY
88 /* If so, just bail out and refault if needed. Someone else
89 * is changing this PTE anyway and might hash it.
93 /* Prepare new PTE value (turn access RW into DIRTY, then
94 * add BUSY,HASHPTE and ACCESSED)
96 rlwinm r30,r4,32-9+7,31-7,31-7 /* _PAGE_RW -> _PAGE_DIRTY */
98 ori r30,r30,_PAGE_BUSY | _PAGE_ACCESSED | _PAGE_HASHPTE
99 /* Write the linux PTE atomically (setting busy) */
106 * Insert/Update the HPTE in the hash table. At this point,
107 * r4 (access) is re-useable, we use it for the new HPTE flags
111 cmpdi r9,0 /* check segment size */
113 END_MMU_FTR_SECTION_IFSET(MMU_FTR_1T_SEGMENT)
114 /* Calc vpn and put it in r29 */
115 sldi r29,r5,SID_SHIFT - VPN_SHIFT
116 rldicl r28,r3,64 - VPN_SHIFT,64 - (SID_SHIFT - VPN_SHIFT)
119 * Calculate hash value for primary slot and store it in r28
121 * r0 = (va >> 12) & ((1ul << (28 - 12)) -1)
123 rldicl r0,r3,64-12,48
124 xor r28,r5,r0 /* hash */
127 3: /* Calc vpn and put it in r29 */
128 sldi r29,r5,SID_SHIFT_1T - VPN_SHIFT
129 rldicl r28,r3,64 - VPN_SHIFT,64 - (SID_SHIFT_1T - VPN_SHIFT)
133 * calculate hash value for primary slot and
134 * store it in r28 for 1T segment
137 sldi r28,r5,25 /* vsid << 25 */
138 /* r0 = (va >> 12) & ((1ul << (40 - 12)) -1) */
139 rldicl r0,r3,64-12,36
140 xor r28,r28,r5 /* vsid ^ ( vsid << 25) */
141 xor r28,r28,r0 /* hash */
143 /* Convert linux PTE bits into HW equivalents */
144 4: andi. r3,r30,0x1fe /* Get basic set of flags */
145 xori r3,r3,HPTE_R_N /* _PAGE_EXEC -> NOEXEC */
146 rlwinm r0,r30,32-9+1,30,30 /* _PAGE_RW -> _PAGE_USER (r0) */
147 rlwinm r4,r30,32-7+1,30,30 /* _PAGE_DIRTY -> _PAGE_USER (r4) */
148 and r0,r0,r4 /* _PAGE_RW & _PAGE_DIRTY ->r0 bit 30*/
149 andc r0,r30,r0 /* r0 = pte & ~r0 */
150 rlwimi r3,r0,32-1,31,31 /* Insert result into PP lsb */
151 ori r3,r3,HPTE_R_C /* Always add "C" bit for perf. */
153 /* We eventually do the icache sync here (maybe inline that
154 * code rather than call a C function...)
159 bl .hash_page_do_lazy_icache
160 END_FTR_SECTION(CPU_FTR_NOEXECUTE|CPU_FTR_COHERENT_ICACHE, CPU_FTR_NOEXECUTE)
162 /* At this point, r3 contains new PP bits, save them in
163 * place of "access" in the param area (sic)
165 std r3,STK_PARAM(R4)(r1)
167 /* Get htab_hash_mask */
168 ld r4,htab_hash_mask@got(2)
169 ld r27,0(r4) /* htab_hash_mask -> r27 */
171 /* Check if we may already be in the hashtable, in this case, we
172 * go to out-of-line code to try to modify the HPTE
174 andi. r0,r31,_PAGE_HASHPTE
178 /* Clear hpte bits in new pte (we also clear BUSY btw) and
181 lis r0,_PAGE_HPTEFLAGS@h
182 ori r0,r0,_PAGE_HPTEFLAGS@l
184 ori r30,r30,_PAGE_HASHPTE
186 /* physical address r5 */
187 rldicl r5,r31,64-PTE_RPN_SHIFT,PTE_RPN_SHIFT
188 sldi r5,r5,PAGE_SHIFT
190 /* Calculate primary group hash */
192 rldicr r3,r0,3,63-3 /* r3 = (hash & mask) << 3 */
194 /* Call ppc_md.hpte_insert */
195 ld r6,STK_PARAM(R4)(r1) /* Retrieve new pp bits */
196 mr r4,r29 /* Retrieve vpn */
197 li r7,0 /* !bolted, !secondary */
198 li r8,MMU_PAGE_4K /* page size */
199 li r9,MMU_PAGE_4K /* actual page size */
200 ld r10,STK_PARAM(R9)(r1) /* segment size */
201 _GLOBAL(htab_call_hpte_insert1)
202 bl . /* Patched by htab_finish_init() */
204 bge htab_pte_insert_ok /* Insertion successful */
205 cmpdi 0,r3,-2 /* Critical failure */
206 beq- htab_pte_insert_failure
208 /* Now try secondary slot */
210 /* physical address r5 */
211 rldicl r5,r31,64-PTE_RPN_SHIFT,PTE_RPN_SHIFT
212 sldi r5,r5,PAGE_SHIFT
214 /* Calculate secondary group hash */
216 rldicr r3,r0,3,63-3 /* r0 = (~hash & mask) << 3 */
218 /* Call ppc_md.hpte_insert */
219 ld r6,STK_PARAM(R4)(r1) /* Retrieve new pp bits */
220 mr r4,r29 /* Retrieve vpn */
221 li r7,HPTE_V_SECONDARY /* !bolted, secondary */
222 li r8,MMU_PAGE_4K /* page size */
223 li r9,MMU_PAGE_4K /* actual page size */
224 ld r10,STK_PARAM(R9)(r1) /* segment size */
225 _GLOBAL(htab_call_hpte_insert2)
226 bl . /* Patched by htab_finish_init() */
228 bge+ htab_pte_insert_ok /* Insertion successful */
229 cmpdi 0,r3,-2 /* Critical failure */
230 beq- htab_pte_insert_failure
232 /* Both are full, we need to evict something */
234 /* Pick a random group based on TB */
240 rldicr r3,r0,3,63-3 /* r0 = (hash & mask) << 3 */
241 /* Call ppc_md.hpte_remove */
242 _GLOBAL(htab_call_hpte_remove)
243 bl . /* Patched by htab_finish_init() */
253 /* Insert slot number & secondary bit in PTE */
254 rldimi r30,r3,12,63-15
256 /* Write out the PTE with a normal write
257 * (maybe add eieio may be good still ?)
260 ld r6,STK_PARAM(R6)(r1)
264 ld r27,STK_REG(R27)(r1)
265 ld r28,STK_REG(R28)(r1)
266 ld r29,STK_REG(R29)(r1)
267 ld r30,STK_REG(R30)(r1)
268 ld r31,STK_REG(R31)(r1)
269 addi r1,r1,STACKFRAMESIZE
275 /* Keep PP bits in r4 and slot idx from the PTE around in r3 */
277 rlwinm r3,r31,32-12,29,31
279 /* Secondary group ? if yes, get a inverted hash value */
281 andi. r0,r31,_PAGE_SECONDARY
285 /* Calculate proper slot value for ppc_md.hpte_updatepp */
287 rldicr r0,r0,3,63-3 /* r0 = (hash & mask) << 3 */
288 add r3,r0,r3 /* add slot idx */
290 /* Call ppc_md.hpte_updatepp */
292 li r6,MMU_PAGE_4K /* page size */
293 ld r7,STK_PARAM(R9)(r1) /* segment size */
294 ld r8,STK_PARAM(R8)(r1) /* get "local" param */
295 _GLOBAL(htab_call_hpte_updatepp)
296 bl . /* Patched by htab_finish_init() */
298 /* if we failed because typically the HPTE wasn't really here
299 * we try an insertion.
304 /* Clear the BUSY bit and Write out the PTE */
310 /* Bail out clearing reservation */
315 htab_pte_insert_failure:
316 /* Bail out restoring old PTE */
317 ld r6,STK_PARAM(R6)(r1)
323 #else /* CONFIG_PPC_64K_PAGES */
326 /*****************************************************************************
328 * 64K SW & 4K or 64K HW in a 4K segment pages implementation *
330 *****************************************************************************/
332 /* _hash_page_4K(unsigned long ea, unsigned long access, unsigned long vsid,
333 * pte_t *ptep, unsigned long trap, int local, int ssize,
338 * For now, we do NOT implement Admixed pages
340 _GLOBAL(__hash_page_4K)
343 stdu r1,-STACKFRAMESIZE(r1)
344 /* Save all params that we need after a function call */
345 std r6,STK_PARAM(R6)(r1)
346 std r8,STK_PARAM(R8)(r1)
347 std r9,STK_PARAM(R9)(r1)
349 /* Save non-volatile registers.
350 * r31 will hold "old PTE"
353 * r28 is a hash value
354 * r27 is hashtab mask (maybe dynamic patched instead ?)
355 * r26 is the hidx mask
356 * r25 is the index in combo page
358 std r25,STK_REG(R25)(r1)
359 std r26,STK_REG(R26)(r1)
360 std r27,STK_REG(R27)(r1)
361 std r28,STK_REG(R28)(r1)
362 std r29,STK_REG(R29)(r1)
363 std r30,STK_REG(R30)(r1)
364 std r31,STK_REG(R31)(r1)
368 * Check permissions, atomically mark the linux PTE busy
373 /* Check access rights (access & ~(pte_val(*ptep))) */
375 bne- htab_wrong_access
376 /* Check if PTE is busy */
377 andi. r0,r31,_PAGE_BUSY
378 /* If so, just bail out and refault if needed. Someone else
379 * is changing this PTE anyway and might hash it.
382 /* Prepare new PTE value (turn access RW into DIRTY, then
383 * add BUSY and ACCESSED)
385 rlwinm r30,r4,32-9+7,31-7,31-7 /* _PAGE_RW -> _PAGE_DIRTY */
387 ori r30,r30,_PAGE_BUSY | _PAGE_ACCESSED
388 oris r30,r30,_PAGE_COMBO@h
389 /* Write the linux PTE atomically (setting busy) */
396 * Insert/Update the HPTE in the hash table. At this point,
397 * r4 (access) is re-useable, we use it for the new HPTE flags
400 /* Load the hidx index */
401 rldicl r25,r3,64-12,60
404 cmpdi r9,0 /* check segment size */
406 END_MMU_FTR_SECTION_IFSET(MMU_FTR_1T_SEGMENT)
407 /* Calc vpn and put it in r29 */
408 sldi r29,r5,SID_SHIFT - VPN_SHIFT
410 * clrldi r3,r3,64 - SID_SHIFT --> ea & 0xfffffff
411 * srdi r28,r3,VPN_SHIFT
413 rldicl r28,r3,64 - VPN_SHIFT,64 - (SID_SHIFT - VPN_SHIFT)
416 * Calculate hash value for primary slot and store it in r28
418 * r0 = (va >> 12) & ((1ul << (28 - 12)) -1)
420 rldicl r0,r3,64-12,48
421 xor r28,r5,r0 /* hash */
424 3: /* Calc vpn and put it in r29 */
425 sldi r29,r5,SID_SHIFT_1T - VPN_SHIFT
427 * clrldi r3,r3,64 - SID_SHIFT_1T --> ea & 0xffffffffff
428 * srdi r28,r3,VPN_SHIFT
430 rldicl r28,r3,64 - VPN_SHIFT,64 - (SID_SHIFT_1T - VPN_SHIFT)
434 * Calculate hash value for primary slot and
435 * store it in r28 for 1T segment
438 sldi r28,r5,25 /* vsid << 25 */
439 /* r0 = (va >> 12) & ((1ul << (40 - 12)) -1) */
440 rldicl r0,r3,64-12,36
441 xor r28,r28,r5 /* vsid ^ ( vsid << 25) */
442 xor r28,r28,r0 /* hash */
444 /* Convert linux PTE bits into HW equivalents */
446 #ifdef CONFIG_PPC_SUBPAGE_PROT
448 andi. r3,r10,0x1fe /* Get basic set of flags */
449 rlwinm r0,r10,32-9+1,30,30 /* _PAGE_RW -> _PAGE_USER (r0) */
451 andi. r3,r30,0x1fe /* Get basic set of flags */
452 rlwinm r0,r30,32-9+1,30,30 /* _PAGE_RW -> _PAGE_USER (r0) */
454 xori r3,r3,HPTE_R_N /* _PAGE_EXEC -> NOEXEC */
455 rlwinm r4,r30,32-7+1,30,30 /* _PAGE_DIRTY -> _PAGE_USER (r4) */
456 and r0,r0,r4 /* _PAGE_RW & _PAGE_DIRTY ->r0 bit 30*/
457 andc r0,r3,r0 /* r0 = pte & ~r0 */
458 rlwimi r3,r0,32-1,31,31 /* Insert result into PP lsb */
459 ori r3,r3,HPTE_R_C /* Always add "C" bit for perf. */
461 /* We eventually do the icache sync here (maybe inline that
462 * code rather than call a C function...)
467 bl .hash_page_do_lazy_icache
468 END_FTR_SECTION(CPU_FTR_NOEXECUTE|CPU_FTR_COHERENT_ICACHE, CPU_FTR_NOEXECUTE)
470 /* At this point, r3 contains new PP bits, save them in
471 * place of "access" in the param area (sic)
473 std r3,STK_PARAM(R4)(r1)
475 /* Get htab_hash_mask */
476 ld r4,htab_hash_mask@got(2)
477 ld r27,0(r4) /* htab_hash_mask -> r27 */
479 /* Check if we may already be in the hashtable, in this case, we
480 * go to out-of-line code to try to modify the HPTE. We look for
481 * the bit at (1 >> (index + 32))
483 rldicl. r0,r31,64-12,48
484 li r26,0 /* Default hidx */
488 * Check if the pte was already inserted into the hash table
489 * as a 64k HW page, and invalidate the 64k HPTE if so.
491 andis. r0,r31,_PAGE_COMBO@h
492 beq htab_inval_old_hpte
494 ld r6,STK_PARAM(R6)(r1)
495 ori r26,r6,PTE_PAGE_HIDX_OFFSET /* Load the hidx mask. */
497 addi r5,r25,36 /* Check actual HPTE_SUB bit, this */
498 rldcr. r0,r31,r5,0 /* must match pgtable.h definition */
502 /* real page number in r5, PTE RPN value + index */
503 andis. r0,r31,_PAGE_4K_PFN@h
504 srdi r5,r31,PTE_RPN_SHIFT
505 bne- htab_special_pfn
506 sldi r5,r5,PAGE_SHIFT-HW_PAGE_SHIFT
509 sldi r5,r5,HW_PAGE_SHIFT
511 /* Calculate primary group hash */
513 rldicr r3,r0,3,63-3 /* r0 = (hash & mask) << 3 */
515 /* Call ppc_md.hpte_insert */
516 ld r6,STK_PARAM(R4)(r1) /* Retrieve new pp bits */
517 mr r4,r29 /* Retrieve vpn */
518 li r7,0 /* !bolted, !secondary */
519 li r8,MMU_PAGE_4K /* page size */
520 li r9,MMU_PAGE_4K /* actual page size */
521 ld r10,STK_PARAM(R9)(r1) /* segment size */
522 _GLOBAL(htab_call_hpte_insert1)
523 bl . /* patched by htab_finish_init() */
525 bge htab_pte_insert_ok /* Insertion successful */
526 cmpdi 0,r3,-2 /* Critical failure */
527 beq- htab_pte_insert_failure
529 /* Now try secondary slot */
531 /* real page number in r5, PTE RPN value + index */
532 andis. r0,r31,_PAGE_4K_PFN@h
533 srdi r5,r31,PTE_RPN_SHIFT
535 sldi r5,r5,PAGE_SHIFT-HW_PAGE_SHIFT
537 3: sldi r5,r5,HW_PAGE_SHIFT
539 /* Calculate secondary group hash */
541 rldicr r3,r0,3,63-3 /* r0 = (~hash & mask) << 3 */
543 /* Call ppc_md.hpte_insert */
544 ld r6,STK_PARAM(R4)(r1) /* Retrieve new pp bits */
545 mr r4,r29 /* Retrieve vpn */
546 li r7,HPTE_V_SECONDARY /* !bolted, secondary */
547 li r8,MMU_PAGE_4K /* page size */
548 li r9,MMU_PAGE_4K /* actual page size */
549 ld r10,STK_PARAM(R9)(r1) /* segment size */
550 _GLOBAL(htab_call_hpte_insert2)
551 bl . /* patched by htab_finish_init() */
553 bge+ htab_pte_insert_ok /* Insertion successful */
554 cmpdi 0,r3,-2 /* Critical failure */
555 beq- htab_pte_insert_failure
557 /* Both are full, we need to evict something */
559 /* Pick a random group based on TB */
565 rldicr r3,r0,3,63-3 /* r0 = (hash & mask) << 3 */
566 /* Call ppc_md.hpte_remove */
567 _GLOBAL(htab_call_hpte_remove)
568 bl . /* patched by htab_finish_init() */
574 * Call out to C code to invalidate an 64k HW HPTE that is
575 * useless now that the segment has been switched to 4k pages.
579 mr r4,r31 /* PTE.pte */
580 li r5,0 /* PTE.hidx */
581 li r6,MMU_PAGE_64K /* psize */
582 ld r7,STK_PARAM(R9)(r1) /* ssize */
583 ld r8,STK_PARAM(R8)(r1) /* local */
585 /* Clear out _PAGE_HPTE_SUB bits in the new linux PTE */
586 lis r0,_PAGE_HPTE_SUB@h
587 ori r0,r0,_PAGE_HPTE_SUB@l
596 /* Insert slot number & secondary bit in PTE second half,
597 * clear _PAGE_BUSY and set approriate HPTE slot bit
599 ld r6,STK_PARAM(R6)(r1)
604 subfic r5,r25,27 /* Must match bit position in */
605 sld r0,r0,r5 /* pgtable.h */
614 ori r5,r6,PTE_PAGE_HIDX_OFFSET
620 ld r25,STK_REG(R25)(r1)
621 ld r26,STK_REG(R26)(r1)
622 ld r27,STK_REG(R27)(r1)
623 ld r28,STK_REG(R28)(r1)
624 ld r29,STK_REG(R29)(r1)
625 ld r30,STK_REG(R30)(r1)
626 ld r31,STK_REG(R31)(r1)
627 addi r1,r1,STACKFRAMESIZE
633 /* Keep PP bits in r4 and slot idx from the PTE around in r3 */
638 /* Secondary group ? if yes, get a inverted hash value */
640 andi. r0,r3,0x8 /* page secondary ? */
643 1: andi. r3,r3,0x7 /* extract idx alone */
645 /* Calculate proper slot value for ppc_md.hpte_updatepp */
647 rldicr r0,r0,3,63-3 /* r0 = (hash & mask) << 3 */
648 add r3,r0,r3 /* add slot idx */
650 /* Call ppc_md.hpte_updatepp */
652 li r6,MMU_PAGE_4K /* page size */
653 ld r7,STK_PARAM(R9)(r1) /* segment size */
654 ld r8,STK_PARAM(R8)(r1) /* get "local" param */
655 _GLOBAL(htab_call_hpte_updatepp)
656 bl . /* patched by htab_finish_init() */
658 /* if we failed because typically the HPTE wasn't really here
659 * we try an insertion.
664 /* Clear the BUSY bit and Write out the PTE */
667 ld r6,STK_PARAM(R6)(r1)
673 /* Bail out clearing reservation */
678 htab_pte_insert_failure:
679 /* Bail out restoring old PTE */
680 ld r6,STK_PARAM(R6)(r1)
685 #endif /* CONFIG_PPC_64K_PAGES */
687 #ifdef CONFIG_PPC_HAS_HASH_64K
689 /*****************************************************************************
691 * 64K SW & 64K HW in a 64K segment pages implementation *
693 *****************************************************************************/
695 _GLOBAL(__hash_page_64K)
698 stdu r1,-STACKFRAMESIZE(r1)
699 /* Save all params that we need after a function call */
700 std r6,STK_PARAM(R6)(r1)
701 std r8,STK_PARAM(R8)(r1)
702 std r9,STK_PARAM(R9)(r1)
704 /* Save non-volatile registers.
705 * r31 will hold "old PTE"
708 * r28 is a hash value
709 * r27 is hashtab mask (maybe dynamic patched instead ?)
711 std r27,STK_REG(R27)(r1)
712 std r28,STK_REG(R28)(r1)
713 std r29,STK_REG(R29)(r1)
714 std r30,STK_REG(R30)(r1)
715 std r31,STK_REG(R31)(r1)
719 * Check permissions, atomically mark the linux PTE busy
724 /* Check access rights (access & ~(pte_val(*ptep))) */
726 bne- ht64_wrong_access
727 /* Check if PTE is busy */
728 andi. r0,r31,_PAGE_BUSY
729 /* If so, just bail out and refault if needed. Someone else
730 * is changing this PTE anyway and might hash it.
734 /* Check if PTE has the cache-inhibit bit set */
735 andi. r0,r31,_PAGE_NO_CACHE
736 /* If so, bail out and refault as a 4k page */
738 END_MMU_FTR_SECTION_IFCLR(MMU_FTR_CI_LARGE_PAGE)
739 /* Prepare new PTE value (turn access RW into DIRTY, then
740 * add BUSY and ACCESSED)
742 rlwinm r30,r4,32-9+7,31-7,31-7 /* _PAGE_RW -> _PAGE_DIRTY */
744 ori r30,r30,_PAGE_BUSY | _PAGE_ACCESSED
745 /* Write the linux PTE atomically (setting busy) */
752 * Insert/Update the HPTE in the hash table. At this point,
753 * r4 (access) is re-useable, we use it for the new HPTE flags
757 cmpdi r9,0 /* check segment size */
759 END_MMU_FTR_SECTION_IFSET(MMU_FTR_1T_SEGMENT)
760 /* Calc vpn and put it in r29 */
761 sldi r29,r5,SID_SHIFT - VPN_SHIFT
762 rldicl r28,r3,64 - VPN_SHIFT,64 - (SID_SHIFT - VPN_SHIFT)
765 /* Calculate hash value for primary slot and store it in r28
767 * r0 = (va >> 16) & ((1ul << (28 - 16)) -1)
769 rldicl r0,r3,64-16,52
770 xor r28,r5,r0 /* hash */
773 3: /* Calc vpn and put it in r29 */
774 sldi r29,r5,SID_SHIFT_1T - VPN_SHIFT
775 rldicl r28,r3,64 - VPN_SHIFT,64 - (SID_SHIFT_1T - VPN_SHIFT)
778 * calculate hash value for primary slot and
779 * store it in r28 for 1T segment
782 sldi r28,r5,25 /* vsid << 25 */
783 /* r0 = (va >> 16) & ((1ul << (40 - 16)) -1) */
784 rldicl r0,r3,64-16,40
785 xor r28,r28,r5 /* vsid ^ ( vsid << 25) */
786 xor r28,r28,r0 /* hash */
788 /* Convert linux PTE bits into HW equivalents */
789 4: andi. r3,r30,0x1fe /* Get basic set of flags */
790 xori r3,r3,HPTE_R_N /* _PAGE_EXEC -> NOEXEC */
791 rlwinm r0,r30,32-9+1,30,30 /* _PAGE_RW -> _PAGE_USER (r0) */
792 rlwinm r4,r30,32-7+1,30,30 /* _PAGE_DIRTY -> _PAGE_USER (r4) */
793 and r0,r0,r4 /* _PAGE_RW & _PAGE_DIRTY ->r0 bit 30*/
794 andc r0,r30,r0 /* r0 = pte & ~r0 */
795 rlwimi r3,r0,32-1,31,31 /* Insert result into PP lsb */
796 ori r3,r3,HPTE_R_C /* Always add "C" bit for perf. */
798 /* We eventually do the icache sync here (maybe inline that
799 * code rather than call a C function...)
804 bl .hash_page_do_lazy_icache
805 END_FTR_SECTION(CPU_FTR_NOEXECUTE|CPU_FTR_COHERENT_ICACHE, CPU_FTR_NOEXECUTE)
807 /* At this point, r3 contains new PP bits, save them in
808 * place of "access" in the param area (sic)
810 std r3,STK_PARAM(R4)(r1)
812 /* Get htab_hash_mask */
813 ld r4,htab_hash_mask@got(2)
814 ld r27,0(r4) /* htab_hash_mask -> r27 */
816 /* Check if we may already be in the hashtable, in this case, we
817 * go to out-of-line code to try to modify the HPTE
819 rldicl. r0,r31,64-12,48
823 /* Clear hpte bits in new pte (we also clear BUSY btw) and
824 * add _PAGE_HPTE_SUB0
826 lis r0,_PAGE_HPTEFLAGS@h
827 ori r0,r0,_PAGE_HPTEFLAGS@l
829 #ifdef CONFIG_PPC_64K_PAGES
830 oris r30,r30,_PAGE_HPTE_SUB0@h
832 ori r30,r30,_PAGE_HASHPTE
834 /* Phyical address in r5 */
835 rldicl r5,r31,64-PTE_RPN_SHIFT,PTE_RPN_SHIFT
836 sldi r5,r5,PAGE_SHIFT
838 /* Calculate primary group hash */
840 rldicr r3,r0,3,63-3 /* r0 = (hash & mask) << 3 */
842 /* Call ppc_md.hpte_insert */
843 ld r6,STK_PARAM(R4)(r1) /* Retrieve new pp bits */
844 mr r4,r29 /* Retrieve vpn */
845 li r7,0 /* !bolted, !secondary */
847 li r9,MMU_PAGE_64K /* actual page size */
848 ld r10,STK_PARAM(R9)(r1) /* segment size */
849 _GLOBAL(ht64_call_hpte_insert1)
850 bl . /* patched by htab_finish_init() */
852 bge ht64_pte_insert_ok /* Insertion successful */
853 cmpdi 0,r3,-2 /* Critical failure */
854 beq- ht64_pte_insert_failure
856 /* Now try secondary slot */
858 /* Phyical address in r5 */
859 rldicl r5,r31,64-PTE_RPN_SHIFT,PTE_RPN_SHIFT
860 sldi r5,r5,PAGE_SHIFT
862 /* Calculate secondary group hash */
864 rldicr r3,r0,3,63-3 /* r0 = (~hash & mask) << 3 */
866 /* Call ppc_md.hpte_insert */
867 ld r6,STK_PARAM(R4)(r1) /* Retrieve new pp bits */
868 mr r4,r29 /* Retrieve vpn */
869 li r7,HPTE_V_SECONDARY /* !bolted, secondary */
871 li r9,MMU_PAGE_64K /* actual page size */
872 ld r10,STK_PARAM(R9)(r1) /* segment size */
873 _GLOBAL(ht64_call_hpte_insert2)
874 bl . /* patched by htab_finish_init() */
876 bge+ ht64_pte_insert_ok /* Insertion successful */
877 cmpdi 0,r3,-2 /* Critical failure */
878 beq- ht64_pte_insert_failure
880 /* Both are full, we need to evict something */
882 /* Pick a random group based on TB */
888 rldicr r3,r0,3,63-3 /* r0 = (hash & mask) << 3 */
889 /* Call ppc_md.hpte_remove */
890 _GLOBAL(ht64_call_hpte_remove)
891 bl . /* patched by htab_finish_init() */
901 /* Insert slot number & secondary bit in PTE */
902 rldimi r30,r3,12,63-15
904 /* Write out the PTE with a normal write
905 * (maybe add eieio may be good still ?)
908 ld r6,STK_PARAM(R6)(r1)
912 ld r27,STK_REG(R27)(r1)
913 ld r28,STK_REG(R28)(r1)
914 ld r29,STK_REG(R29)(r1)
915 ld r30,STK_REG(R30)(r1)
916 ld r31,STK_REG(R31)(r1)
917 addi r1,r1,STACKFRAMESIZE
923 /* Keep PP bits in r4 and slot idx from the PTE around in r3 */
925 rlwinm r3,r31,32-12,29,31
927 /* Secondary group ? if yes, get a inverted hash value */
929 andi. r0,r31,_PAGE_F_SECOND
933 /* Calculate proper slot value for ppc_md.hpte_updatepp */
935 rldicr r0,r0,3,63-3 /* r0 = (hash & mask) << 3 */
936 add r3,r0,r3 /* add slot idx */
938 /* Call ppc_md.hpte_updatepp */
941 ld r7,STK_PARAM(R9)(r1) /* segment size */
942 ld r8,STK_PARAM(R8)(r1) /* get "local" param */
943 _GLOBAL(ht64_call_hpte_updatepp)
944 bl . /* patched by htab_finish_init() */
946 /* if we failed because typically the HPTE wasn't really here
947 * we try an insertion.
952 /* Clear the BUSY bit and Write out the PTE */
958 /* Bail out clearing reservation */
963 ht64_pte_insert_failure:
964 /* Bail out restoring old PTE */
965 ld r6,STK_PARAM(R6)(r1)
971 #endif /* CONFIG_PPC_HAS_HASH_64K */
974 /*****************************************************************************
976 * Huge pages implementation is in hugetlbpage.c *
978 *****************************************************************************/