3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
5 * SPDX-License-Identifier: GPL-2.0+
12 void flush_cache(ulong start_addr, ulong size)
15 ulong addr, start, end;
17 start = start_addr & ~(CONFIG_SYS_CACHELINE_SIZE - 1);
18 end = start_addr + size - 1;
20 for (addr = start; (addr <= end) && (addr >= start);
21 addr += CONFIG_SYS_CACHELINE_SIZE) {
22 asm volatile("dcbst 0,%0" : : "r" (addr) : "memory");
25 /* wait for all dcbst to complete on bus */
26 asm volatile("sync" : : : "memory");
28 for (addr = start; (addr <= end) && (addr >= start);
29 addr += CONFIG_SYS_CACHELINE_SIZE) {
30 asm volatile("icbi 0,%0" : : "r" (addr) : "memory");
33 asm volatile("sync" : : : "memory");
34 /* flush prefetch queue */
35 asm volatile("isync" : : : "memory");