2 * (C) Copyright 2000-2011
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
5 * SPDX-License-Identifier: GPL-2.0+
12 #include <stdio_dev.h>
22 #if defined(CONFIG_CMD_IDE)
25 #if defined(CONFIG_CMD_SCSI)
28 #if defined(CONFIG_CMD_KGDB)
31 #ifdef CONFIG_STATUS_LED
32 #include <status_led.h>
35 #ifdef CONFIG_GENERIC_MMC
39 #ifdef CONFIG_SYS_ALLOC_DPRAM
40 #if !defined(CONFIG_CPM2)
45 #if defined(CONFIG_BAB7xx)
49 #if defined(CONFIG_POST)
52 #if defined(CONFIG_LOGBUFFER)
55 #if defined(CONFIG_SYS_INIT_RAM_LOCK) && defined(CONFIG_E500)
56 #include <asm/cache.h>
62 #ifdef CONFIG_ADDR_MAP
70 #ifdef CONFIG_BITBANGMII
74 #ifdef CONFIG_SYS_UPDATE_FLASH_SIZE
75 extern int update_flash_size(int flash_size);
78 #if defined(CONFIG_SC3)
79 extern void sc3_read_eeprom(void);
82 #if defined(CONFIG_CMD_DOC)
85 #if defined(CONFIG_HARD_I2C) || defined(CONFIG_SYS_I2C)
91 static char *failed = "*** failed ***\n";
93 #if defined(CONFIG_OXC) || defined(CONFIG_RMU)
94 extern flash_info_t flash_info[];
97 #if defined(CONFIG_START_IDE)
98 extern int board_start_ide(void);
100 #include <environment.h>
102 DECLARE_GLOBAL_DATA_PTR;
104 #if !defined(CONFIG_SYS_MEM_TOP_HIDE)
105 #define CONFIG_SYS_MEM_TOP_HIDE 0
108 extern ulong __init_end;
109 extern ulong __bss_end;
110 ulong monitor_flash_len;
112 #if defined(CONFIG_CMD_BEDBUG)
113 #include <bedbug/type.h>
121 * All attempts to come up with a "common" initialization sequence
122 * that works for all boards and architectures failed: some of the
123 * requirements are just _too_ different. To get rid of the resulting
124 * mess of board dependend #ifdef'ed code we now make the whole
125 * initialization sequence configurable to the user.
127 * The requirements for any new initalization function is simple: it
128 * receives a pointer to the "global data" structure as it's only
129 * argument, and returns an integer return code, where 0 means
130 * "continue" and != 0 means "fatal error, hang the system".
132 typedef int (init_fnc_t)(void);
137 * Some of this code should be moved into the core functions,
138 * but let's get it working (again) first...
141 static int init_baudrate(void)
143 gd->baudrate = getenv_ulong("baudrate", 10, CONFIG_BAUDRATE);
147 /***********************************************************************/
149 static void __board_add_ram_info(int use_default)
151 /* please define platform specific board_add_ram_info() */
154 void board_add_ram_info(int)
155 __attribute__ ((weak, alias("__board_add_ram_info")));
157 static int __board_flash_wp_on(void)
160 * Most flashes can't be detected when write protection is enabled,
161 * so provide a way to let U-Boot gracefully ignore write protected
167 int board_flash_wp_on(void)
168 __attribute__ ((weak, alias("__board_flash_wp_on")));
170 static void __cpu_secondary_init_r(void)
174 void cpu_secondary_init_r(void)
175 __attribute__ ((weak, alias("__cpu_secondary_init_r")));
177 static int init_func_ram(void)
179 #ifdef CONFIG_BOARD_TYPES
180 int board_type = gd->board_type;
182 int board_type = 0; /* use dummy arg */
186 gd->ram_size = initdram(board_type);
188 if (gd->ram_size > 0) {
189 print_size(gd->ram_size, "");
190 board_add_ram_info(0);
198 /***********************************************************************/
200 #if defined(CONFIG_HARD_I2C) || defined(CONFIG_SYS_I2C)
201 static int init_func_i2c(void)
204 #ifdef CONFIG_SYS_I2C
207 i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
214 #if defined(CONFIG_HARD_SPI)
215 static int init_func_spi(void)
224 /***********************************************************************/
226 #if defined(CONFIG_WATCHDOG)
227 int init_func_watchdog_init(void)
229 puts(" Watchdog enabled\n");
234 int init_func_watchdog_reset(void)
239 #endif /* CONFIG_WATCHDOG */
242 * Initialization sequence
245 static init_fnc_t *init_sequence[] = {
246 #if defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx)
249 #if defined(CONFIG_BOARD_EARLY_INIT_F)
252 #if !defined(CONFIG_8xx_CPUCLK_DEFAULT)
253 get_clocks, /* get CPU and bus clocks (etc.) */
254 #if defined(CONFIG_TQM8xxL) && !defined(CONFIG_TQM866M) \
255 && !defined(CONFIG_TQM885D)
256 adjust_sdram_tbs_8xx,
260 #ifdef CONFIG_SYS_ALLOC_DPRAM
261 #if !defined(CONFIG_CPM2)
265 #if defined(CONFIG_BOARD_POSTCLK_INIT)
269 #if defined(CONFIG_8xx_CPUCLK_DEFAULT)
270 /* get CPU and bus clocks according to the environment variable */
272 /* adjust sdram refresh rate according to the new clock */
280 #if defined(CONFIG_MPC8260)
283 #endif /* CONFIG_MPC8260 */
284 #if defined(CONFIG_MPC83xx)
288 #if defined(CONFIG_MPC5xxx)
290 #endif /* CONFIG_MPC5xxx */
292 INIT_FUNC_WATCHDOG_INIT
293 #if defined(CONFIG_MISC_INIT_F)
296 INIT_FUNC_WATCHDOG_RESET
297 #if defined(CONFIG_HARD_I2C) || defined(CONFIG_SYS_I2C)
300 #if defined(CONFIG_HARD_SPI)
306 INIT_FUNC_WATCHDOG_RESET
308 #if defined(CONFIG_SYS_DRAM_TEST)
310 #endif /* CONFIG_SYS_DRAM_TEST */
311 INIT_FUNC_WATCHDOG_RESET
312 NULL, /* Terminate this list */
315 static int __fixup_cpu(void)
320 int fixup_cpu(void) __attribute__((weak, alias("__fixup_cpu")));
323 * This is the first part of the initialization sequence that is
324 * implemented in C, but still running from ROM.
326 * The main purpose is to provide a (serial) console interface as
327 * soon as possible (so we can see any error messages), and to
328 * initialize the RAM so that we can relocate the monitor code to
331 * Be aware of the restrictions: global data is read-only, BSS is not
332 * initialized, and stack space is limited to a few kB.
335 void board_init_f(ulong bootflag)
338 ulong len, addr, addr_sp;
341 init_fnc_t **init_fnc_ptr;
346 #ifdef CONFIG_DEEP_SLEEP
347 const ccsr_gur_t *gur = (void __iomem *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
348 struct ccsr_scfg *scfg = (void *)CONFIG_SYS_MPC85xx_SCFG;
350 typedef void (*func_t)(void);
351 func_t kernel_resume;
354 /* Pointer is writable since we allocated a register for it */
355 gd = (gd_t *) (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_GBL_DATA_OFFSET);
356 /* compiler optimization barrier needed for GCC >= 3.4 */
357 __asm__ __volatile__("":::"memory");
359 #if !defined(CONFIG_CPM2) && !defined(CONFIG_MPC512X) && \
360 !defined(CONFIG_MPC83xx) && !defined(CONFIG_MPC85xx) && \
361 !defined(CONFIG_MPC86xx)
362 /* Clear initial global data */
363 memset((void *) gd, 0, sizeof(gd_t));
366 for (init_fnc_ptr = init_sequence; *init_fnc_ptr; ++init_fnc_ptr)
367 if ((*init_fnc_ptr) () != 0)
370 #ifdef CONFIG_DEEP_SLEEP
371 /* Jump to kernel in deep sleep case */
372 if (in_be32(&gur->scrtsr[0]) & (1 << 3)) {
373 start_addr = in_be32(&scfg->sparecr[1]);
374 kernel_resume = (func_t)start_addr;
380 post_bootmode_init();
381 post_run(NULL, POST_ROM | post_bootmode_get(NULL));
387 * Now that we have DRAM mapped and working, we can
388 * relocate the code and continue running from DRAM.
390 * Reserve memory at end of RAM for (top down in that order):
391 * - area that won't get touched by U-Boot and Linux (optional)
392 * - kernel log buffer
396 * - board info struct
398 len = (ulong)&__bss_end - CONFIG_SYS_MONITOR_BASE;
401 * Subtract specified amount of memory to hide so that it won't
402 * get "touched" at all by U-Boot. By fixing up gd->ram_size
403 * the Linux kernel should now get passed the now "corrected"
404 * memory size and won't touch it either. This should work
405 * for arch/ppc and arch/powerpc. Only Linux board ports in
406 * arch/powerpc with bootwrapper support, that recalculate the
407 * memory size from the SDRAM controller setup will have to
410 gd->ram_size -= CONFIG_SYS_MEM_TOP_HIDE;
412 addr = CONFIG_SYS_SDRAM_BASE + get_effective_memsize();
414 #if defined(CONFIG_MP) && (defined(CONFIG_MPC86xx) || defined(CONFIG_E500))
416 * We need to make sure the location we intend to put secondary core
417 * boot code is reserved and not used by any part of u-boot
419 if (addr > determine_mp_bootpg(NULL)) {
420 addr = determine_mp_bootpg(NULL);
421 debug("Reserving MP boot page to %08lx\n", addr);
425 #ifdef CONFIG_LOGBUFFER
426 #ifndef CONFIG_ALT_LB_ADDR
427 /* reserve kernel log buffer */
428 addr -= (LOGBUFF_RESERVE);
429 debug("Reserving %dk for kernel logbuffer at %08lx\n", LOGBUFF_LEN,
436 * reserve protected RAM
438 reg = getenv_ulong("pram", 10, CONFIG_PRAM);
439 addr -= (reg << 10); /* size is in kB */
440 debug("Reserving %ldk for protected RAM at %08lx\n", reg, addr);
441 #endif /* CONFIG_PRAM */
443 /* round down to next 4 kB limit */
445 debug("Top of RAM usable for U-Boot at: %08lx\n", addr);
448 #ifdef CONFIG_FB_ADDR
449 gd->fb_base = CONFIG_FB_ADDR;
451 /* reserve memory for LCD display (always full pages) */
452 addr = lcd_setmem(addr);
454 #endif /* CONFIG_FB_ADDR */
455 #endif /* CONFIG_LCD */
457 #if defined(CONFIG_VIDEO) && defined(CONFIG_8xx)
458 /* reserve memory for video display (always full pages) */
459 addr = video_setmem(addr);
461 #endif /* CONFIG_VIDEO */
464 * reserve memory for U-Boot code, data & bss
465 * round down to next 4 kB limit
470 /* round down to next 64 kB limit so that IVPR stays aligned */
471 addr &= ~(65536 - 1);
474 debug("Reserving %ldk for U-Boot at: %08lx\n", len >> 10, addr);
477 * reserve memory for malloc() arena
479 addr_sp = addr - TOTAL_MALLOC_LEN;
480 debug("Reserving %dk for malloc() at: %08lx\n",
481 TOTAL_MALLOC_LEN >> 10, addr_sp);
484 * (permanently) allocate a Board Info struct
485 * and a permanent copy of the "global" data
487 addr_sp -= sizeof(bd_t);
488 bd = (bd_t *) addr_sp;
489 memset(bd, 0, sizeof(bd_t));
491 debug("Reserving %zu Bytes for Board Info at: %08lx\n",
492 sizeof(bd_t), addr_sp);
493 addr_sp -= sizeof(gd_t);
494 id = (gd_t *) addr_sp;
495 debug("Reserving %zu Bytes for Global Data at: %08lx\n",
496 sizeof(gd_t), addr_sp);
499 * Finally, we set up a new (bigger) stack.
501 * Leave some safety gap for SP, force alignment on 16 byte boundary
502 * Clear initial stack frame
506 s = (ulong *) addr_sp;
507 *s = 0; /* Terminate back chain */
508 *++s = 0; /* NULL return address */
509 debug("Stack Pointer at: %08lx\n", addr_sp);
512 * Save local variables to board info struct
515 bd->bi_memstart = CONFIG_SYS_SDRAM_BASE; /* start of memory */
516 bd->bi_memsize = gd->ram_size; /* size in bytes */
518 #ifdef CONFIG_SYS_SRAM_BASE
519 bd->bi_sramstart = CONFIG_SYS_SRAM_BASE; /* start of SRAM */
520 bd->bi_sramsize = CONFIG_SYS_SRAM_SIZE; /* size of SRAM */
523 #if defined(CONFIG_8xx) || defined(CONFIG_MPC8260) || defined(CONFIG_5xx) || \
524 defined(CONFIG_E500) || defined(CONFIG_MPC86xx)
525 bd->bi_immr_base = CONFIG_SYS_IMMR; /* base of IMMR register */
527 #if defined(CONFIG_MPC5xxx)
528 bd->bi_mbar_base = CONFIG_SYS_MBAR; /* base of internal registers */
530 #if defined(CONFIG_MPC83xx)
531 bd->bi_immrbar = CONFIG_SYS_IMMR;
535 bd->bi_intfreq = gd->cpu_clk; /* Internal Freq, in Hz */
536 bd->bi_busfreq = gd->bus_clk; /* Bus Freq, in Hz */
537 #if defined(CONFIG_CPM2)
538 bd->bi_cpmfreq = gd->arch.cpm_clk;
539 bd->bi_brgfreq = gd->arch.brg_clk;
540 bd->bi_sccfreq = gd->arch.scc_clk;
541 bd->bi_vco = gd->arch.vco_out;
542 #endif /* CONFIG_CPM2 */
543 #if defined(CONFIG_MPC512X)
544 bd->bi_ipsfreq = gd->arch.ips_clk;
545 #endif /* CONFIG_MPC512X */
546 #if defined(CONFIG_MPC5xxx)
547 bd->bi_ipbfreq = gd->arch.ipb_clk;
548 bd->bi_pcifreq = gd->pci_clk;
549 #endif /* CONFIG_MPC5xxx */
550 bd->bi_baudrate = gd->baudrate; /* Console Baudrate */
552 #ifdef CONFIG_SYS_EXTBDINFO
553 strncpy((char *) bd->bi_s_version, "1.2", sizeof(bd->bi_s_version));
554 strncpy((char *) bd->bi_r_version, U_BOOT_VERSION,
555 sizeof(bd->bi_r_version));
557 bd->bi_procfreq = gd->cpu_clk; /* Processor Speed, In Hz */
558 bd->bi_plb_busfreq = gd->bus_clk;
559 #if defined(CONFIG_405GP) || defined(CONFIG_405EP) || \
560 defined(CONFIG_440EP) || defined(CONFIG_440GR) || \
561 defined(CONFIG_440EPX) || defined(CONFIG_440GRX)
562 bd->bi_pci_busfreq = get_PCI_freq();
563 bd->bi_opbfreq = get_OPB_freq();
564 #elif defined(CONFIG_XILINX_405)
565 bd->bi_pci_busfreq = get_PCI_freq();
569 debug("New Stack Pointer is: %08lx\n", addr_sp);
573 gd->relocaddr = addr; /* Store relocation addr, useful for debug */
575 memcpy(id, (void *) gd, sizeof(gd_t));
577 relocate_code(addr_sp, id, addr);
579 /* NOTREACHED - relocate_code() does not return */
583 * This is the next part if the initialization sequence: we are now
584 * running from RAM and have a "normal" C environment, i. e. global
585 * data can be written, BSS has been cleared, the stack size in not
586 * that critical any more, etc.
588 void board_init_r(gd_t *id, ulong dest_addr)
593 #ifndef CONFIG_SYS_NO_FLASH
597 gd = id; /* initialize RAM version of global data */
600 gd->flags |= GD_FLG_RELOC; /* tell others: relocation done */
602 /* The Malloc area is immediately below the monitor copy in DRAM */
603 malloc_start = dest_addr - TOTAL_MALLOC_LEN;
605 #if defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx)
607 * The gd->arch.cpu pointer is set to an address in flash before
608 * relocation. We need to update it to point to the same CPU entry
611 gd->arch.cpu += dest_addr - CONFIG_SYS_MONITOR_BASE;
614 * If we didn't know the cpu mask & # cores, we can save them of
615 * now rather than 'computing' them constantly
620 #ifdef CONFIG_SYS_EXTRA_ENV_RELOC
622 * Some systems need to relocate the env_addr pointer early because the
623 * location it points to will get invalidated before env_relocate is
624 * called. One example is on systems that might use a L2 or L3 cache
625 * in SRAM mode and initialize that cache from SRAM mode back to being
626 * a cache in cpu_init_r.
628 gd->env_addr += dest_addr - CONFIG_SYS_MONITOR_BASE;
633 debug("Now running in RAM - U-Boot at: %08lx\n", dest_addr);
638 * Setup trap handlers
640 trap_init(dest_addr);
642 #ifdef CONFIG_ADDR_MAP
646 #if defined(CONFIG_BOARD_EARLY_INIT_R)
647 board_early_init_r();
650 monitor_flash_len = (ulong)&__init_end - dest_addr;
654 #ifdef CONFIG_LOGBUFFER
658 post_output_backlog();
663 #if defined(CONFIG_SYS_DELAYED_ICACHE)
664 icache_enable(); /* it's time to enable the instruction cache */
667 #if defined(CONFIG_SYS_INIT_RAM_LOCK) && defined(CONFIG_E500)
668 unlock_ram_in_cache(); /* it's time to unlock D-cache in e500 */
671 #if defined(CONFIG_PCI) && defined(CONFIG_SYS_EARLY_PCI_INIT)
673 * Do early PCI configuration _before_ the flash gets initialised,
674 * because PCU ressources are crucial for flash access on some boards.
678 #if defined(CONFIG_WINBOND_83C553)
680 * Initialise the ISA bridge
682 initialise_w83c553f();
687 mem_malloc_init(malloc_start, TOTAL_MALLOC_LEN);
689 #if !defined(CONFIG_SYS_NO_FLASH)
692 if (board_flash_wp_on()) {
693 printf("Uninitialized - Write Protect On\n");
694 /* Since WP is on, we can't find real size. Set to 0 */
696 } else if ((flash_size = flash_init()) > 0) {
697 #ifdef CONFIG_SYS_FLASH_CHECKSUM
698 print_size(flash_size, "");
700 * Compute and print flash CRC if flashchecksum is set to 'y'
702 * NOTE: Maybe we should add some WATCHDOG_RESET()? XXX
704 if (getenv_yesno("flashchecksum") == 1) {
707 (const unsigned char *)
708 CONFIG_SYS_FLASH_BASE, flash_size)
712 #else /* !CONFIG_SYS_FLASH_CHECKSUM */
713 print_size(flash_size, "\n");
714 #endif /* CONFIG_SYS_FLASH_CHECKSUM */
720 /* update start of FLASH memory */
721 bd->bi_flashstart = CONFIG_SYS_FLASH_BASE;
722 /* size of FLASH memory (final value) */
723 bd->bi_flashsize = flash_size;
725 #if defined(CONFIG_SYS_UPDATE_FLASH_SIZE)
726 /* Make a update of the Memctrl. */
727 update_flash_size(flash_size);
731 #if defined(CONFIG_OXC) || defined(CONFIG_RMU)
732 /* flash mapped at end of memory map */
733 bd->bi_flashoffset = CONFIG_SYS_TEXT_BASE + flash_size;
734 #elif CONFIG_SYS_MONITOR_BASE == CONFIG_SYS_FLASH_BASE
735 bd->bi_flashoffset = monitor_flash_len; /* reserved area for monitor */
737 #endif /* !CONFIG_SYS_NO_FLASH */
741 /* initialize higher level parts of CPU like time base and timers */
747 #if !defined(CONFIG_ENV_IS_IN_EEPROM)
753 #if defined(CONFIG_CMD_NAND)
756 nand_init(); /* go init the NAND */
759 #ifdef CONFIG_GENERIC_MMC
761 * MMC initialization is called before relocating env.
762 * Thus It is required that operations like pin multiplexer
763 * be put in board_init.
770 /* relocate environment function pointers etc. */
774 * after non-volatile devices & environment is setup and cpu code have
775 * another round to deal with any initialization that might require
776 * full access to the environment or loading of some image (firmware)
777 * from a non-volatile device
779 cpu_secondary_init_r();
782 * Fill in missing fields of bd_info.
783 * We do this here, where we have "normal" access to the
784 * environment; we used to do this still running from ROM,
785 * where had to use getenv_f(), which can be pretty slow when
786 * the environment is in EEPROM.
789 #if defined(CONFIG_SYS_EXTBDINFO)
790 #if defined(CONFIG_405GP) || defined(CONFIG_405EP)
791 #if defined(CONFIG_I2CFAST)
793 * set bi_iic_fast for linux taking environment variable
794 * "i2cfast" into account
797 if (getenv_yesno("i2cfast") == 1) {
798 bd->bi_iic_fast[0] = 1;
799 bd->bi_iic_fast[1] = 1;
802 #endif /* CONFIG_I2CFAST */
803 #endif /* CONFIG_405GP, CONFIG_405EP */
804 #endif /* CONFIG_SYS_EXTBDINFO */
806 #if defined(CONFIG_SC3)
810 #if defined(CONFIG_ID_EEPROM) || defined(CONFIG_SYS_I2C_MAC_OFFSET)
811 mac_read_from_eeprom();
815 if ((gd->board_type >> 16) == 2)
816 bd->bi_ethspeed = gd->board_type & 0xFFFF;
818 bd->bi_ethspeed = 0xFFFF;
821 #ifdef CONFIG_CMD_NET
822 /* kept around for legacy kernels only ... ignore the next section */
823 eth_getenv_enetaddr("ethaddr", bd->bi_enetaddr);
824 #ifdef CONFIG_HAS_ETH1
825 eth_getenv_enetaddr("eth1addr", bd->bi_enet1addr);
827 #ifdef CONFIG_HAS_ETH2
828 eth_getenv_enetaddr("eth2addr", bd->bi_enet2addr);
830 #ifdef CONFIG_HAS_ETH3
831 eth_getenv_enetaddr("eth3addr", bd->bi_enet3addr);
833 #ifdef CONFIG_HAS_ETH4
834 eth_getenv_enetaddr("eth4addr", bd->bi_enet4addr);
836 #ifdef CONFIG_HAS_ETH5
837 eth_getenv_enetaddr("eth5addr", bd->bi_enet5addr);
839 #endif /* CONFIG_CMD_NET */
843 #if defined(CONFIG_PCI) && !defined(CONFIG_SYS_EARLY_PCI_INIT)
845 * Do pci configuration
850 /** leave this here (after malloc(), environment and PCI are working) **/
851 /* Initialize stdio devices */
854 /* Initialize the jump table for applications */
857 #if defined(CONFIG_API)
862 /* Initialize the console (after the relocation and devices init) */
865 #if defined(CONFIG_MISC_INIT_R)
866 /* miscellaneous platform dependent initialisations */
871 if (bd->bi_ethspeed != 0xFFFF)
872 hermes_start_lxt980((int) bd->bi_ethspeed);
875 #if defined(CONFIG_CMD_KGDB)
881 debug("U-Boot relocated to %08lx\n", dest_addr);
888 #if defined(CONFIG_STATUS_LED) && defined(STATUS_LED_BOOT)
889 status_led_set(STATUS_LED_BOOT, STATUS_LED_BLINKING);
894 /* Initialize from environment */
895 load_addr = getenv_ulong("loadaddr", 16, load_addr);
899 #if defined(CONFIG_CMD_SCSI)
905 #if defined(CONFIG_CMD_DOC)
911 #ifdef CONFIG_BITBANGMII
914 #if defined(CONFIG_CMD_NET)
920 #if defined(CONFIG_CMD_NET) && defined(CONFIG_RESET_PHY_R)
922 debug("Reset Ethernet PHY\n");
927 post_run(NULL, POST_RAM | post_bootmode_get(0));
930 #if defined(CONFIG_CMD_PCMCIA) \
931 && !defined(CONFIG_CMD_IDE)
937 #if defined(CONFIG_CMD_IDE)
939 #ifdef CONFIG_IDE_8xx_PCCARD
944 #if defined(CONFIG_START_IDE)
945 if (board_start_ide())
952 #ifdef CONFIG_LAST_STAGE_INIT
955 * Some parts can be only initialized if all others (like
956 * Interrupts) are up and running (i.e. the PC-style ISA
962 #if defined(CONFIG_CMD_BEDBUG)
967 #if defined(CONFIG_PRAM) || defined(CONFIG_LOGBUFFER)
969 * Export available size of memory for Linux,
970 * taking into account the protected RAM at top of memory
977 pram = getenv_ulong("pram", 10, CONFIG_PRAM);
979 #ifdef CONFIG_LOGBUFFER
980 #ifndef CONFIG_ALT_LB_ADDR
981 /* Also take the logbuffer into account (pram is in kB) */
982 pram += (LOGBUFF_LEN + LOGBUFF_OVERHEAD) / 1024;
985 sprintf(memsz, "%ldk", (ulong) (bd->bi_memsize / 1024) - pram);
986 setenv("mem", memsz);
995 #ifdef CONFIG_MODEM_SUPPORT
997 extern int do_mdm_init;
999 do_mdm_init = gd->do_mdm_init;
1003 /* Initialization complete - start the monitor */
1005 /* main_loop() can return to retry autoboot, if so just run it again. */
1011 /* NOTREACHED - no way out of command loop except booting */
1014 #if 0 /* We could use plain global data, but the resulting code is bigger */
1016 * Pointer to initial global data area
1018 * Here we initialize it.
1020 #undef XTRN_DECLARE_GLOBAL_DATA_PTR
1021 #define XTRN_DECLARE_GLOBAL_DATA_PTR /* empty = allocate here */
1022 DECLARE_GLOBAL_DATA_PTR =
1023 (gd_t *) (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_GBL_DATA_OFFSET);
1026 /************************************************************************/