2 * Common boot and setup code for both 32-bit and 64-bit.
3 * Extracted from arch/powerpc/kernel/setup_64.c.
5 * Copyright (C) 2001 PPC64 Team, IBM Corp
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; either version
10 * 2 of the License, or (at your option) any later version.
15 #include <linux/export.h>
16 #include <linux/string.h>
17 #include <linux/sched.h>
18 #include <linux/init.h>
19 #include <linux/kernel.h>
20 #include <linux/reboot.h>
21 #include <linux/delay.h>
22 #include <linux/initrd.h>
23 #include <linux/platform_device.h>
24 #include <linux/seq_file.h>
25 #include <linux/ioport.h>
26 #include <linux/console.h>
27 #include <linux/screen_info.h>
28 #include <linux/root_dev.h>
29 #include <linux/notifier.h>
30 #include <linux/cpu.h>
31 #include <linux/unistd.h>
32 #include <linux/serial.h>
33 #include <linux/serial_8250.h>
34 #include <linux/percpu.h>
35 #include <linux/memblock.h>
36 #include <linux/of_platform.h>
37 #include <linux/hugetlb.h>
38 #include <asm/debugfs.h>
42 #include <asm/processor.h>
43 #include <asm/vdso_datapage.h>
44 #include <asm/pgtable.h>
47 #include <asm/machdep.h>
49 #include <asm/cputable.h>
50 #include <asm/sections.h>
51 #include <asm/firmware.h>
52 #include <asm/btext.h>
53 #include <asm/nvram.h>
54 #include <asm/setup.h>
56 #include <asm/iommu.h>
57 #include <asm/serial.h>
58 #include <asm/cache.h>
62 #include <asm/cputhreads.h>
63 #include <mm/mmu_decl.h>
64 #include <asm/fadump.h>
66 #include <asm/hugetlb.h>
67 #include <asm/livepatch.h>
68 #include <asm/mmu_context.h>
69 #include <asm/cpu_has_feature.h>
75 #define DBG(fmt...) udbg_printf(fmt)
80 /* The main machine-dep calls structure
82 struct machdep_calls ppc_md;
83 EXPORT_SYMBOL(ppc_md);
84 struct machdep_calls *machine_id;
85 EXPORT_SYMBOL(machine_id);
88 EXPORT_SYMBOL_GPL(boot_cpuid);
91 * These are used in binfmt_elf.c to put aux entries on the stack
92 * for each elf executable being started.
99 unsigned long klimit = (unsigned long) _end;
102 * This still seems to be needed... -- paulus
104 struct screen_info screen_info = {
107 .orig_video_cols = 80,
108 .orig_video_lines = 25,
109 .orig_video_isVGA = 1,
110 .orig_video_points = 16
112 #if defined(CONFIG_FB_VGA16_MODULE)
113 EXPORT_SYMBOL(screen_info);
116 /* Variables required to store legacy IO irq routing */
117 int of_i8042_kbd_irq;
118 EXPORT_SYMBOL_GPL(of_i8042_kbd_irq);
119 int of_i8042_aux_irq;
120 EXPORT_SYMBOL_GPL(of_i8042_aux_irq);
122 #ifdef __DO_IRQ_CANON
123 /* XXX should go elsewhere eventually */
124 int ppc_do_canonicalize_irqs;
125 EXPORT_SYMBOL(ppc_do_canonicalize_irqs);
128 #ifdef CONFIG_CRASH_CORE
129 /* This keeps a track of which one is the crashing cpu. */
130 int crashing_cpu = -1;
133 /* also used by kexec */
134 void machine_shutdown(void)
136 #ifdef CONFIG_FA_DUMP
138 * if fadump is active, cleanup the fadump registration before we
144 if (ppc_md.machine_shutdown)
145 ppc_md.machine_shutdown();
148 static void machine_hang(void)
150 pr_emerg("System Halted, OK to turn off power\n");
156 void machine_restart(char *cmd)
164 do_kernel_restart(cmd);
170 void machine_power_off(void)
179 /* Used by the G5 thermal driver */
180 EXPORT_SYMBOL_GPL(machine_power_off);
182 void (*pm_power_off)(void);
183 EXPORT_SYMBOL_GPL(pm_power_off);
185 void machine_halt(void)
196 DEFINE_PER_CPU(unsigned int, cpu_pvr);
199 static void show_cpuinfo_summary(struct seq_file *m)
201 struct device_node *root;
202 const char *model = NULL;
203 #if defined(CONFIG_SMP) && defined(CONFIG_PPC32)
204 unsigned long bogosum = 0;
206 for_each_online_cpu(i)
207 bogosum += loops_per_jiffy;
208 seq_printf(m, "total bogomips\t: %lu.%02lu\n",
209 bogosum/(500000/HZ), bogosum/(5000/HZ) % 100);
210 #endif /* CONFIG_SMP && CONFIG_PPC32 */
211 seq_printf(m, "timebase\t: %lu\n", ppc_tb_freq);
213 seq_printf(m, "platform\t: %s\n", ppc_md.name);
214 root = of_find_node_by_path("/");
216 model = of_get_property(root, "model", NULL);
218 seq_printf(m, "model\t\t: %s\n", model);
221 if (ppc_md.show_cpuinfo != NULL)
222 ppc_md.show_cpuinfo(m);
225 /* Display the amount of memory */
226 seq_printf(m, "Memory\t\t: %d MB\n",
227 (unsigned int)(total_memory / (1024 * 1024)));
231 static int show_cpuinfo(struct seq_file *m, void *v)
233 unsigned long cpu_id = (unsigned long)v - 1;
235 unsigned long proc_freq;
240 pvr = per_cpu(cpu_pvr, cpu_id);
242 pvr = mfspr(SPRN_PVR);
244 maj = (pvr >> 8) & 0xFF;
247 seq_printf(m, "processor\t: %lu\n", cpu_id);
248 seq_printf(m, "cpu\t\t: ");
250 if (cur_cpu_spec->pvr_mask && cur_cpu_spec->cpu_name)
251 seq_printf(m, "%s", cur_cpu_spec->cpu_name);
253 seq_printf(m, "unknown (%08x)", pvr);
255 #ifdef CONFIG_ALTIVEC
256 if (cpu_has_feature(CPU_FTR_ALTIVEC))
257 seq_printf(m, ", altivec supported");
258 #endif /* CONFIG_ALTIVEC */
263 if (cur_cpu_spec->cpu_features & CPU_FTR_TAU) {
264 #ifdef CONFIG_TAU_AVERAGE
265 /* more straightforward, but potentially misleading */
266 seq_printf(m, "temperature \t: %u C (uncalibrated)\n",
269 /* show the actual temp sensor range */
271 temp = cpu_temp_both(cpu_id);
272 seq_printf(m, "temperature \t: %u-%u C (uncalibrated)\n",
273 temp & 0xff, temp >> 16);
276 #endif /* CONFIG_TAU */
279 * Platforms that have variable clock rates, should implement
280 * the method ppc_md.get_proc_freq() that reports the clock
281 * rate of a given cpu. The rest can use ppc_proc_freq to
282 * report the clock rate that is same across all cpus.
284 if (ppc_md.get_proc_freq)
285 proc_freq = ppc_md.get_proc_freq(cpu_id);
287 proc_freq = ppc_proc_freq;
290 seq_printf(m, "clock\t\t: %lu.%06luMHz\n",
291 proc_freq / 1000000, proc_freq % 1000000);
293 if (ppc_md.show_percpuinfo != NULL)
294 ppc_md.show_percpuinfo(m, cpu_id);
296 /* If we are a Freescale core do a simple check so
297 * we dont have to keep adding cases in the future */
298 if (PVR_VER(pvr) & 0x8000) {
299 switch (PVR_VER(pvr)) {
300 case 0x8000: /* 7441/7450/7451, Voyager */
301 case 0x8001: /* 7445/7455, Apollo 6 */
302 case 0x8002: /* 7447/7457, Apollo 7 */
303 case 0x8003: /* 7447A, Apollo 7 PM */
304 case 0x8004: /* 7448, Apollo 8 */
305 case 0x800c: /* 7410, Nitro */
306 maj = ((pvr >> 8) & 0xF);
309 default: /* e500/book-e */
315 switch (PVR_VER(pvr)) {
316 case 0x0020: /* 403 family */
317 maj = PVR_MAJ(pvr) + 1;
320 case 0x1008: /* 740P/750P ?? */
321 maj = ((pvr >> 8) & 0xFF) - 1;
324 case 0x004e: /* POWER9 bits 12-15 give chip type */
325 maj = (pvr >> 8) & 0x0F;
329 maj = (pvr >> 8) & 0xFF;
335 seq_printf(m, "revision\t: %hd.%hd (pvr %04x %04x)\n",
336 maj, min, PVR_VER(pvr), PVR_REV(pvr));
339 seq_printf(m, "bogomips\t: %lu.%02lu\n",
340 loops_per_jiffy / (500000/HZ),
341 (loops_per_jiffy / (5000/HZ)) % 100);
345 /* If this is the last cpu, print the summary */
346 if (cpumask_next(cpu_id, cpu_online_mask) >= nr_cpu_ids)
347 show_cpuinfo_summary(m);
352 static void *c_start(struct seq_file *m, loff_t *pos)
354 if (*pos == 0) /* just in case, cpu 0 is not the first */
355 *pos = cpumask_first(cpu_online_mask);
357 *pos = cpumask_next(*pos - 1, cpu_online_mask);
358 if ((*pos) < nr_cpu_ids)
359 return (void *)(unsigned long)(*pos + 1);
363 static void *c_next(struct seq_file *m, void *v, loff_t *pos)
366 return c_start(m, pos);
369 static void c_stop(struct seq_file *m, void *v)
373 const struct seq_operations cpuinfo_op = {
377 .show = show_cpuinfo,
380 void __init check_for_initrd(void)
382 #ifdef CONFIG_BLK_DEV_INITRD
383 DBG(" -> check_for_initrd() initrd_start=0x%lx initrd_end=0x%lx\n",
384 initrd_start, initrd_end);
386 /* If we were passed an initrd, set the ROOT_DEV properly if the values
387 * look sensible. If not, clear initrd reference.
389 if (is_kernel_addr(initrd_start) && is_kernel_addr(initrd_end) &&
390 initrd_end > initrd_start)
391 ROOT_DEV = Root_RAM0;
393 initrd_start = initrd_end = 0;
396 pr_info("Found initrd at 0x%lx:0x%lx\n", initrd_start, initrd_end);
398 DBG(" <- check_for_initrd()\n");
399 #endif /* CONFIG_BLK_DEV_INITRD */
404 int threads_per_core, threads_per_subcore, threads_shift;
405 cpumask_t threads_core_mask;
406 EXPORT_SYMBOL_GPL(threads_per_core);
407 EXPORT_SYMBOL_GPL(threads_per_subcore);
408 EXPORT_SYMBOL_GPL(threads_shift);
409 EXPORT_SYMBOL_GPL(threads_core_mask);
411 static void __init cpu_init_thread_core_maps(int tpc)
415 threads_per_core = tpc;
416 threads_per_subcore = tpc;
417 cpumask_clear(&threads_core_mask);
419 /* This implementation only supports power of 2 number of threads
420 * for simplicity and performance
422 threads_shift = ilog2(tpc);
423 BUG_ON(tpc != (1 << threads_shift));
425 for (i = 0; i < tpc; i++)
426 cpumask_set_cpu(i, &threads_core_mask);
428 printk(KERN_INFO "CPU maps initialized for %d thread%s per core\n",
429 tpc, tpc > 1 ? "s" : "");
430 printk(KERN_DEBUG " (thread shift is %d)\n", threads_shift);
434 u32 *cpu_to_phys_id = NULL;
437 * setup_cpu_maps - initialize the following cpu maps:
441 * Having the possible map set up early allows us to restrict allocations
442 * of things like irqstacks to nr_cpu_ids rather than NR_CPUS.
444 * We do not initialize the online map here; cpus set their own bits in
445 * cpu_online_mask as they come up.
447 * This function is valid only for Open Firmware systems. finish_device_tree
448 * must be called before using this.
450 * While we're here, we may as well set the "physical" cpu ids in the paca.
452 * NOTE: This must match the parsing done in early_init_dt_scan_cpus.
454 void __init smp_setup_cpu_maps(void)
456 struct device_node *dn;
460 DBG("smp_setup_cpu_maps()\n");
462 cpu_to_phys_id = memblock_alloc(nr_cpu_ids * sizeof(u32),
465 panic("%s: Failed to allocate %zu bytes align=0x%zx\n",
466 __func__, nr_cpu_ids * sizeof(u32), __alignof__(u32));
468 for_each_node_by_type(dn, "cpu") {
469 const __be32 *intserv;
473 DBG(" * %pOF...\n", dn);
475 intserv = of_get_property(dn, "ibm,ppc-interrupt-server#s",
478 DBG(" ibm,ppc-interrupt-server#s -> %d threads\n",
481 DBG(" no ibm,ppc-interrupt-server#s -> 1 thread\n");
482 intserv = of_get_property(dn, "reg", &len);
484 cpu_be = cpu_to_be32(cpu);
485 /* XXX: what is this? uninitialized?? */
486 intserv = &cpu_be; /* assume logical == phys */
491 nthreads = len / sizeof(int);
493 for (j = 0; j < nthreads && cpu < nr_cpu_ids; j++) {
496 DBG(" thread %d -> cpu %d (hard id %d)\n",
497 j, cpu, be32_to_cpu(intserv[j]));
499 avail = of_device_is_available(dn);
501 avail = !of_property_match_string(dn,
502 "enable-method", "spin-table");
504 set_cpu_present(cpu, avail);
505 set_cpu_possible(cpu, true);
506 cpu_to_phys_id[cpu] = be32_to_cpu(intserv[j]);
510 if (cpu >= nr_cpu_ids) {
516 /* If no SMT supported, nthreads is forced to 1 */
517 if (!cpu_has_feature(CPU_FTR_SMT)) {
518 DBG(" SMT disabled ! nthreads forced to 1\n");
524 * On pSeries LPAR, we need to know how many cpus
525 * could possibly be added to this partition.
527 if (firmware_has_feature(FW_FEATURE_LPAR) &&
528 (dn = of_find_node_by_path("/rtas"))) {
529 int num_addr_cell, num_size_cell, maxcpus;
532 num_addr_cell = of_n_addr_cells(dn);
533 num_size_cell = of_n_size_cells(dn);
535 ireg = of_get_property(dn, "ibm,lrdr-capacity", NULL);
540 maxcpus = be32_to_cpup(ireg + num_addr_cell + num_size_cell);
542 /* Double maxcpus for processors which have SMT capability */
543 if (cpu_has_feature(CPU_FTR_SMT))
546 if (maxcpus > nr_cpu_ids) {
548 "Partition configured for %d cpus, "
549 "operating system maximum is %u.\n",
550 maxcpus, nr_cpu_ids);
551 maxcpus = nr_cpu_ids;
553 printk(KERN_INFO "Partition configured for %d cpus.\n",
556 for (cpu = 0; cpu < maxcpus; cpu++)
557 set_cpu_possible(cpu, true);
561 vdso_data->processorCount = num_present_cpus();
562 #endif /* CONFIG_PPC64 */
564 /* Initialize CPU <=> thread mapping/
566 * WARNING: We assume that the number of threads is the same for
567 * every CPU in the system. If that is not the case, then some code
568 * here will have to be reworked
570 cpu_init_thread_core_maps(nthreads);
572 /* Now that possible cpus are set, set nr_cpu_ids for later use */
577 #endif /* CONFIG_SMP */
579 #ifdef CONFIG_PCSPKR_PLATFORM
580 static __init int add_pcspkr(void)
582 struct device_node *np;
583 struct platform_device *pd;
586 np = of_find_compatible_node(NULL, NULL, "pnpPNP,100");
591 pd = platform_device_alloc("pcspkr", -1);
595 ret = platform_device_add(pd);
597 platform_device_put(pd);
601 device_initcall(add_pcspkr);
602 #endif /* CONFIG_PCSPKR_PLATFORM */
604 void probe_machine(void)
606 extern struct machdep_calls __machine_desc_start;
607 extern struct machdep_calls __machine_desc_end;
611 * Iterate all ppc_md structures until we find the proper
612 * one for the current machine type
614 DBG("Probing machine type ...\n");
617 * Check ppc_md is empty, if not we have a bug, ie, we setup an
618 * entry before probe_machine() which will be overwritten
620 for (i = 0; i < (sizeof(ppc_md) / sizeof(void *)); i++) {
621 if (((void **)&ppc_md)[i]) {
622 printk(KERN_ERR "Entry %d in ppc_md non empty before"
623 " machine probe !\n", i);
627 for (machine_id = &__machine_desc_start;
628 machine_id < &__machine_desc_end;
630 DBG(" %s ...", machine_id->name);
631 memcpy(&ppc_md, machine_id, sizeof(struct machdep_calls));
632 if (ppc_md.probe()) {
638 /* What can we do if we didn't find ? */
639 if (machine_id >= &__machine_desc_end) {
640 pr_err("No suitable machine description found !\n");
644 printk(KERN_INFO "Using %s machine description\n", ppc_md.name);
647 /* Match a class of boards, not a specific device configuration. */
648 int check_legacy_ioport(unsigned long base_port)
650 struct device_node *parent, *np = NULL;
655 if (!(np = of_find_compatible_node(NULL, NULL, "pnpPNP,303")))
656 np = of_find_compatible_node(NULL, NULL, "pnpPNP,f03");
658 parent = of_get_parent(np);
660 of_i8042_kbd_irq = irq_of_parse_and_map(parent, 0);
661 if (!of_i8042_kbd_irq)
662 of_i8042_kbd_irq = 1;
664 of_i8042_aux_irq = irq_of_parse_and_map(parent, 1);
665 if (!of_i8042_aux_irq)
666 of_i8042_aux_irq = 12;
672 np = of_find_node_by_type(NULL, "8042");
673 /* Pegasos has no device_type on its 8042 node, look for the
676 np = of_find_node_by_name(NULL, "8042");
678 of_i8042_kbd_irq = 1;
679 of_i8042_aux_irq = 12;
682 case FDC_BASE: /* FDC1 */
683 np = of_find_node_by_type(NULL, "fdc");
686 /* ipmi is supposed to fail here */
691 parent = of_get_parent(np);
693 if (of_node_is_type(parent, "isa"))
700 EXPORT_SYMBOL(check_legacy_ioport);
702 static int ppc_panic_event(struct notifier_block *this,
703 unsigned long event, void *ptr)
706 * panic does a local_irq_disable, but we really
707 * want interrupts to be hard disabled.
712 * If firmware-assisted dump has been registered then trigger
713 * firmware-assisted dump and let firmware handle everything else.
715 crash_fadump(NULL, ptr);
717 ppc_md.panic(ptr); /* May not return */
721 static struct notifier_block ppc_panic_block = {
722 .notifier_call = ppc_panic_event,
723 .priority = INT_MIN /* may not return; must be done last */
726 void __init setup_panic(void)
728 /* PPC64 always does a hard irq disable in its panic handler */
729 if (!IS_ENABLED(CONFIG_PPC64) && !ppc_md.panic)
731 atomic_notifier_chain_register(&panic_notifier_list, &ppc_panic_block);
734 #ifdef CONFIG_CHECK_CACHE_COHERENCY
736 * For platforms that have configurable cache-coherency. This function
737 * checks that the cache coherency setting of the kernel matches the setting
738 * left by the firmware, as indicated in the device tree. Since a mismatch
739 * will eventually result in DMA failures, we print * and error and call
740 * BUG() in that case.
743 #ifdef CONFIG_NOT_COHERENT_CACHE
744 #define KERNEL_COHERENCY 0
746 #define KERNEL_COHERENCY 1
749 static int __init check_cache_coherency(void)
751 struct device_node *np;
753 int devtree_coherency;
755 np = of_find_node_by_path("/");
756 prop = of_get_property(np, "coherency-off", NULL);
759 devtree_coherency = prop ? 0 : 1;
761 if (devtree_coherency != KERNEL_COHERENCY) {
763 "kernel coherency:%s != device tree_coherency:%s\n",
764 KERNEL_COHERENCY ? "on" : "off",
765 devtree_coherency ? "on" : "off");
772 late_initcall(check_cache_coherency);
773 #endif /* CONFIG_CHECK_CACHE_COHERENCY */
775 #ifdef CONFIG_DEBUG_FS
776 struct dentry *powerpc_debugfs_root;
777 EXPORT_SYMBOL(powerpc_debugfs_root);
779 static int powerpc_debugfs_init(void)
781 powerpc_debugfs_root = debugfs_create_dir("powerpc", NULL);
783 return powerpc_debugfs_root == NULL;
785 arch_initcall(powerpc_debugfs_init);
788 void ppc_printk_progress(char *s, unsigned short hex)
793 void arch_setup_pdev_archdata(struct platform_device *pdev)
795 pdev->archdata.dma_mask = DMA_BIT_MASK(32);
796 pdev->dev.dma_mask = &pdev->archdata.dma_mask;
799 static __init void print_system_info(void)
801 pr_info("-----------------------------------------------------\n");
802 #ifdef CONFIG_PPC_BOOK3S_64
803 pr_info("ppc64_pft_size = 0x%llx\n", ppc64_pft_size);
805 #ifdef CONFIG_PPC_BOOK3S_32
806 pr_info("Hash_size = 0x%lx\n", Hash_size);
808 pr_info("phys_mem_size = 0x%llx\n",
809 (unsigned long long)memblock_phys_mem_size());
811 pr_info("dcache_bsize = 0x%x\n", dcache_bsize);
812 pr_info("icache_bsize = 0x%x\n", icache_bsize);
813 if (ucache_bsize != 0)
814 pr_info("ucache_bsize = 0x%x\n", ucache_bsize);
816 pr_info("cpu_features = 0x%016lx\n", cur_cpu_spec->cpu_features);
817 pr_info(" possible = 0x%016lx\n",
818 (unsigned long)CPU_FTRS_POSSIBLE);
819 pr_info(" always = 0x%016lx\n",
820 (unsigned long)CPU_FTRS_ALWAYS);
821 pr_info("cpu_user_features = 0x%08x 0x%08x\n",
822 cur_cpu_spec->cpu_user_features,
823 cur_cpu_spec->cpu_user_features2);
824 pr_info("mmu_features = 0x%08x\n", cur_cpu_spec->mmu_features);
826 pr_info("firmware_features = 0x%016lx\n", powerpc_firmware_features);
829 #ifdef CONFIG_PPC_BOOK3S_64
831 pr_info("htab_address = 0x%p\n", htab_address);
833 pr_info("htab_hash_mask = 0x%lx\n", htab_hash_mask);
835 #ifdef CONFIG_PPC_BOOK3S_32
837 pr_info("Hash = 0x%p\n", Hash);
839 pr_info("Hash_mask = 0x%lx\n", Hash_mask);
842 if (PHYSICAL_START > 0)
843 pr_info("physical_start = 0x%llx\n",
844 (unsigned long long)PHYSICAL_START);
845 pr_info("-----------------------------------------------------\n");
849 static void smp_setup_pacas(void)
853 for_each_possible_cpu(cpu) {
854 if (cpu == smp_processor_id())
857 set_hard_smp_processor_id(cpu, cpu_to_phys_id[cpu]);
860 memblock_free(__pa(cpu_to_phys_id), nr_cpu_ids * sizeof(u32));
861 cpu_to_phys_id = NULL;
866 * Called into from start_kernel this initializes memblock, which is used
867 * to manage page allocation until mem_init is called.
869 void __init setup_arch(char **cmdline_p)
871 *cmdline_p = boot_command_line;
873 /* Set a half-reasonable default so udelay does something sensible */
874 loops_per_jiffy = 500000000 / HZ;
876 /* Unflatten the device-tree passed by prom_init or kexec */
877 unflatten_device_tree();
880 * Initialize cache line/block info from device-tree (on ppc64) or
881 * just cputable (on ppc32).
883 initialize_cache_info();
885 /* Initialize RTAS if available. */
888 /* Check if we have an initrd provided via the device-tree. */
891 /* Probe the machine type, establish ppc_md. */
894 /* Setup panic notifier if requested by the platform. */
898 * Configure ppc_md.power_save (ppc32 only, 64-bit machines do
899 * it from their respective probe() function.
903 /* Discover standard serial ports. */
904 find_legacy_serial_ports();
906 /* Register early console with the printk subsystem. */
907 register_early_udbg_console();
909 /* Setup the various CPU maps based on the device-tree. */
910 smp_setup_cpu_maps();
912 /* Initialize xmon. */
915 /* Check the SMT related command line arguments (ppc64). */
918 /* Parse memory topology */
919 mem_topology_setup();
922 * Release secondary cpus out of their spinloops at 0x60 now that
923 * we can map physical -> logical CPU ids.
925 * Freescale Book3e parts spin in a loop provided by firmware,
926 * so smp_release_cpus() does nothing for them.
931 /* On BookE, setup per-core TLB data structures. */
932 setup_tlb_core_data();
937 /* Print various info about the machine that has been gathered so far. */
940 /* Reserve large chunks of memory for use by CMA for KVM. */
943 klp_init_thread_info(&init_task);
945 init_mm.start_code = (unsigned long)_stext;
946 init_mm.end_code = (unsigned long) _etext;
947 init_mm.end_data = (unsigned long) _edata;
948 init_mm.brk = klimit;
950 #ifdef CONFIG_PPC_MM_SLICES
951 #if defined(CONFIG_PPC_8xx)
952 init_mm.context.slb_addr_limit = DEFAULT_MAP_WINDOW;
956 #ifdef CONFIG_SPAPR_TCE_IOMMU
957 mm_iommu_init(&init_mm);
959 irqstack_early_init();
960 exc_lvl_early_init();
961 emergency_stack_init();
965 early_memtest(min_low_pfn << PAGE_SHIFT, max_low_pfn << PAGE_SHIFT);
967 #ifdef CONFIG_DUMMY_CONSOLE
968 conswitchp = &dummy_con;
970 if (ppc_md.setup_arch)
973 setup_barrier_nospec();
978 /* Initialize the MMU context management stuff. */
982 /* Interrupt code needs to be 64K-aligned. */
983 if ((unsigned long)_stext & 0xffff)
984 panic("Kernelbase not 64K-aligned (0x%lx)!\n",
985 (unsigned long)_stext);