2 * This file contains the 64-bit "server" PowerPC variant
3 * of the low level exception handling including exception
4 * vectors, exception return, part of the slb and stab
5 * handling and other fixed offset specific things.
7 * This file is meant to be #included from head_64.S due to
8 * position dependent assembly.
10 * Most of this originates from head_64.S and thus has the same
15 #include <asm/hw_irq.h>
16 #include <asm/exception-64s.h>
17 #include <asm/ptrace.h>
18 #include <asm/cpuidle.h>
21 * We layout physical memory as follows:
22 * 0x0000 - 0x00ff : Secondary processor spin code
23 * 0x0100 - 0x17ff : pSeries Interrupt prologs
24 * 0x1800 - 0x4000 : interrupt support common interrupt prologs
25 * 0x4000 - 0x5fff : pSeries interrupts with IR=1,DR=1
26 * 0x6000 - 0x6fff : more interrupt support including for IR=1,DR=1
27 * 0x7000 - 0x7fff : FWNMI data area
28 * 0x8000 - 0x8fff : Initial (CPU0) segment table
29 * 0x9000 - : Early init and support code
31 /* Syscall routine is used twice, in reloc-off and reloc-on paths */
32 #define SYSCALL_PSERIES_1 \
36 END_FTR_SECTION_IFSET(CPU_FTR_REAL_LE) \
39 mfspr r11,SPRN_SRR0 ; \
42 #define SYSCALL_PSERIES_2_RFID \
43 mfspr r12,SPRN_SRR1 ; \
44 ld r10,PACAKBASE(r13) ; \
45 LOAD_HANDLER(r10, system_call_entry) ; \
46 mtspr SPRN_SRR0,r10 ; \
47 ld r10,PACAKMSR(r13) ; \
48 mtspr SPRN_SRR1,r10 ; \
50 b . ; /* prevent speculative execution */
52 #define SYSCALL_PSERIES_3 \
53 /* Fast LE/BE switch system call */ \
54 1: mfspr r12,SPRN_SRR1 ; \
55 xori r12,r12,MSR_LE ; \
56 mtspr SPRN_SRR1,r12 ; \
57 rfid ; /* return to userspace */ \
58 b . ; /* prevent speculative execution */
60 #if defined(CONFIG_RELOCATABLE)
62 * We can't branch directly so we do it via the CTR which
63 * is volatile across system calls.
65 #define SYSCALL_PSERIES_2_DIRECT \
67 ld r12,PACAKBASE(r13) ; \
68 LOAD_HANDLER(r12, system_call_entry) ; \
70 mfspr r12,SPRN_SRR1 ; \
71 /* Re-use of r13... No spare regs to do this */ \
74 GET_PACA(r13) ; /* get r13 back */ \
77 /* We can branch directly */
78 #define SYSCALL_PSERIES_2_DIRECT \
79 mfspr r12,SPRN_SRR1 ; \
81 mtmsrd r10,1 ; /* Set RI (EE=0) */ \
82 b system_call_common ;
86 * This is the start of the interrupt handlers for pSeries
87 * This code runs with relocation off.
88 * Code from here to __end_interrupts gets copied down to real
89 * address 0x100 when we are running a relocatable kernel.
90 * Therefore any relative branches in this section must only
91 * branch to labels in this section.
94 .globl __start_interrupts
97 .globl system_reset_pSeries;
100 #ifdef CONFIG_PPC_P7_NAP
102 /* Running native on arch 2.06 or later, check if we are
103 * waking up from nap/sleep/winkle.
106 rlwinm. r13,r13,47-31,30,31
111 bl pnv_restore_hyp_resource
113 li r0,PNV_THREAD_RUNNING
114 stb r0,PACA_THREAD_IDLE_STATE(r13) /* Clear thread state */
116 #ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
117 li r0,KVM_HWTHREAD_IN_KERNEL
118 stb r0,HSTATE_HWTHREAD_STATE(r13)
119 /* Order setting hwthread_state vs. testing hwthread_req */
121 lbz r0,HSTATE_HWTHREAD_REQ(r13)
128 /* Return SRR1 from power7_nap() */
132 2: b pnv_wakeup_noloss
135 END_FTR_SECTION_IFSET(CPU_FTR_HVMODE | CPU_FTR_ARCH_206)
136 #endif /* CONFIG_PPC_P7_NAP */
137 EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, system_reset_common, EXC_STD,
141 machine_check_pSeries_1:
142 /* This is moved out of line as it can be patched by FW, but
143 * some code path might still want to branch into the original
146 SET_SCRATCH0(r13) /* save r13 */
147 #ifdef CONFIG_PPC_P7_NAP
149 /* Running native on arch 2.06 or later, check if we are
150 * waking up from nap. We only handle no state loss and
151 * supervisor state loss. We do -not- handle hypervisor
152 * state loss at this time.
155 rlwinm. r13,r13,47-31,30,31
156 OPT_GET_SPR(r13, SPRN_CFAR, CPU_FTR_CFAR)
160 rlwinm. r13,r13,47-31,30,31
161 /* waking up from powersave (nap) state */
163 /* Total loss of HV state is fatal. let's just stay stuck here */
164 OPT_GET_SPR(r13, SPRN_CFAR, CPU_FTR_CFAR)
167 OPT_SET_SPR(r13, SPRN_CFAR, CPU_FTR_CFAR)
168 END_FTR_SECTION_IFSET(CPU_FTR_HVMODE | CPU_FTR_ARCH_206)
169 #endif /* CONFIG_PPC_P7_NAP */
170 EXCEPTION_PROLOG_0(PACA_EXMC)
172 b machine_check_powernv_early
174 b machine_check_pSeries_0
175 ALT_FTR_SECTION_END_IFSET(CPU_FTR_HVMODE)
178 .globl data_access_pSeries
181 EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, data_access_common, EXC_STD,
185 .globl data_access_slb_pSeries
186 data_access_slb_pSeries:
188 EXCEPTION_PROLOG_0(PACA_EXSLB)
189 EXCEPTION_PROLOG_1(PACA_EXSLB, KVMTEST, 0x380)
190 std r3,PACA_EXSLB+EX_R3(r13)
193 #ifndef CONFIG_RELOCATABLE
197 * We can't just use a direct branch to slb_miss_realmode
198 * because the distance from here to there depends on where
199 * the kernel ends up being put.
202 ld r10,PACAKBASE(r13)
203 LOAD_HANDLER(r10, slb_miss_realmode)
208 STD_EXCEPTION_PSERIES(0x400, instruction_access)
211 .globl instruction_access_slb_pSeries
212 instruction_access_slb_pSeries:
214 EXCEPTION_PROLOG_0(PACA_EXSLB)
215 EXCEPTION_PROLOG_1(PACA_EXSLB, KVMTEST, 0x480)
216 std r3,PACA_EXSLB+EX_R3(r13)
217 mfspr r3,SPRN_SRR0 /* SRR0 is faulting address */
219 #ifndef CONFIG_RELOCATABLE
223 ld r10,PACAKBASE(r13)
224 LOAD_HANDLER(r10, slb_miss_realmode)
229 /* We open code these as we can't have a ". = x" (even with
230 * x = "." within a feature section
233 .globl hardware_interrupt_pSeries;
234 .globl hardware_interrupt_hv;
235 hardware_interrupt_pSeries:
236 hardware_interrupt_hv:
238 _MASKABLE_EXCEPTION_PSERIES(0x502, hardware_interrupt,
239 EXC_HV, SOFTEN_TEST_HV)
240 KVM_HANDLER(PACA_EXGEN, EXC_HV, 0x502)
242 _MASKABLE_EXCEPTION_PSERIES(0x500, hardware_interrupt,
243 EXC_STD, SOFTEN_TEST_PR)
244 KVM_HANDLER(PACA_EXGEN, EXC_STD, 0x500)
245 ALT_FTR_SECTION_END_IFSET(CPU_FTR_HVMODE | CPU_FTR_ARCH_206)
247 STD_EXCEPTION_PSERIES(0x600, alignment)
248 KVM_HANDLER(PACA_EXGEN, EXC_STD, 0x600)
250 STD_EXCEPTION_PSERIES(0x700, program_check)
251 KVM_HANDLER(PACA_EXGEN, EXC_STD, 0x700)
253 STD_EXCEPTION_PSERIES(0x800, fp_unavailable)
254 KVM_HANDLER(PACA_EXGEN, EXC_STD, 0x800)
257 .globl decrementer_pSeries
259 _MASKABLE_EXCEPTION_PSERIES(0x900, decrementer, EXC_STD, SOFTEN_TEST_PR)
261 STD_EXCEPTION_HV(0x980, 0x982, hdecrementer)
263 MASKABLE_EXCEPTION_PSERIES(0xa00, 0xa00, doorbell_super)
264 KVM_HANDLER(PACA_EXGEN, EXC_STD, 0xa00)
266 STD_EXCEPTION_PSERIES(0xb00, trap_0b)
267 KVM_HANDLER(PACA_EXGEN, EXC_STD, 0xb00)
270 .globl system_call_pSeries
273 * If CONFIG_KVM_BOOK3S_64_HANDLER is set, save the PPR (on systems
274 * that support it) before changing to HMT_MEDIUM. That allows the KVM
275 * code to save that value into the guest state (it is the guest's PPR
276 * value). Otherwise just change to HMT_MEDIUM as userspace has
277 * already saved the PPR.
279 #ifdef CONFIG_KVM_BOOK3S_64_HANDLER
282 std r9,PACA_EXGEN+EX_R9(r13)
283 OPT_GET_SPR(r9, SPRN_PPR, CPU_FTR_HAS_PPR);
285 std r10,PACA_EXGEN+EX_R10(r13)
286 OPT_SAVE_REG_TO_PACA(PACA_EXGEN+EX_PPR, r9, CPU_FTR_HAS_PPR);
294 SYSCALL_PSERIES_2_RFID
296 KVM_HANDLER(PACA_EXGEN, EXC_STD, 0xc00)
298 STD_EXCEPTION_PSERIES(0xd00, single_step)
299 KVM_HANDLER(PACA_EXGEN, EXC_STD, 0xd00)
301 /* At 0xe??? we have a bunch of hypervisor exceptions, we branch
302 * out of line to handle them
305 hv_data_storage_trampoline:
307 EXCEPTION_PROLOG_0(PACA_EXGEN)
311 hv_instr_storage_trampoline:
313 EXCEPTION_PROLOG_0(PACA_EXGEN)
317 emulation_assist_trampoline:
319 EXCEPTION_PROLOG_0(PACA_EXGEN)
320 b emulation_assist_hv
323 hv_exception_trampoline:
325 EXCEPTION_PROLOG_0(PACA_EXGEN)
326 b hmi_exception_early
329 hv_doorbell_trampoline:
331 EXCEPTION_PROLOG_0(PACA_EXGEN)
335 hv_virt_irq_trampoline:
337 EXCEPTION_PROLOG_0(PACA_EXGEN)
340 /* We need to deal with the Altivec unavailable exception
341 * here which is at 0xf20, thus in the middle of the
342 * prolog code of the PerformanceMonitor one. A little
343 * trickery is thus necessary
346 performance_monitor_pseries_trampoline:
348 EXCEPTION_PROLOG_0(PACA_EXGEN)
349 b performance_monitor_pSeries
352 altivec_unavailable_pseries_trampoline:
354 EXCEPTION_PROLOG_0(PACA_EXGEN)
355 b altivec_unavailable_pSeries
358 vsx_unavailable_pseries_trampoline:
360 EXCEPTION_PROLOG_0(PACA_EXGEN)
361 b vsx_unavailable_pSeries
364 facility_unavailable_trampoline:
366 EXCEPTION_PROLOG_0(PACA_EXGEN)
367 b facility_unavailable_pSeries
370 hv_facility_unavailable_trampoline:
372 EXCEPTION_PROLOG_0(PACA_EXGEN)
373 b facility_unavailable_hv
375 #ifdef CONFIG_CBE_RAS
376 STD_EXCEPTION_HV(0x1200, 0x1202, cbe_system_error)
377 KVM_HANDLER_SKIP(PACA_EXGEN, EXC_HV, 0x1202)
378 #endif /* CONFIG_CBE_RAS */
380 STD_EXCEPTION_PSERIES(0x1300, instruction_breakpoint)
381 KVM_HANDLER_SKIP(PACA_EXGEN, EXC_STD, 0x1300)
384 .global denorm_exception_hv
386 mtspr SPRN_SPRG_HSCRATCH0,r13
387 EXCEPTION_PROLOG_0(PACA_EXGEN)
388 EXCEPTION_PROLOG_1(PACA_EXGEN, NOTEST, 0x1500)
390 #ifdef CONFIG_PPC_DENORMALISATION
392 mfspr r11,SPRN_HSRR0 /* save HSRR0 */
393 andis. r10,r10,(HSRR1_DENORM)@h /* denorm? */
394 addi r11,r11,-4 /* HSRR0 is next instruction */
399 EXCEPTION_PROLOG_PSERIES_1(denorm_common, EXC_HV)
400 KVM_HANDLER_SKIP(PACA_EXGEN, EXC_STD, 0x1500)
402 #ifdef CONFIG_CBE_RAS
403 STD_EXCEPTION_HV(0x1600, 0x1602, cbe_maintenance)
404 KVM_HANDLER_SKIP(PACA_EXGEN, EXC_HV, 0x1602)
405 #endif /* CONFIG_CBE_RAS */
407 STD_EXCEPTION_PSERIES(0x1700, altivec_assist)
408 KVM_HANDLER(PACA_EXGEN, EXC_STD, 0x1700)
410 #ifdef CONFIG_CBE_RAS
411 STD_EXCEPTION_HV(0x1800, 0x1802, cbe_thermal)
412 KVM_HANDLER_SKIP(PACA_EXGEN, EXC_HV, 0x1802)
415 #endif /* CONFIG_CBE_RAS */
418 /*** Out of line interrupts support ***/
421 /* moved from 0x200 */
422 machine_check_powernv_early:
424 EXCEPTION_PROLOG_1(PACA_EXMC, NOTEST, 0x200)
429 * Original R9 to R13 is saved on PACA_EXMC
431 * Switch to mc_emergency stack and handle re-entrancy (we limit
432 * the nested MCE upto level 4 to avoid stack overflow).
433 * Save MCE registers srr1, srr0, dar and dsisr and then set ME=1
435 * We use paca->in_mce to check whether this is the first entry or
436 * nested machine check. We increment paca->in_mce to track nested
439 * If this is the first entry then set stack pointer to
440 * paca->mc_emergency_sp, otherwise r1 is already pointing to
441 * stack frame on mc_emergency stack.
443 * NOTE: We are here with MSR_ME=0 (off), which means we risk a
444 * checkstop if we get another machine check exception before we do
445 * rfid with MSR_ME=1.
447 mr r11,r1 /* Save r1 */
448 lhz r10,PACA_IN_MCE(r13)
449 cmpwi r10,0 /* Are we in nested machine check */
450 bne 0f /* Yes, we are. */
451 /* First machine check entry */
452 ld r1,PACAMCEMERGSP(r13) /* Use MC emergency stack */
453 0: subi r1,r1,INT_FRAME_SIZE /* alloc stack frame */
454 addi r10,r10,1 /* increment paca->in_mce */
455 sth r10,PACA_IN_MCE(r13)
456 /* Limit nested MCE to level 4 to avoid stack overflow */
458 bgt 2f /* Check if we hit limit of 4 */
459 std r11,GPR1(r1) /* Save r1 on the stack. */
460 std r11,0(r1) /* make stack chain pointer */
461 mfspr r11,SPRN_SRR0 /* Save SRR0 */
463 mfspr r11,SPRN_SRR1 /* Save SRR1 */
465 mfspr r11,SPRN_DAR /* Save DAR */
467 mfspr r11,SPRN_DSISR /* Save DSISR */
469 std r9,_CCR(r1) /* Save CR in stackframe */
470 /* Save r9 through r13 from EXMC save area to stack frame. */
471 EXCEPTION_PROLOG_COMMON_2(PACA_EXMC)
472 mfmsr r11 /* get MSR value */
473 ori r11,r11,MSR_ME /* turn on ME bit */
474 ori r11,r11,MSR_RI /* turn on RI bit */
475 ld r12,PACAKBASE(r13) /* get high part of &label */
476 LOAD_HANDLER(r12, machine_check_handle_early)
477 1: mtspr SPRN_SRR0,r12
480 b . /* prevent speculative execution */
482 /* Stack overflow. Stay on emergency stack and panic.
483 * Keep the ME bit off while panic-ing, so that if we hit
484 * another machine check we checkstop.
486 addi r1,r1,INT_FRAME_SIZE /* go back to previous stack frame */
488 ld r12,PACAKBASE(r13)
489 LOAD_HANDLER(r12, unrecover_mce)
491 andc r11,r11,r10 /* Turn off MSR_ME */
493 b . /* prevent speculative execution */
494 END_FTR_SECTION_IFSET(CPU_FTR_HVMODE)
496 machine_check_pSeries:
497 .globl machine_check_fwnmi
499 SET_SCRATCH0(r13) /* save r13 */
500 EXCEPTION_PROLOG_0(PACA_EXMC)
501 machine_check_pSeries_0:
502 EXCEPTION_PROLOG_1(PACA_EXMC, KVMTEST, 0x200)
503 EXCEPTION_PROLOG_PSERIES_1(machine_check_common, EXC_STD)
504 KVM_HANDLER_SKIP(PACA_EXMC, EXC_STD, 0x200)
505 KVM_HANDLER_SKIP(PACA_EXGEN, EXC_STD, 0x300)
506 KVM_HANDLER_SKIP(PACA_EXSLB, EXC_STD, 0x380)
507 KVM_HANDLER(PACA_EXGEN, EXC_STD, 0x400)
508 KVM_HANDLER(PACA_EXSLB, EXC_STD, 0x480)
509 KVM_HANDLER(PACA_EXGEN, EXC_STD, 0x900)
510 KVM_HANDLER(PACA_EXGEN, EXC_HV, 0x982)
512 #ifdef CONFIG_PPC_DENORMALISATION
516 * To denormalise we need to move a copy of the register to itself.
517 * For POWER6 do that here for all FP regs.
520 ori r10,r10,(MSR_FP|MSR_FE0|MSR_FE1)
521 xori r10,r10,(MSR_FE0|MSR_FE1)
525 #define FMR2(n) fmr (n), (n) ; fmr n+1, n+1
526 #define FMR4(n) FMR2(n) ; FMR2(n+2)
527 #define FMR8(n) FMR4(n) ; FMR4(n+4)
528 #define FMR16(n) FMR8(n) ; FMR8(n+8)
529 #define FMR32(n) FMR16(n) ; FMR16(n+16)
534 * To denormalise we need to move a copy of the register to itself.
535 * For POWER7 do that here for the first 32 VSX registers only.
538 oris r10,r10,MSR_VSX@h
542 #define XVCPSGNDP2(n) XVCPSGNDP(n,n,n) ; XVCPSGNDP(n+1,n+1,n+1)
543 #define XVCPSGNDP4(n) XVCPSGNDP2(n) ; XVCPSGNDP2(n+2)
544 #define XVCPSGNDP8(n) XVCPSGNDP4(n) ; XVCPSGNDP4(n+4)
545 #define XVCPSGNDP16(n) XVCPSGNDP8(n) ; XVCPSGNDP8(n+8)
546 #define XVCPSGNDP32(n) XVCPSGNDP16(n) ; XVCPSGNDP16(n+16)
549 ALT_FTR_SECTION_END_IFCLR(CPU_FTR_ARCH_206)
553 END_FTR_SECTION_IFCLR(CPU_FTR_ARCH_207S)
555 * To denormalise we need to move a copy of the register to itself.
556 * For POWER8 we need to do that for all 64 VSX registers
562 ld r9,PACA_EXGEN+EX_R9(r13)
563 RESTORE_PPR_PACA(PACA_EXGEN, r10)
565 ld r10,PACA_EXGEN+EX_CFAR(r13)
567 END_FTR_SECTION_IFSET(CPU_FTR_CFAR)
568 ld r10,PACA_EXGEN+EX_R10(r13)
569 ld r11,PACA_EXGEN+EX_R11(r13)
570 ld r12,PACA_EXGEN+EX_R12(r13)
571 ld r13,PACA_EXGEN+EX_R13(r13)
577 /* moved from 0xe00 */
578 STD_EXCEPTION_HV_OOL(0xe02, h_data_storage)
579 KVM_HANDLER_SKIP(PACA_EXGEN, EXC_HV, 0xe02)
580 STD_EXCEPTION_HV_OOL(0xe22, h_instr_storage)
581 KVM_HANDLER(PACA_EXGEN, EXC_HV, 0xe22)
582 STD_EXCEPTION_HV_OOL(0xe42, emulation_assist)
583 KVM_HANDLER(PACA_EXGEN, EXC_HV, 0xe42)
584 MASKABLE_EXCEPTION_HV_OOL(0xe62, hmi_exception)
585 KVM_HANDLER(PACA_EXGEN, EXC_HV, 0xe62)
587 MASKABLE_EXCEPTION_HV_OOL(0xe82, h_doorbell)
588 KVM_HANDLER(PACA_EXGEN, EXC_HV, 0xe82)
590 MASKABLE_EXCEPTION_HV_OOL(0xea2, h_virt_irq)
591 KVM_HANDLER(PACA_EXGEN, EXC_HV, 0xea2)
593 /* moved from 0xf00 */
594 STD_EXCEPTION_PSERIES_OOL(0xf00, performance_monitor)
595 KVM_HANDLER(PACA_EXGEN, EXC_STD, 0xf00)
596 STD_EXCEPTION_PSERIES_OOL(0xf20, altivec_unavailable)
597 KVM_HANDLER(PACA_EXGEN, EXC_STD, 0xf20)
598 STD_EXCEPTION_PSERIES_OOL(0xf40, vsx_unavailable)
599 KVM_HANDLER(PACA_EXGEN, EXC_STD, 0xf40)
600 STD_EXCEPTION_PSERIES_OOL(0xf60, facility_unavailable)
601 KVM_HANDLER(PACA_EXGEN, EXC_STD, 0xf60)
602 STD_EXCEPTION_HV_OOL(0xf82, facility_unavailable)
603 KVM_HANDLER(PACA_EXGEN, EXC_HV, 0xf82)
606 * An interrupt came in while soft-disabled. We set paca->irq_happened, then:
607 * - If it was a decrementer interrupt, we bump the dec to max and and return.
608 * - If it was a doorbell we return immediately since doorbells are edge
609 * triggered and won't automatically refire.
610 * - If it was a HMI we return immediately since we handled it in realmode
611 * and it won't refire.
612 * - else we hard disable and return.
613 * This is called with r10 containing the value to OR to the paca field.
615 #define MASKED_INTERRUPT(_H) \
616 masked_##_H##interrupt: \
617 std r11,PACA_EXGEN+EX_R11(r13); \
618 lbz r11,PACAIRQHAPPENED(r13); \
620 stb r11,PACAIRQHAPPENED(r13); \
621 cmpwi r10,PACA_IRQ_DEC; \
624 ori r10,r10,0xffff; \
625 mtspr SPRN_DEC,r10; \
627 1: cmpwi r10,PACA_IRQ_DBELL; \
629 cmpwi r10,PACA_IRQ_HMI; \
631 mfspr r10,SPRN_##_H##SRR1; \
632 rldicl r10,r10,48,1; /* clear MSR_EE */ \
634 mtspr SPRN_##_H##SRR1,r10; \
636 ld r9,PACA_EXGEN+EX_R9(r13); \
637 ld r10,PACA_EXGEN+EX_R10(r13); \
638 ld r11,PACA_EXGEN+EX_R11(r13); \
647 * Called from arch_local_irq_enable when an interrupt needs
648 * to be resent. r3 contains 0x500, 0x900, 0xa00 or 0xe80 to indicate
649 * which kind of interrupt. MSR:EE is already off. We generate a
650 * stackframe like if a real interrupt had happened.
652 * Note: While MSR:EE is off, we need to make sure that _MSR
653 * in the generated frame has EE set to 1 or the exception
654 * handler will not properly re-enable them.
656 _GLOBAL(__replay_interrupt)
657 /* We are going to jump to the exception common code which
658 * will retrieve various register values from the PACA which
659 * we don't give a damn about, so we don't bother storing them.
666 beq decrementer_common
668 beq hardware_interrupt_common
671 beq h_doorbell_common
673 beq h_virt_irq_common
675 beq hmi_exception_common
678 beq doorbell_super_common
679 ALT_FTR_SECTION_END_IFSET(CPU_FTR_HVMODE)
682 #ifdef CONFIG_PPC_PSERIES
684 * Vectors for the FWNMI option. Share common code.
686 .globl system_reset_fwnmi
689 SET_SCRATCH0(r13) /* save r13 */
690 EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, system_reset_common, EXC_STD,
693 #endif /* CONFIG_PPC_PSERIES */
695 #ifdef CONFIG_KVM_BOOK3S_64_HANDLER
696 kvmppc_skip_interrupt:
698 * Here all GPRs are unchanged from when the interrupt happened
699 * except for r13, which is saved in SPRG_SCRATCH0.
708 kvmppc_skip_Hinterrupt:
710 * Here all GPRs are unchanged from when the interrupt happened
711 * except for r13, which is saved in SPRG_SCRATCH0.
713 mfspr r13, SPRN_HSRR0
715 mtspr SPRN_HSRR0, r13
722 * Ensure that any handlers that get invoked from the exception prologs
723 * above are below the first 64KB (0x10000) of the kernel image because
724 * the prologs assemble the addresses of these handlers using the
725 * LOAD_HANDLER macro, which uses an ori instruction.
728 /*** Common interrupt handlers ***/
730 STD_EXCEPTION_COMMON(0x100, system_reset, system_reset_exception)
732 STD_EXCEPTION_COMMON_ASYNC(0x500, hardware_interrupt, do_IRQ)
733 STD_EXCEPTION_COMMON_ASYNC(0x900, decrementer, timer_interrupt)
734 STD_EXCEPTION_COMMON(0x980, hdecrementer, hdec_interrupt)
735 #ifdef CONFIG_PPC_DOORBELL
736 STD_EXCEPTION_COMMON_ASYNC(0xa00, doorbell_super, doorbell_exception)
738 STD_EXCEPTION_COMMON_ASYNC(0xa00, doorbell_super, unknown_exception)
740 STD_EXCEPTION_COMMON(0xb00, trap_0b, unknown_exception)
741 STD_EXCEPTION_COMMON(0xd00, single_step, single_step_exception)
742 STD_EXCEPTION_COMMON(0xe00, trap_0e, unknown_exception)
743 STD_EXCEPTION_COMMON(0xe40, emulation_assist, emulation_assist_interrupt)
744 STD_EXCEPTION_COMMON_ASYNC(0xe60, hmi_exception, handle_hmi_exception)
745 #ifdef CONFIG_PPC_DOORBELL
746 STD_EXCEPTION_COMMON_ASYNC(0xe80, h_doorbell, doorbell_exception)
748 STD_EXCEPTION_COMMON_ASYNC(0xe80, h_doorbell, unknown_exception)
750 STD_EXCEPTION_COMMON_ASYNC(0xea0, h_virt_irq, do_IRQ)
751 STD_EXCEPTION_COMMON_ASYNC(0xf00, performance_monitor, performance_monitor_exception)
752 STD_EXCEPTION_COMMON(0x1300, instruction_breakpoint, instruction_breakpoint_exception)
753 STD_EXCEPTION_COMMON(0x1502, denorm, unknown_exception)
754 #ifdef CONFIG_ALTIVEC
755 STD_EXCEPTION_COMMON(0x1700, altivec_assist, altivec_assist_exception)
757 STD_EXCEPTION_COMMON(0x1700, altivec_assist, unknown_exception)
761 * Relocation-on interrupts: A subset of the interrupts can be delivered
762 * with IR=1/DR=1, if AIL==2 and MSR.HV won't be changed by delivering
763 * it. Addresses are the same as the original interrupt addresses, but
764 * offset by 0xc000000000004000.
765 * It's impossible to receive interrupts below 0x300 via this mechanism.
766 * KVM: None of these traps are from the guest ; anything that escalated
767 * to HV=1 from HV=0 is delivered via real mode handlers.
771 * This uses the standard macro, since the original 0x300 vector
772 * only has extra guff for STAB-based processors -- which never
775 STD_RELON_EXCEPTION_PSERIES(0x4300, 0x300, data_access)
777 .globl data_access_slb_relon_pSeries
778 data_access_slb_relon_pSeries:
780 EXCEPTION_PROLOG_0(PACA_EXSLB)
781 EXCEPTION_PROLOG_1(PACA_EXSLB, NOTEST, 0x380)
782 std r3,PACA_EXSLB+EX_R3(r13)
785 #ifndef CONFIG_RELOCATABLE
789 * We can't just use a direct branch to slb_miss_realmode
790 * because the distance from here to there depends on where
791 * the kernel ends up being put.
794 ld r10,PACAKBASE(r13)
795 LOAD_HANDLER(r10, slb_miss_realmode)
800 STD_RELON_EXCEPTION_PSERIES(0x4400, 0x400, instruction_access)
802 .globl instruction_access_slb_relon_pSeries
803 instruction_access_slb_relon_pSeries:
805 EXCEPTION_PROLOG_0(PACA_EXSLB)
806 EXCEPTION_PROLOG_1(PACA_EXSLB, NOTEST, 0x480)
807 std r3,PACA_EXSLB+EX_R3(r13)
808 mfspr r3,SPRN_SRR0 /* SRR0 is faulting address */
810 #ifndef CONFIG_RELOCATABLE
814 ld r10,PACAKBASE(r13)
815 LOAD_HANDLER(r10, slb_miss_realmode)
821 .globl hardware_interrupt_relon_pSeries;
822 .globl hardware_interrupt_relon_hv;
823 hardware_interrupt_relon_pSeries:
824 hardware_interrupt_relon_hv:
826 _MASKABLE_RELON_EXCEPTION_PSERIES(0x502, hardware_interrupt, EXC_HV, SOFTEN_TEST_HV)
828 _MASKABLE_RELON_EXCEPTION_PSERIES(0x500, hardware_interrupt, EXC_STD, SOFTEN_TEST_PR)
829 ALT_FTR_SECTION_END_IFSET(CPU_FTR_HVMODE)
830 STD_RELON_EXCEPTION_PSERIES(0x4600, 0x600, alignment)
831 STD_RELON_EXCEPTION_PSERIES(0x4700, 0x700, program_check)
832 STD_RELON_EXCEPTION_PSERIES(0x4800, 0x800, fp_unavailable)
833 MASKABLE_RELON_EXCEPTION_PSERIES(0x4900, 0x900, decrementer)
834 STD_RELON_EXCEPTION_HV(0x4980, 0x982, hdecrementer)
835 MASKABLE_RELON_EXCEPTION_PSERIES(0x4a00, 0xa00, doorbell_super)
836 STD_RELON_EXCEPTION_PSERIES(0x4b00, 0xb00, trap_0b)
839 .globl system_call_relon_pSeries
840 system_call_relon_pSeries:
843 SYSCALL_PSERIES_2_DIRECT
846 STD_RELON_EXCEPTION_PSERIES(0x4d00, 0xd00, single_step)
849 b . /* Can't happen, see v2.07 Book III-S section 6.5 */
852 b . /* Can't happen, see v2.07 Book III-S section 6.5 */
855 emulation_assist_relon_trampoline:
857 EXCEPTION_PROLOG_0(PACA_EXGEN)
858 b emulation_assist_relon_hv
861 b . /* Can't happen, see v2.07 Book III-S section 6.5 */
864 h_doorbell_relon_trampoline:
866 EXCEPTION_PROLOG_0(PACA_EXGEN)
867 b h_doorbell_relon_hv
870 h_virt_irq_relon_trampoline:
872 EXCEPTION_PROLOG_0(PACA_EXGEN)
873 b h_virt_irq_relon_hv
876 performance_monitor_relon_pseries_trampoline:
878 EXCEPTION_PROLOG_0(PACA_EXGEN)
879 b performance_monitor_relon_pSeries
882 altivec_unavailable_relon_pseries_trampoline:
884 EXCEPTION_PROLOG_0(PACA_EXGEN)
885 b altivec_unavailable_relon_pSeries
888 vsx_unavailable_relon_pseries_trampoline:
890 EXCEPTION_PROLOG_0(PACA_EXGEN)
891 b vsx_unavailable_relon_pSeries
894 facility_unavailable_relon_trampoline:
896 EXCEPTION_PROLOG_0(PACA_EXGEN)
897 b facility_unavailable_relon_pSeries
900 hv_facility_unavailable_relon_trampoline:
902 EXCEPTION_PROLOG_0(PACA_EXGEN)
903 b hv_facility_unavailable_relon_hv
905 STD_RELON_EXCEPTION_PSERIES(0x5300, 0x1300, instruction_breakpoint)
906 #ifdef CONFIG_PPC_DENORMALISATION
908 b denorm_exception_hv
910 STD_RELON_EXCEPTION_PSERIES(0x5700, 0x1700, altivec_assist)
916 ppc64_runlatch_on_trampoline:
917 b __ppc64_runlatch_on
920 * Here r13 points to the paca, r9 contains the saved CR,
921 * SRR0 and SRR1 are saved in r11 and r12,
922 * r9 - r13 are saved in paca->exgen.
925 .globl data_access_common
928 std r10,PACA_EXGEN+EX_DAR(r13)
930 stw r10,PACA_EXGEN+EX_DSISR(r13)
931 EXCEPTION_PROLOG_COMMON(0x300, PACA_EXGEN)
932 RECONCILE_IRQ_STATE(r10, r11)
934 ld r3,PACA_EXGEN+EX_DAR(r13)
935 lwz r4,PACA_EXGEN+EX_DSISR(r13)
939 BEGIN_MMU_FTR_SECTION
940 b do_hash_page /* Try to handle as hpte fault */
943 ALT_MMU_FTR_SECTION_END_IFCLR(MMU_FTR_TYPE_RADIX)
946 .globl h_data_storage_common
947 h_data_storage_common:
949 std r10,PACA_EXGEN+EX_DAR(r13)
950 mfspr r10,SPRN_HDSISR
951 stw r10,PACA_EXGEN+EX_DSISR(r13)
952 EXCEPTION_PROLOG_COMMON(0xe00, PACA_EXGEN)
954 RECONCILE_IRQ_STATE(r10, r11)
955 addi r3,r1,STACK_FRAME_OVERHEAD
960 .globl instruction_access_common
961 instruction_access_common:
962 EXCEPTION_PROLOG_COMMON(0x400, PACA_EXGEN)
963 RECONCILE_IRQ_STATE(r10, r11)
970 BEGIN_MMU_FTR_SECTION
971 b do_hash_page /* Try to handle as hpte fault */
974 ALT_MMU_FTR_SECTION_END_IFCLR(MMU_FTR_TYPE_RADIX)
976 STD_EXCEPTION_COMMON(0xe20, h_instr_storage, unknown_exception)
979 * Machine check is different because we use a different
980 * save area: PACA_EXMC instead of PACA_EXGEN.
983 .globl machine_check_common
984 machine_check_common:
987 std r10,PACA_EXGEN+EX_DAR(r13)
989 stw r10,PACA_EXGEN+EX_DSISR(r13)
990 EXCEPTION_PROLOG_COMMON(0x200, PACA_EXMC)
992 RECONCILE_IRQ_STATE(r10, r11)
993 ld r3,PACA_EXGEN+EX_DAR(r13)
994 lwz r4,PACA_EXGEN+EX_DSISR(r13)
998 addi r3,r1,STACK_FRAME_OVERHEAD
999 bl machine_check_exception
1003 .globl alignment_common
1006 std r10,PACA_EXGEN+EX_DAR(r13)
1007 mfspr r10,SPRN_DSISR
1008 stw r10,PACA_EXGEN+EX_DSISR(r13)
1009 EXCEPTION_PROLOG_COMMON(0x600, PACA_EXGEN)
1010 ld r3,PACA_EXGEN+EX_DAR(r13)
1011 lwz r4,PACA_EXGEN+EX_DSISR(r13)
1015 RECONCILE_IRQ_STATE(r10, r11)
1016 addi r3,r1,STACK_FRAME_OVERHEAD
1017 bl alignment_exception
1021 .globl program_check_common
1022 program_check_common:
1023 EXCEPTION_PROLOG_COMMON(0x700, PACA_EXGEN)
1025 RECONCILE_IRQ_STATE(r10, r11)
1026 addi r3,r1,STACK_FRAME_OVERHEAD
1027 bl program_check_exception
1031 .globl fp_unavailable_common
1032 fp_unavailable_common:
1033 EXCEPTION_PROLOG_COMMON(0x800, PACA_EXGEN)
1034 bne 1f /* if from user, just load it up */
1036 RECONCILE_IRQ_STATE(r10, r11)
1037 addi r3,r1,STACK_FRAME_OVERHEAD
1038 bl kernel_fp_unavailable_exception
1041 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM
1043 /* Test if 2 TM state bits are zero. If non-zero (ie. userspace was in
1044 * transaction), go do TM stuff
1046 rldicl. r0, r12, (64-MSR_TS_LG), (64-2)
1048 END_FTR_SECTION_IFSET(CPU_FTR_TM)
1051 b fast_exception_return
1052 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM
1053 2: /* User process was in a transaction */
1055 RECONCILE_IRQ_STATE(r10, r11)
1056 addi r3,r1,STACK_FRAME_OVERHEAD
1057 bl fp_unavailable_tm
1061 .globl altivec_unavailable_common
1062 altivec_unavailable_common:
1063 EXCEPTION_PROLOG_COMMON(0xf20, PACA_EXGEN)
1064 #ifdef CONFIG_ALTIVEC
1067 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM
1068 BEGIN_FTR_SECTION_NESTED(69)
1069 /* Test if 2 TM state bits are zero. If non-zero (ie. userspace was in
1070 * transaction), go do TM stuff
1072 rldicl. r0, r12, (64-MSR_TS_LG), (64-2)
1074 END_FTR_SECTION_NESTED(CPU_FTR_TM, CPU_FTR_TM, 69)
1077 b fast_exception_return
1078 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM
1079 2: /* User process was in a transaction */
1081 RECONCILE_IRQ_STATE(r10, r11)
1082 addi r3,r1,STACK_FRAME_OVERHEAD
1083 bl altivec_unavailable_tm
1087 END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC)
1090 RECONCILE_IRQ_STATE(r10, r11)
1091 addi r3,r1,STACK_FRAME_OVERHEAD
1092 bl altivec_unavailable_exception
1096 .globl vsx_unavailable_common
1097 vsx_unavailable_common:
1098 EXCEPTION_PROLOG_COMMON(0xf40, PACA_EXGEN)
1102 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM
1103 BEGIN_FTR_SECTION_NESTED(69)
1104 /* Test if 2 TM state bits are zero. If non-zero (ie. userspace was in
1105 * transaction), go do TM stuff
1107 rldicl. r0, r12, (64-MSR_TS_LG), (64-2)
1109 END_FTR_SECTION_NESTED(CPU_FTR_TM, CPU_FTR_TM, 69)
1112 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM
1113 2: /* User process was in a transaction */
1115 RECONCILE_IRQ_STATE(r10, r11)
1116 addi r3,r1,STACK_FRAME_OVERHEAD
1117 bl vsx_unavailable_tm
1121 END_FTR_SECTION_IFSET(CPU_FTR_VSX)
1124 RECONCILE_IRQ_STATE(r10, r11)
1125 addi r3,r1,STACK_FRAME_OVERHEAD
1126 bl vsx_unavailable_exception
1129 /* Equivalents to the above handlers for relocation-on interrupt vectors */
1130 STD_RELON_EXCEPTION_HV_OOL(0xe40, emulation_assist)
1131 MASKABLE_RELON_EXCEPTION_HV_OOL(0xe80, h_doorbell)
1132 MASKABLE_RELON_EXCEPTION_HV_OOL(0xea0, h_virt_irq)
1134 STD_RELON_EXCEPTION_PSERIES_OOL(0xf00, performance_monitor)
1135 STD_RELON_EXCEPTION_PSERIES_OOL(0xf20, altivec_unavailable)
1136 STD_RELON_EXCEPTION_PSERIES_OOL(0xf40, vsx_unavailable)
1137 STD_RELON_EXCEPTION_PSERIES_OOL(0xf60, facility_unavailable)
1138 STD_RELON_EXCEPTION_HV_OOL(0xf80, hv_facility_unavailable)
1141 * The __end_interrupts marker must be past the out-of-line (OOL)
1142 * handlers, so that they are copied to real address 0x100 when running
1143 * a relocatable kernel. This ensures they can be reached from the short
1144 * trampoline handlers (like 0x4f00, 0x4f20, etc.) which branch
1145 * directly, without using LOAD_HANDLER().
1148 .globl __end_interrupts
1151 #if defined(CONFIG_PPC_PSERIES) || defined(CONFIG_PPC_POWERNV)
1153 * Data area reserved for FWNMI option.
1154 * This address (0x7000) is fixed by the RPA.
1157 .globl fwnmi_data_area
1160 /* pseries and powernv need to keep the whole page from
1161 * 0x7000 to 0x8000 free for use by the firmware
1164 #endif /* defined(CONFIG_PPC_PSERIES) || defined(CONFIG_PPC_POWERNV) */
1166 STD_EXCEPTION_COMMON(0xf60, facility_unavailable, facility_unavailable_exception)
1167 STD_EXCEPTION_COMMON(0xf80, hv_facility_unavailable, facility_unavailable_exception)
1169 #ifdef CONFIG_CBE_RAS
1170 STD_EXCEPTION_COMMON(0x1200, cbe_system_error, cbe_system_error_exception)
1171 STD_EXCEPTION_COMMON(0x1600, cbe_maintenance, cbe_maintenance_exception)
1172 STD_EXCEPTION_COMMON(0x1800, cbe_thermal, cbe_thermal_exception)
1173 #endif /* CONFIG_CBE_RAS */
1175 .globl hmi_exception_early
1176 hmi_exception_early:
1177 EXCEPTION_PROLOG_1(PACA_EXGEN, KVMTEST, 0xe62)
1178 mr r10,r1 /* Save r1 */
1179 ld r1,PACAEMERGSP(r13) /* Use emergency stack */
1180 subi r1,r1,INT_FRAME_SIZE /* alloc stack frame */
1181 std r9,_CCR(r1) /* save CR in stackframe */
1182 mfspr r11,SPRN_HSRR0 /* Save HSRR0 */
1183 std r11,_NIP(r1) /* save HSRR0 in stackframe */
1184 mfspr r12,SPRN_HSRR1 /* Save SRR1 */
1185 std r12,_MSR(r1) /* save SRR1 in stackframe */
1186 std r10,0(r1) /* make stack chain pointer */
1187 std r0,GPR0(r1) /* save r0 in stackframe */
1188 std r10,GPR1(r1) /* save r1 in stackframe */
1189 EXCEPTION_PROLOG_COMMON_2(PACA_EXGEN)
1190 EXCEPTION_PROLOG_COMMON_3(0xe60)
1191 addi r3,r1,STACK_FRAME_OVERHEAD
1192 bl hmi_exception_realmode
1193 /* Windup the stack. */
1194 /* Move original HSRR0 and HSRR1 into the respective regs */
1212 /* restore original r1. */
1216 * Go to virtual mode and pull the HMI event information from
1219 .globl hmi_exception_after_realmode
1220 hmi_exception_after_realmode:
1222 EXCEPTION_PROLOG_0(PACA_EXGEN)
1226 #define MACHINE_CHECK_HANDLER_WINDUP \
1227 /* Clear MSR_RI before setting SRR0 and SRR1. */\
1229 mfmsr r9; /* get MSR value */ \
1231 mtmsrd r9,1; /* Clear MSR_RI */ \
1232 /* Move original SRR0 and SRR1 into the respective regs */ \
1234 mtspr SPRN_SRR1,r9; \
1236 mtspr SPRN_SRR0,r3; \
1244 REST_8GPRS(2, r1); \
1248 /* Decrement paca->in_mce. */ \
1249 lhz r12,PACA_IN_MCE(r13); \
1251 sth r12,PACA_IN_MCE(r13); \
1253 REST_2GPRS(12, r1); \
1254 /* restore original r1. */ \
1258 * Handle machine check early in real mode. We come here with
1259 * ME=1, MMU (IR=0 and DR=0) off and using MC emergency stack.
1262 .globl machine_check_handle_early
1263 machine_check_handle_early:
1264 std r0,GPR0(r1) /* Save r0 */
1265 EXCEPTION_PROLOG_COMMON_3(0x200)
1267 addi r3,r1,STACK_FRAME_OVERHEAD
1268 bl machine_check_early
1269 std r3,RESULT(r1) /* Save result */
1271 #ifdef CONFIG_PPC_P7_NAP
1273 * Check if thread was in power saving mode. We come here when any
1274 * of the following is true:
1275 * a. thread wasn't in power saving mode
1276 * b. thread was in power saving mode with no state loss or
1277 * supervisor state loss
1279 * Go back to nap again if (b) is true.
1281 rlwinm. r11,r12,47-31,30,31 /* Was it in power saving mode? */
1282 beq 4f /* No, it wasn;t */
1283 /* Thread was in power saving mode. Go back to nap again. */
1286 /* Supervisor state loss */
1288 stb r0,PACA_NAPSTATELOST(r13)
1289 3: bl machine_check_queue_event
1290 MACHINE_CHECK_HANDLER_WINDUP
1293 li r3,PNV_THREAD_NAP
1294 b pnv_enter_arch207_idle_mode
1298 * Check if we are coming from hypervisor userspace. If yes then we
1299 * continue in host kernel in V mode to deliver the MC event.
1301 rldicl. r11,r12,4,63 /* See if MC hit while in HV mode. */
1303 andi. r11,r12,MSR_PR /* See if coming from user. */
1304 bne 9f /* continue in V mode if we are. */
1307 #ifdef CONFIG_KVM_BOOK3S_64_HANDLER
1309 * We are coming from kernel context. Check if we are coming from
1310 * guest. if yes, then we can continue. We will fall through
1311 * do_kvm_200->kvmppc_interrupt to deliver the MC event to guest.
1313 lbz r11,HSTATE_IN_GUEST(r13)
1314 cmpwi r11,0 /* Check if coming from guest */
1315 bne 9f /* continue if we are. */
1318 * At this point we are not sure about what context we come from.
1319 * Queue up the MCE event and return from the interrupt.
1320 * But before that, check if this is an un-recoverable exception.
1321 * If yes, then stay on emergency stack and panic.
1323 andi. r11,r12,MSR_RI
1325 1: mfspr r11,SPRN_SRR0
1326 ld r10,PACAKBASE(r13)
1327 LOAD_HANDLER(r10,unrecover_mce)
1329 ld r10,PACAKMSR(r13)
1331 * We are going down. But there are chances that we might get hit by
1332 * another MCE during panic path and we may run into unstable state
1333 * with no way out. Hence, turn ME bit off while going down, so that
1334 * when another MCE is hit during panic path, system will checkstop
1335 * and hypervisor will get restarted cleanly by SP.
1338 andc r10,r10,r3 /* Turn off MSR_ME */
1344 * Check if we have successfully handled/recovered from error, if not
1345 * then stay on emergency stack and panic.
1347 ld r3,RESULT(r1) /* Load result */
1348 cmpdi r3,0 /* see if we handled MCE successfully */
1350 beq 1b /* if !handled then panic */
1352 * Return from MC interrupt.
1353 * Queue up the MCE event so that we can log it later, while
1354 * returning from kernel or opal call.
1356 bl machine_check_queue_event
1357 MACHINE_CHECK_HANDLER_WINDUP
1360 /* Deliver the machine check to host kernel in V mode. */
1361 MACHINE_CHECK_HANDLER_WINDUP
1362 b machine_check_pSeries
1365 /* Invoke machine_check_exception to print MCE event and panic. */
1366 addi r3,r1,STACK_FRAME_OVERHEAD
1367 bl machine_check_exception
1369 * We will not reach here. Even if we did, there is no way out. Call
1370 * unrecoverable_exception and die.
1372 1: addi r3,r1,STACK_FRAME_OVERHEAD
1373 bl unrecoverable_exception
1376 * r13 points to the PACA, r9 contains the saved CR,
1377 * r12 contain the saved SRR1, SRR0 is still ready for return
1378 * r3 has the faulting address
1379 * r9 - r13 are saved in paca->exslb.
1380 * r3 is saved in paca->slb_r3
1381 * We assume we aren't going to take any exceptions during this procedure.
1385 #ifdef CONFIG_RELOCATABLE
1389 stw r9,PACA_EXSLB+EX_CCR(r13) /* save CR in exc. frame */
1390 std r10,PACA_EXSLB+EX_LR(r13) /* save LR */
1392 #ifdef CONFIG_PPC_STD_MMU_64
1393 BEGIN_MMU_FTR_SECTION
1394 bl slb_allocate_realmode
1395 END_MMU_FTR_SECTION_IFCLR(MMU_FTR_TYPE_RADIX)
1397 /* All done -- return from exception. */
1399 ld r10,PACA_EXSLB+EX_LR(r13)
1400 ld r3,PACA_EXSLB+EX_R3(r13)
1401 lwz r9,PACA_EXSLB+EX_CCR(r13) /* get saved CR */
1404 andi. r10,r12,MSR_RI /* check for unrecoverable exception */
1405 BEGIN_MMU_FTR_SECTION
1409 ALT_MMU_FTR_SECTION_END_IFCLR(MMU_FTR_TYPE_RADIX)
1414 mtcrf 0x01,r9 /* slb_allocate uses cr0 and cr7 */
1417 RESTORE_PPR_PACA(PACA_EXSLB, r9)
1418 ld r9,PACA_EXSLB+EX_R9(r13)
1419 ld r10,PACA_EXSLB+EX_R10(r13)
1420 ld r11,PACA_EXSLB+EX_R11(r13)
1421 ld r12,PACA_EXSLB+EX_R12(r13)
1422 ld r13,PACA_EXSLB+EX_R13(r13)
1424 b . /* prevent speculative execution */
1426 2: mfspr r11,SPRN_SRR0
1427 ld r10,PACAKBASE(r13)
1428 LOAD_HANDLER(r10,unrecov_slb)
1430 ld r10,PACAKMSR(r13)
1436 EXCEPTION_PROLOG_COMMON(0x4100, PACA_EXSLB)
1437 RECONCILE_IRQ_STATE(r10, r11)
1439 1: addi r3,r1,STACK_FRAME_OVERHEAD
1440 bl unrecoverable_exception
1444 #ifdef CONFIG_PPC_970_NAP
1447 std r9,TI_LOCAL_FLAGS(r11)
1448 ld r10,_LINK(r1) /* make idle task do the */
1449 std r10,_NIP(r1) /* equivalent of a blr */
1458 #ifdef CONFIG_PPC_STD_MMU_64
1459 andis. r0,r4,0xa410 /* weird error? */
1460 bne- handle_page_fault /* if not, try to insert a HPTE */
1461 andis. r0,r4,DSISR_DABRMATCH@h
1462 bne- handle_dabr_fault
1463 CURRENT_THREAD_INFO(r11, r1)
1464 lwz r0,TI_PREEMPT(r11) /* If we're in an "NMI" */
1465 andis. r0,r0,NMI_MASK@h /* (i.e. an irq when soft-disabled) */
1466 bne 77f /* then don't call hash_page now */
1469 * r3 contains the faulting address
1471 * r5 contains the trap number
1474 * at return r3 = 0 for success, 1 for page fault, negative for error
1478 bl __hash_page /* build HPTE if possible */
1479 cmpdi r3,0 /* see if __hash_page succeeded */
1482 beq fast_exc_return_irq /* Return from exception on success */
1486 #endif /* CONFIG_PPC_STD_MMU_64 */
1488 /* Here we have a page fault that hash_page can't handle. */
1492 addi r3,r1,STACK_FRAME_OVERHEAD
1498 addi r3,r1,STACK_FRAME_OVERHEAD
1503 /* We have a data breakpoint exception - handle it */
1508 addi r3,r1,STACK_FRAME_OVERHEAD
1510 12: b ret_from_except_lite
1513 #ifdef CONFIG_PPC_STD_MMU_64
1514 /* We have a page fault that hash_page could handle but HV refused
1519 addi r3,r1,STACK_FRAME_OVERHEAD
1526 * We come here as a result of a DSI at a point where we don't want
1527 * to call hash_page, such as when we are accessing memory (possibly
1528 * user memory) inside a PMU interrupt that occurred while interrupts
1529 * were soft-disabled. We want to invoke the exception handler for
1530 * the access, or panic if there isn't a handler.
1534 addi r3,r1,STACK_FRAME_OVERHEAD
1540 * Here we have detected that the kernel stack pointer is bad.
1541 * R9 contains the saved CR, r13 points to the paca,
1542 * r10 contains the (bad) kernel stack pointer,
1543 * r11 and r12 contain the saved SRR0 and SRR1.
1544 * We switch to using an emergency stack, save the registers there,
1545 * and call kernel_bad_stack(), which panics.
1548 ld r1,PACAEMERGSP(r13)
1549 subi r1,r1,64+INT_FRAME_SIZE
1555 mfspr r12,SPRN_DSISR
1581 std r10,ORIG_GPR3(r1)
1582 END_FTR_SECTION_IFSET(CPU_FTR_CFAR)
1585 lhz r12,PACA_TRAP_SAVE(r13)
1587 addi r11,r1,INT_FRAME_SIZE
1592 ld r11,exception_marker@toc(r2)
1594 std r11,STACK_FRAME_OVERHEAD-16(r1)
1595 1: addi r3,r1,STACK_FRAME_OVERHEAD