1 /* SPDX-License-Identifier: GPL-2.0 */
3 * Copyright (C) 1999 Cort Dougan <cort@cs.nmt.edu>
5 #ifndef _ASM_POWERPC_HW_IRQ_H
6 #define _ASM_POWERPC_HW_IRQ_H
10 #include <linux/errno.h>
11 #include <linux/compiler.h>
12 #include <asm/ptrace.h>
13 #include <asm/processor.h>
18 * PACA flags in paca->irq_happened.
20 * This bits are set when interrupts occur while soft-disabled
21 * and allow a proper replay.
23 * The PACA_IRQ_HARD_DIS is set whenever we hard disable. It is almost
24 * always in synch with the MSR[EE] state, except:
25 * - A window in interrupt entry, where hardware disables MSR[EE] and that
26 * must be "reconciled" with the soft mask state.
27 * - NMI interrupts that hit in awkward places, until they fix the state.
28 * - When local irqs are being enabled and state is being fixed up.
29 * - When returning from an interrupt there are some windows where this
30 * can become out of synch, but gets fixed before the RFI or before
31 * executing the next user instruction (see arch/powerpc/kernel/interrupt.c).
33 #define PACA_IRQ_HARD_DIS 0x01
34 #define PACA_IRQ_DBELL 0x02
35 #define PACA_IRQ_EE 0x04
36 #define PACA_IRQ_DEC 0x08 /* Or FIT */
37 #define PACA_IRQ_HMI 0x10
38 #define PACA_IRQ_PMI 0x20
41 * Some soft-masked interrupts must be hard masked until they are replayed
42 * (e.g., because the soft-masked handler does not clear the exception).
44 #ifdef CONFIG_PPC_BOOK3S
45 #define PACA_IRQ_MUST_HARD_MASK (PACA_IRQ_EE|PACA_IRQ_PMI)
47 #define PACA_IRQ_MUST_HARD_MASK (PACA_IRQ_EE)
50 #endif /* CONFIG_PPC64 */
53 * flags for paca->irq_soft_mask
55 #define IRQS_ENABLED 0
56 #define IRQS_DISABLED 1 /* local_irq_disable() interrupts */
57 #define IRQS_PMI_DISABLED 2
58 #define IRQS_ALL_DISABLED (IRQS_DISABLED | IRQS_PMI_DISABLED)
62 static inline void __hard_irq_enable(void)
64 if (IS_ENABLED(CONFIG_BOOKE_OR_40x))
66 else if (IS_ENABLED(CONFIG_PPC_8xx))
68 else if (IS_ENABLED(CONFIG_PPC_BOOK3S_64))
69 __mtmsrd(MSR_EE | MSR_RI, 1);
71 mtmsr(mfmsr() | MSR_EE);
74 static inline void __hard_irq_disable(void)
76 if (IS_ENABLED(CONFIG_BOOKE_OR_40x))
78 else if (IS_ENABLED(CONFIG_PPC_8xx))
80 else if (IS_ENABLED(CONFIG_PPC_BOOK3S_64))
83 mtmsr(mfmsr() & ~MSR_EE);
86 static inline void __hard_EE_RI_disable(void)
88 if (IS_ENABLED(CONFIG_BOOKE_OR_40x))
90 else if (IS_ENABLED(CONFIG_PPC_8xx))
92 else if (IS_ENABLED(CONFIG_PPC_BOOK3S_64))
95 mtmsr(mfmsr() & ~(MSR_EE | MSR_RI));
98 static inline void __hard_RI_enable(void)
100 if (IS_ENABLED(CONFIG_BOOKE_OR_40x))
103 if (IS_ENABLED(CONFIG_PPC_8xx))
105 else if (IS_ENABLED(CONFIG_PPC_BOOK3S_64))
108 mtmsr(mfmsr() | MSR_RI);
112 #include <asm/paca.h>
114 static inline notrace unsigned long irq_soft_mask_return(void)
121 : "i" (offsetof(struct paca_struct, irq_soft_mask)));
127 * The "memory" clobber acts as both a compiler barrier
128 * for the critical section and as a clobber because
129 * we changed paca->irq_soft_mask
131 static inline notrace void irq_soft_mask_set(unsigned long mask)
133 #ifdef CONFIG_PPC_IRQ_SOFT_MASK_DEBUG
135 * The irq mask must always include the STD bit if any are set.
137 * and interrupts don't get replayed until the standard
138 * interrupt (local_irq_disable()) is unmasked.
140 * Other masks must only provide additional masking beyond
141 * the standard, and they are also not replayed until the
142 * standard interrupt becomes unmasked.
144 * This could be changed, but it will require partial
145 * unmasks to be replayed, among other things. For now, take
146 * the simple approach.
148 WARN_ON(mask && !(mask & IRQS_DISABLED));
155 "i" (offsetof(struct paca_struct, irq_soft_mask))
159 static inline notrace unsigned long irq_soft_mask_set_return(unsigned long mask)
163 #ifdef CONFIG_PPC_IRQ_SOFT_MASK_DEBUG
164 WARN_ON(mask && !(mask & IRQS_DISABLED));
168 "lbz %0,%1(13); stb %2,%1(13)"
170 : "i" (offsetof(struct paca_struct, irq_soft_mask)),
177 static inline notrace unsigned long irq_soft_mask_or_return(unsigned long mask)
179 unsigned long flags, tmp;
182 "lbz %0,%2(13); or %1,%0,%3; stb %1,%2(13)"
183 : "=&r" (flags), "=r" (tmp)
184 : "i" (offsetof(struct paca_struct, irq_soft_mask)),
188 #ifdef CONFIG_PPC_IRQ_SOFT_MASK_DEBUG
189 WARN_ON((mask | flags) && !((mask | flags) & IRQS_DISABLED));
195 static inline unsigned long arch_local_save_flags(void)
197 return irq_soft_mask_return();
200 static inline void arch_local_irq_disable(void)
202 irq_soft_mask_set(IRQS_DISABLED);
205 extern void arch_local_irq_restore(unsigned long);
207 static inline void arch_local_irq_enable(void)
209 arch_local_irq_restore(IRQS_ENABLED);
212 static inline unsigned long arch_local_irq_save(void)
214 return irq_soft_mask_set_return(IRQS_DISABLED);
217 static inline bool arch_irqs_disabled_flags(unsigned long flags)
219 return flags & IRQS_DISABLED;
222 static inline bool arch_irqs_disabled(void)
224 return arch_irqs_disabled_flags(arch_local_save_flags());
227 static inline void set_pmi_irq_pending(void)
230 * Invoked from PMU callback functions to set PMI bit in the paca.
231 * This has to be called with irq's disabled (via hard_irq_disable()).
233 if (IS_ENABLED(CONFIG_PPC_IRQ_SOFT_MASK_DEBUG))
234 WARN_ON_ONCE(mfmsr() & MSR_EE);
236 get_paca()->irq_happened |= PACA_IRQ_PMI;
239 static inline void clear_pmi_irq_pending(void)
242 * Invoked from PMU callback functions to clear the pending PMI bit
245 if (IS_ENABLED(CONFIG_PPC_IRQ_SOFT_MASK_DEBUG))
246 WARN_ON_ONCE(mfmsr() & MSR_EE);
248 get_paca()->irq_happened &= ~PACA_IRQ_PMI;
251 static inline bool pmi_irq_pending(void)
254 * Invoked from PMU callback functions to check if there is a pending
255 * PMI bit in the paca.
257 if (get_paca()->irq_happened & PACA_IRQ_PMI)
263 #ifdef CONFIG_PPC_BOOK3S
265 * To support disabling and enabling of irq with PMI, set of
266 * new powerpc_local_irq_pmu_save() and powerpc_local_irq_restore()
267 * functions are added. These macros are implemented using generic
268 * linux local_irq_* code from include/linux/irqflags.h.
270 #define raw_local_irq_pmu_save(flags) \
272 typecheck(unsigned long, flags); \
273 flags = irq_soft_mask_or_return(IRQS_DISABLED | \
274 IRQS_PMI_DISABLED); \
277 #define raw_local_irq_pmu_restore(flags) \
279 typecheck(unsigned long, flags); \
280 arch_local_irq_restore(flags); \
283 #ifdef CONFIG_TRACE_IRQFLAGS
284 #define powerpc_local_irq_pmu_save(flags) \
286 raw_local_irq_pmu_save(flags); \
287 if (!raw_irqs_disabled_flags(flags)) \
288 trace_hardirqs_off(); \
290 #define powerpc_local_irq_pmu_restore(flags) \
292 if (!raw_irqs_disabled_flags(flags)) \
293 trace_hardirqs_on(); \
294 raw_local_irq_pmu_restore(flags); \
297 #define powerpc_local_irq_pmu_save(flags) \
299 raw_local_irq_pmu_save(flags); \
301 #define powerpc_local_irq_pmu_restore(flags) \
303 raw_local_irq_pmu_restore(flags); \
305 #endif /* CONFIG_TRACE_IRQFLAGS */
307 #endif /* CONFIG_PPC_BOOK3S */
309 #define hard_irq_disable() do { \
310 unsigned long flags; \
311 __hard_irq_disable(); \
312 flags = irq_soft_mask_set_return(IRQS_ALL_DISABLED); \
313 local_paca->irq_happened |= PACA_IRQ_HARD_DIS; \
314 if (!arch_irqs_disabled_flags(flags)) { \
315 asm ("stdx %%r1, 0, %1 ;" \
316 : "=m" (local_paca->saved_r1) \
317 : "b" (&local_paca->saved_r1)); \
318 trace_hardirqs_off(); \
322 static inline bool __lazy_irq_pending(u8 irq_happened)
324 return !!(irq_happened & ~PACA_IRQ_HARD_DIS);
328 * Check if a lazy IRQ is pending. Should be called with IRQs hard disabled.
330 static inline bool lazy_irq_pending(void)
332 return __lazy_irq_pending(get_paca()->irq_happened);
336 * Check if a lazy IRQ is pending, with no debugging checks.
337 * Should be called with IRQs hard disabled.
338 * For use in RI disabled code or other constrained situations.
340 static inline bool lazy_irq_pending_nocheck(void)
342 return __lazy_irq_pending(local_paca->irq_happened);
345 bool power_pmu_wants_prompt_pmi(void);
348 * This is called by asynchronous interrupts to check whether to
349 * conditionally re-enable hard interrupts after having cleared
350 * the source of the interrupt. They are kept disabled if there
351 * is a different soft-masked interrupt pending that requires hard
354 static inline bool should_hard_irq_enable(void)
356 #ifdef CONFIG_PPC_IRQ_SOFT_MASK_DEBUG
357 WARN_ON(irq_soft_mask_return() == IRQS_ENABLED);
358 WARN_ON(mfmsr() & MSR_EE);
360 #ifdef CONFIG_PERF_EVENTS
362 * If the PMU is not running, there is not much reason to enable
363 * MSR[EE] in irq handlers because any interrupts would just be
366 * TODO: Add test for 64e
368 if (IS_ENABLED(CONFIG_PPC_BOOK3S_64) && !power_pmu_wants_prompt_pmi())
371 if (get_paca()->irq_happened & PACA_IRQ_MUST_HARD_MASK)
381 * Do the hard enabling, only call this if should_hard_irq_enable is true.
383 static inline void do_hard_irq_enable(void)
385 #ifdef CONFIG_PPC_IRQ_SOFT_MASK_DEBUG
386 WARN_ON(irq_soft_mask_return() == IRQS_ENABLED);
387 WARN_ON(get_paca()->irq_happened & PACA_IRQ_MUST_HARD_MASK);
388 WARN_ON(mfmsr() & MSR_EE);
391 * This allows PMI interrupts (and watchdog soft-NMIs) through.
392 * There is no other reason to enable this way.
394 get_paca()->irq_happened &= ~PACA_IRQ_HARD_DIS;
398 static inline bool arch_irq_disabled_regs(struct pt_regs *regs)
400 return (regs->softe & IRQS_DISABLED);
403 extern bool prep_irq_for_idle(void);
404 extern bool prep_irq_for_idle_irqsoff(void);
405 extern void irq_set_pending_from_srr1(unsigned long srr1);
407 #define fini_irq_for_idle_irqsoff() trace_hardirqs_off();
409 extern void force_external_irq_replay(void);
411 static inline void irq_soft_mask_regs_set_state(struct pt_regs *regs, unsigned long val)
415 #else /* CONFIG_PPC64 */
417 static inline notrace unsigned long irq_soft_mask_return(void)
422 static inline unsigned long arch_local_save_flags(void)
427 static inline void arch_local_irq_restore(unsigned long flags)
429 if (IS_ENABLED(CONFIG_BOOKE))
435 static inline unsigned long arch_local_irq_save(void)
437 unsigned long flags = arch_local_save_flags();
439 if (IS_ENABLED(CONFIG_BOOKE))
441 else if (IS_ENABLED(CONFIG_PPC_8xx))
444 mtmsr(flags & ~MSR_EE);
449 static inline void arch_local_irq_disable(void)
451 __hard_irq_disable();
454 static inline void arch_local_irq_enable(void)
459 static inline bool arch_irqs_disabled_flags(unsigned long flags)
461 return (flags & MSR_EE) == 0;
464 static inline bool arch_irqs_disabled(void)
466 return arch_irqs_disabled_flags(arch_local_save_flags());
469 #define hard_irq_disable() arch_local_irq_disable()
471 static inline bool arch_irq_disabled_regs(struct pt_regs *regs)
473 return !(regs->msr & MSR_EE);
476 static __always_inline bool should_hard_irq_enable(void)
481 static inline void do_hard_irq_enable(void)
486 static inline void clear_pmi_irq_pending(void) { }
487 static inline void set_pmi_irq_pending(void) { }
488 static inline bool pmi_irq_pending(void) { return false; }
490 static inline void irq_soft_mask_regs_set_state(struct pt_regs *regs, unsigned long val)
493 #endif /* CONFIG_PPC64 */
495 #define ARCH_IRQ_INIT_FLAGS IRQ_NOREQUEST
497 #endif /* __ASSEMBLY__ */
498 #endif /* __KERNEL__ */
499 #endif /* _ASM_POWERPC_HW_IRQ_H */