2 * Copyright 2010-2011 Freescale Semiconductor, Inc.
4 * SPDX-License-Identifier: GPL-2.0+
7 #ifndef __FSL_SECURE_BOOT_H
8 #define __FSL_SECURE_BOOT_H
9 #include <asm/config_mpc85xx.h>
11 #ifdef CONFIG_SECURE_BOOT
12 #define CONFIG_CMD_ESBC_VALIDATE
13 #define CONFIG_CMD_BLOB
14 #define CONFIG_FSL_SEC_MON
15 #define CONFIG_SHA_PROG_HW_ACCEL
18 #define CONFIG_RSA_FREESCALE_EXP
19 #ifndef CONFIG_FSL_CAAM
20 #define CONFIG_FSL_CAAM
24 #ifdef CONFIG_SECURE_BOOT
25 #if defined(CONFIG_FSL_CORENET)
26 #define CONFIG_SYS_PBI_FLASH_BASE 0xc0000000
27 #elif defined(CONFIG_BSC9132QDS)
28 #define CONFIG_SYS_PBI_FLASH_BASE 0xc8000000
29 #elif defined(CONFIG_C29XPCIE)
30 #define CONFIG_SYS_PBI_FLASH_BASE 0xcc000000
32 #define CONFIG_SYS_PBI_FLASH_BASE 0xce000000
34 #define CONFIG_SYS_PBI_FLASH_WINDOW 0xcff80000
36 #if defined(CONFIG_B4860QDS) || \
37 defined(CONFIG_T4240QDS) || \
38 defined(CONFIG_T2080QDS) || \
39 defined(CONFIG_T2080RDB) || \
40 defined(CONFIG_T1040QDS) || \
41 defined(CONFIG_T104xD4QDS) || \
42 defined(CONFIG_T104xRDB) || \
43 defined(CONFIG_T104xD4RDB) || \
44 defined(CONFIG_PPC_T1023) || \
45 defined(CONFIG_PPC_T1024)
46 #define CONFIG_SYS_CPC_REINIT_F
47 #define CONFIG_KEY_REVOCATION
48 #undef CONFIG_SYS_INIT_L3_ADDR
49 #define CONFIG_SYS_INIT_L3_ADDR 0xbff00000
52 #if defined(CONFIG_RAMBOOT_PBL)
53 #undef CONFIG_SYS_INIT_L3_ADDR
54 #define CONFIG_SYS_INIT_L3_ADDR 0xbff00000
57 #if defined(CONFIG_C29XPCIE)
58 #define CONFIG_KEY_REVOCATION
61 #if defined(CONFIG_PPC_P3041) || \
62 defined(CONFIG_PPC_P4080) || \
63 defined(CONFIG_PPC_P5020) || \
64 defined(CONFIG_PPC_P5040) || \
65 defined(CONFIG_PPC_P2041)
66 #define CONFIG_FSL_TRUST_ARCH_v1
69 #if defined(CONFIG_FSL_CORENET) && !defined(CONFIG_SYS_RAMBOOT)
70 /* The key used for verification of next level images
71 * is picked up from an Extension Table which has
72 * been verified by the ISBC (Internal Secure boot Code)
73 * in boot ROM of the SoC.
74 * The feature is only applicable in case of NOR boot and is
75 * not applicable in case of RAMBOOT (NAND, SD, SPI).
77 #define CONFIG_FSL_ISBC_KEY_EXT
80 #ifndef CONFIG_FIT_SIGNATURE
81 /* If Boot Script is not on NOR and is required to be copied on RAM */
82 #ifdef CONFIG_BOOTSCRIPT_COPY_RAM
83 #define CONFIG_BS_HDR_ADDR_RAM 0x00010000
84 #define CONFIG_BS_HDR_ADDR_FLASH 0x00800000
85 #define CONFIG_BS_HDR_SIZE 0x00002000
86 #define CONFIG_BS_ADDR_RAM 0x00012000
87 #define CONFIG_BS_ADDR_FLASH 0x00802000
88 #define CONFIG_BS_SIZE 0x00001000
90 #define CONFIG_BOOTSCRIPT_HDR_ADDR CONFIG_BS_HDR_ADDR_RAM
93 /* The bootscript header address is different for B4860 because the NOR
94 * mapping is different on B4 due to reduced NOR size.
96 #if defined(CONFIG_B4860QDS)
97 #define CONFIG_BOOTSCRIPT_HDR_ADDR 0xecc00000
98 #elif defined(CONFIG_FSL_CORENET)
99 #define CONFIG_BOOTSCRIPT_HDR_ADDR 0xe8e00000
100 #elif defined(CONFIG_BSC9132QDS)
101 #define CONFIG_BOOTSCRIPT_HDR_ADDR 0x88020000
102 #elif defined(CONFIG_C29XPCIE)
103 #define CONFIG_BOOTSCRIPT_HDR_ADDR 0xec020000
105 #define CONFIG_BOOTSCRIPT_HDR_ADDR 0xee020000
110 #include <config_fsl_secboot.h>