arch/powerpc/dts/t104x.dtsi

   1 // SPDX-License-Identifier: GPL-2.0+ OR X11
   2 /*
   3  * T104X Silicon/SoC Device Tree Source (pre include)
   4  *
   5  * Copyright 2013 Freescale Semiconductor Inc.
   6  * Copyright 2019-2020 NXP
   7  */
   8
   9 /dts-v1/;
  10
  11 /include/ "e5500_power_isa.dtsi"
  12
  13 / {
  14         #address-cells = <2>;
  15         #size-cells = <2>;
  16         interrupt-parent = <&mpic>;
  17
  18         cpus {
  19                 #address-cells = <1>;
  20                 #size-cells = <0>;
  21
  22                 cpu0: PowerPC,e5500@0 {
  23                         device_type = "cpu";
  24                         reg = <0>;
  25                         #cooling-cells = <2>;
  26                 };
  27                 cpu1: PowerPC,e5500@1 {
  28                         device_type = "cpu";
  29                         reg = <1>;
  30                         #cooling-cells = <2>;
  31                 };
  32                 cpu2: PowerPC,e5500@2 {
  33                         device_type = "cpu";
  34                         reg = <2>;
  35                         #cooling-cells = <2>;
  36                 };
  37                 cpu3: PowerPC,e5500@3 {
  38                         device_type = "cpu";
  39                         reg = <3>;
  40                         #cooling-cells = <2>;
  41                 };
  42         };
  43
  44         soc: soc@ffe000000 {
  45                 ranges = <0x00000000 0xf 0xfe000000 0x1000000>;
  46                 reg = <0xf 0xfe000000 0 0x00001000>;
  47                 #address-cells = <1>;
  48                 #size-cells = <1>;
  49                 device_type = "soc";
  50                 compatible = "simple-bus";
  51
  52                 mpic: pic@40000 {
  53                         interrupt-controller;
  54                         #address-cells = <0>;
  55                         #interrupt-cells = <4>;
  56                         reg = <0x40000 0x40000>;
  57                         compatible = "fsl,mpic", "chrp,open-pic";
  58                         device_type = "open-pic";
  59                         clock-frequency = <0x0>;
  60                 };
  61
  62                 espi0: spi@110000 {
  63                         compatible = "fsl,mpc8536-espi";
  64                         #address-cells = <1>;
  65                         #size-cells = <0>;
  66                         reg = <0x110000 0x1000>;
  67                         fsl,espi-num-chipselects = <4>;
  68                         status = "disabled";
  69                 };
  70
  71                 usb0@210000 {
  72                         compatible = "fsl-usb2-mph";
  73                         reg = <0x210000 0x1000>;
  74                         phy_type = "utmi";
  75                 };
  76
  77                 usb1@211000 {
  78                         compatible = "fsl-usb2-dr";
  79                         reg = <0x211000 0x1000>;
  80                         phy_type = "utmi";
  81                 };
  82
  83                 sata: sata@220000 {
  84                         compatible = "fsl,pq-sata-v2";
  85                         reg = <0x220000 0x1000>;
  86                         interrupts = <68 0x2 0 0>;
  87                         sata-offset = <0x1000>;
  88                         sata-number = <2>;
  89                         sata-fpdma = <0>;
  90                 };
  91
  92                 esdhc: esdhc@114000 {
  93                         compatible = "fsl,esdhc";
  94                         reg = <0x114000 0x1000>;
  95                         clock-frequency = <0>;
  96                 };
  97                 /include/ "qoriq-i2c-0.dtsi"
  98                 /include/ "qoriq-i2c-1.dtsi"
  99         };
 100
 101         pcie@ffe240000 {
 102                 compatible = "fsl,pcie-t104x", "fsl,pcie-fsl-qoriq";
 103                 reg = <0xf 0xfe240000 0x0 0x1000>;   /* registers */
 104                 law_trgt_if = <0>;
 105                 #address-cells = <3>;
 106                 #size-cells = <2>;
 107                 device_type = "pci";
 108                 bus-range = <0x0 0xff>;
 109                 ranges = <0x01000000 0x0 0x00000000 0xf 0xf8000000 0x0 0x00010000   /* downstream I/O */
 110                           0x02000000 0x0 0xe0000000 0xc 0x00000000 0x0 0x10000000>; /* non-prefetchable memory */
 111         };
 112
 113         pcie@ffe250000 {
 114                 compatible = "fsl,pcie-t104x", "fsl,pcie-fsl-qoriq";
 115                 reg = <0xf 0xfe250000 0x0 0x1000>;   /* registers */
 116                 law_trgt_if = <1>;
 117                 #address-cells = <3>;
 118                 #size-cells = <2>;
 119                 device_type = "pci";
 120                 bus-range = <0x0 0xff>;
 121                 ranges = <0x01000000 0x0 0x00000000 0xf 0xf8010000 0x0 0x00010000   /* downstream I/O */
 122                           0x02000000 0x0 0xe0000000 0xc 0x10000000 0x0 0x10000000>; /* non-prefetchable memory */
 123         };
 124
 125         pcie@ffe260000 {
 126                 compatible = "fsl,pcie-t104x", "fsl,pcie-fsl-qoriq";
 127                 reg = <0xf 0xfe260000 0x0 0x1000>;   /* registers */
 128                 law_trgt_if = <2>;
 129                 #address-cells = <3>;
 130                 #size-cells = <2>;
 131                 device_type = "pci";
 132                 bus-range = <0x0 0xff>;
 133                 ranges = <0x01000000 0x0 0x00000000 0xf 0xf8020000 0x0 0x00010000   /* downstream I/O */
 134                           0x02000000 0x0 0xe0000000 0xc 0x20000000 0x0 0x10000000>; /* non-prefetchable memory */
 135         };
 136
 137         pcie@ffe270000 {
 138                 compatible = "fsl,pcie-t104x", "fsl,pcie-fsl-qoriq";
 139                 reg = <0xf 0xfe270000 0x0 0x1000>;   /* registers */
 140                 law_trgt_if = <3>;
 141                 #address-cells = <3>;
 142                 #size-cells = <2>;
 143                 device_type = "pci";
 144                 bus-range = <0x0 0xff>;
 145                 ranges = <0x01000000 0x0 0x00000000 0xf 0xf8030000 0x0 0x00010000   /* downstream I/O */
 146                           0x02000000 0x0 0xe0000000 0xc 0x30000000 0x0 0x10000000>; /* non-prefetchable memory */
 147         };
 148 };