arch/powerpc/dts/t102x.dtsi

   1 // SPDX-License-Identifier: GPL-2.0+ OR X11
   2 /*
   3  * T102X Silicon/SoC Device Tree Source (pre include)
   4  *
   5  * Copyright 2013 Freescale Semiconductor Inc.
   6  * Copyright 2019-2020 NXP
   7  */
   8
   9 /dts-v1/;
  10
  11 /include/ "e5500_power_isa.dtsi"
  12
  13 / {
  14         #address-cells = <2>;
  15         #size-cells = <2>;
  16         interrupt-parent = <&mpic>;
  17
  18         cpus {
  19                 #address-cells = <1>;
  20                 #size-cells = <0>;
  21
  22                 cpu0: PowerPC,e5500@0 {
  23                         device_type = "cpu";
  24                         reg = <0>;
  25                         #cooling-cells = <2>;
  26                 };
  27                 cpu1: PowerPC,e5500@1 {
  28                         device_type = "cpu";
  29                         reg = <1>;
  30                         #cooling-cells = <2>;
  31                 };
  32         };
  33
  34         soc: soc@ffe000000 {
  35                 ranges = <0x00000000 0xf 0xfe000000 0x1000000>;
  36                 reg = <0xf 0xfe000000 0 0x00001000>;
  37                 #address-cells = <1>;
  38                 #size-cells = <1>;
  39                 device_type = "soc";
  40                 compatible = "simple-bus";
  41
  42                 mpic: pic@40000 {
  43                         interrupt-controller;
  44                         #address-cells = <0>;
  45                         #interrupt-cells = <4>;
  46                         reg = <0x40000 0x40000>;
  47                         compatible = "fsl,mpic", "chrp,open-pic";
  48                         device_type = "open-pic";
  49                         clock-frequency = <0x0>;
  50                 };
  51
  52                 espi0: spi@110000 {
  53                         compatible = "fsl,mpc8536-espi";
  54                         #address-cells = <1>;
  55                         #size-cells = <0>;
  56                         reg = <0x110000 0x1000>;
  57                         fsl,espi-num-chipselects = <4>;
  58                         status = "disabled";
  59                 };
  60
  61                 usb0@210000 {
  62                         compatible = "fsl-usb2-mph";
  63                         reg = <0x210000 0x1000>;
  64                         phy_type = "utmi";
  65                 };
  66
  67                 usb1@211000 {
  68                         compatible = "fsl-usb2-dr";
  69                         reg = <0x211000 0x1000>;
  70                         phy_type = "utmi";
  71                 };
  72
  73                 sata: sata@220000 {
  74                         compatible = "fsl,pq-sata-v2";
  75                         reg = <0x220000 0x1000>;
  76                         interrupts = <68 0x2 0 0>;
  77                         sata-offset = <0x1000>;
  78                         sata-number = <2>;
  79                         sata-fpdma = <0>;
  80                 };
  81
  82                 esdhc: esdhc@114000 {
  83                         compatible = "fsl,esdhc";
  84                         reg = <0x114000 0x1000>;
  85                         clock-frequency = <0>;
  86                 };
  87                 /include/ "qoriq-i2c-0.dtsi"
  88                 /include/ "qoriq-i2c-1.dtsi"
  89         };
  90
  91         pcie@ffe240000 {
  92                 compatible = "fsl,pcie-t102x", "fsl,pcie-fsl-qoriq";
  93                 reg = <0xf 0xfe240000 0x0 0x1000>;   /* registers */
  94                 law_trgt_if = <0>;
  95                 #address-cells = <3>;
  96                 #size-cells = <2>;
  97                 device_type = "pci";
  98                 bus-range = <0x0 0xff>;
  99                 ranges = <0x01000000 0x0 0x00000000 0xf 0xf8000000 0x0 0x00010000   /* downstream I/O */
 100                           0x02000000 0x0 0xe0000000 0xc 0x00000000 0x0 0x10000000>; /* non-prefetchable memory */
 101         };
 102
 103         pcie@ffe250000 {
 104                 compatible = "fsl,pcie-t102x", "fsl,pcie-fsl-qoriq";
 105                 reg = <0xf 0xfe250000 0x0 0x1000>;   /* registers */
 106                 law_trgt_if = <1>;
 107                 #address-cells = <3>;
 108                 #size-cells = <2>;
 109                 device_type = "pci";
 110                 bus-range = <0x0 0xff>;
 111                 ranges = <0x01000000 0x0 0x00000000 0xf 0xf8010000 0x0 0x00010000   /* downstream I/O */
 112                           0x02000000 0x0 0xe0000000 0xc 0x10000000 0x0 0x10000000>; /* non-prefetchable memory */
 113         };
 114
 115         pcie@ffe260000 {
 116                 compatible = "fsl,pcie-t102x", "fsl,pcie-fsl-qoriq";
 117                 reg = <0xf 0xfe260000 0x0 0x1000>;   /* registers */
 118                 law_trgt_if = <2>;
 119                 #address-cells = <3>;
 120                 #size-cells = <2>;
 121                 device_type = "pci";
 122                 bus-range = <0x0 0xff>;
 123                 ranges = <0x01000000 0x0 0x00000000 0xf 0xf8020000 0x0 0x00010000   /* downstream I/O */
 124                           0x02000000 0x0 0xe0000000 0xc 0x20000000 0x0 0x10000000>; /* non-prefetchable memory */
 125         };
 126 };