arch/powerpc/dts/canyonlands.dts

   1 /*
   2  * Device Tree Source for AMCC Canyonlands (460EX)
   3  *
   4  * Copyright 2008-2009 DENX Software Engineering, Stefan Roese <sr@denx.de>
   5  *
   6  * SPDX-License-Identifier:     GPL-2.0
   7  */
   8
   9 /dts-v1/;
  10
  11 / {
  12         #address-cells = <2>;
  13         #size-cells = <1>;
  14         model = "amcc,canyonlands";
  15         compatible = "amcc,canyonlands";
  16         dcr-parent = <&{/cpus/cpu@0}>;
  17
  18         aliases {
  19                 ethernet0 = &EMAC0;
  20                 ethernet1 = &EMAC1;
  21                 serial0 = &UART0;
  22                 serial1 = &UART1;
  23         };
  24
  25         cpus {
  26                 #address-cells = <1>;
  27                 #size-cells = <0>;
  28
  29                 cpu@0 {
  30                         device_type = "cpu";
  31                         model = "PowerPC,460EX";
  32                         reg = <0x00000000>;
  33                         clock-frequency = <0>; /* Filled in by U-Boot */
  34                         timebase-frequency = <0>; /* Filled in by U-Boot */
  35                         i-cache-line-size = <32>;
  36                         d-cache-line-size = <32>;
  37                         i-cache-size = <32768>;
  38                         d-cache-size = <32768>;
  39                         dcr-controller;
  40                         dcr-access-method = "native";
  41                         next-level-cache = <&L2C0>;
  42                 };
  43         };
  44
  45         memory {
  46                 device_type = "memory";
  47                 reg = <0x00000000 0x00000000 0x00000000>; /* Filled in by U-Boot */
  48         };
  49
  50         UIC0: interrupt-controller0 {
  51                 compatible = "ibm,uic-460ex","ibm,uic";
  52                 interrupt-controller;
  53                 cell-index = <0>;
  54                 dcr-reg = <0x0c0 0x009>;
  55                 #address-cells = <0>;
  56                 #size-cells = <0>;
  57                 #interrupt-cells = <2>;
  58         };
  59
  60         UIC1: interrupt-controller1 {
  61                 compatible = "ibm,uic-460ex","ibm,uic";
  62                 interrupt-controller;
  63                 cell-index = <1>;
  64                 dcr-reg = <0x0d0 0x009>;
  65                 #address-cells = <0>;
  66                 #size-cells = <0>;
  67                 #interrupt-cells = <2>;
  68                 interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */
  69                 interrupt-parent = <&UIC0>;
  70         };
  71
  72         UIC2: interrupt-controller2 {
  73                 compatible = "ibm,uic-460ex","ibm,uic";
  74                 interrupt-controller;
  75                 cell-index = <2>;
  76                 dcr-reg = <0x0e0 0x009>;
  77                 #address-cells = <0>;
  78                 #size-cells = <0>;
  79                 #interrupt-cells = <2>;
  80                 interrupts = <0xa 0x4 0xb 0x4>; /* cascade */
  81                 interrupt-parent = <&UIC0>;
  82         };
  83
  84         UIC3: interrupt-controller3 {
  85                 compatible = "ibm,uic-460ex","ibm,uic";
  86                 interrupt-controller;
  87                 cell-index = <3>;
  88                 dcr-reg = <0x0f0 0x009>;
  89                 #address-cells = <0>;
  90                 #size-cells = <0>;
  91                 #interrupt-cells = <2>;
  92                 interrupts = <0x10 0x4 0x11 0x4>; /* cascade */
  93                 interrupt-parent = <&UIC0>;
  94         };
  95
  96         SDR0: sdr {
  97                 compatible = "ibm,sdr-460ex";
  98                 dcr-reg = <0x00e 0x002>;
  99         };
 100
 101         CPR0: cpr {
 102                 compatible = "ibm,cpr-460ex";
 103                 dcr-reg = <0x00c 0x002>;
 104         };
 105
 106         CPM0: cpm {
 107                 compatible = "ibm,cpm";
 108                 dcr-access-method = "native";
 109                 dcr-reg = <0x160 0x003>;
 110                 unused-units = <0x00000100>;
 111                 idle-doze = <0x02000000>;
 112                 standby = <0xfeff791d>;
 113         };
 114
 115         L2C0: l2c {
 116                 compatible = "ibm,l2-cache-460ex", "ibm,l2-cache";
 117                 dcr-reg = <0x020 0x008          /* Internal SRAM DCR's */
 118                            0x030 0x008>;        /* L2 cache DCR's */
 119                 cache-line-size = <32>;         /* 32 bytes */
 120                 cache-size = <262144>;          /* L2, 256K */
 121                 interrupt-parent = <&UIC1>;
 122                 interrupts = <11 1>;
 123         };
 124
 125         plb {
 126                 compatible = "ibm,plb-460ex", "ibm,plb4";
 127                 #address-cells = <2>;
 128                 #size-cells = <1>;
 129                 ranges;
 130                 clock-frequency = <0>; /* Filled in by U-Boot */
 131
 132                 SDRAM0: sdram {
 133                         compatible = "ibm,sdram-460ex", "ibm,sdram-405gp";
 134                         dcr-reg = <0x010 0x002>;
 135                 };
 136
 137                 CRYPTO: crypto@180000 {
 138                         compatible = "amcc,ppc460ex-crypto", "amcc,ppc4xx-crypto";
 139                         reg = <4 0x00180000 0x80400>;
 140                         interrupt-parent = <&UIC0>;
 141                         interrupts = <0x1d 0x4>;
 142                 };
 143
 144                 HWRNG: hwrng@110000 {
 145                         compatible = "amcc,ppc460ex-rng", "ppc4xx-rng";
 146                         reg = <4 0x00110000 0x50>;
 147                 };
 148
 149                 MAL0: mcmal {
 150                         compatible = "ibm,mcmal-460ex", "ibm,mcmal2";
 151                         dcr-reg = <0x180 0x062>;
 152                         num-tx-chans = <2>;
 153                         num-rx-chans = <16>;
 154                         #address-cells = <0>;
 155                         #size-cells = <0>;
 156                         interrupt-parent = <&UIC2>;
 157                         interrupts = <  /*TXEOB*/ 0x6 0x4
 158                                         /*RXEOB*/ 0x7 0x4
 159                                         /*SERR*/  0x3 0x4
 160                                         /*TXDE*/  0x4 0x4
 161                                         /*RXDE*/  0x5 0x4>;
 162                 };
 163
 164                 USB0: ehci@bffd0400 {
 165                         compatible = "ibm,usb-ehci-460ex", "usb-ehci";
 166                         interrupt-parent = <&UIC2>;
 167                         interrupts = <0x1d 4>;
 168                         reg = <4 0xbffd0400 0x90 4 0xbffd0490 0x70>;
 169                 };
 170
 171                 USB1: usb@bffd0000 {
 172                         compatible = "ohci-le";
 173                         reg = <4 0xbffd0000 0x60>;
 174                         interrupt-parent = <&UIC2>;
 175                         interrupts = <0x1e 4>;
 176                 };
 177
 178                 USBOTG0: usbotg@bff80000 {
 179                         compatible = "amcc,dwc-otg";
 180                         reg = <0x4 0xbff80000 0x10000>;
 181                         interrupt-parent = <&USBOTG0>;
 182                         #interrupt-cells = <1>;
 183                         #address-cells = <0>;
 184                         #size-cells = <0>;
 185                         interrupts = <0x0 0x1 0x2>;
 186                         interrupt-map = </* USB-OTG */ 0x0 &UIC2 0x1c 0x4
 187                                          /* HIGH-POWER */ 0x1 &UIC1 0x1a 0x8
 188                                          /* DMA */ 0x2 &UIC0 0xc 0x4>;
 189                 };
 190
 191                 SATA0: sata@bffd1000 {
 192                         compatible = "amcc,sata-460ex";
 193                         reg = <4 0xbffd1000 0x800 4 0xbffd0800 0x400>;
 194                         interrupt-parent = <&UIC3>;
 195                         interrupts = <0x0 0x4       /* SATA */
 196                                       0x5 0x4>;     /* AHBDMA */
 197                 };
 198
 199                 POB0: opb {
 200                         compatible = "ibm,opb-460ex", "ibm,opb";
 201                         #address-cells = <1>;
 202                         #size-cells = <1>;
 203                         ranges = <0xb0000000 0x00000004 0xb0000000 0x50000000>;
 204                         clock-frequency = <0>; /* Filled in by U-Boot */
 205
 206                         EBC0: ebc {
 207                                 compatible = "ibm,ebc-460ex", "ibm,ebc";
 208                                 dcr-reg = <0x012 0x002>;
 209                                 #address-cells = <2>;
 210                                 #size-cells = <1>;
 211                                 clock-frequency = <0>; /* Filled in by U-Boot */
 212                                 /* ranges property is supplied by U-Boot */
 213                                 interrupts = <0x6 0x4>;
 214                                 interrupt-parent = <&UIC1>;
 215
 216                                 nor_flash@0,0 {
 217                                         compatible = "amd,s29gl512n", "cfi-flash";
 218                                         bank-width = <2>;
 219                                         reg = <0x00000000 0x00000000 0x04000000>;
 220                                         #address-cells = <1>;
 221                                         #size-cells = <1>;
 222                                         partition@0 {
 223                                                 label = "kernel";
 224                                                 reg = <0x00000000 0x001e0000>;
 225                                         };
 226                                         partition@1e0000 {
 227                                                 label = "dtb";
 228                                                 reg = <0x001e0000 0x00020000>;
 229                                         };
 230                                         partition@200000 {
 231                                                 label = "ramdisk";
 232                                                 reg = <0x00200000 0x01400000>;
 233                                         };
 234                                         partition@1600000 {
 235                                                 label = "jffs2";
 236                                                 reg = <0x01600000 0x00400000>;
 237                                         };
 238                                         partition@1a00000 {
 239                                                 label = "user";
 240                                                 reg = <0x01a00000 0x02560000>;
 241                                         };
 242                                         partition@3f60000 {
 243                                                 label = "env";
 244                                                 reg = <0x03f60000 0x00040000>;
 245                                         };
 246                                         partition@3fa0000 {
 247                                                 label = "u-boot";
 248                                                 reg = <0x03fa0000 0x00060000>;
 249                                         };
 250                                 };
 251
 252                                 cpld@2,0 {
 253                                         compatible = "amcc,ppc460ex-bcsr";
 254                                         reg = <2 0x0 0x9>;
 255                                 };
 256
 257                                 ndfc@3,0 {
 258                                         compatible = "ibm,ndfc";
 259                                         reg = <0x00000003 0x00000000 0x00002000>;
 260                                         ccr = <0x00001000>;
 261                                         bank-settings = <0x80002222>;
 262                                         #address-cells = <1>;
 263                                         #size-cells = <1>;
 264
 265                                         nand {
 266                                                 #address-cells = <1>;
 267                                                 #size-cells = <1>;
 268
 269                                                 partition@0 {
 270                                                         label = "u-boot";
 271                                                         reg = <0x00000000 0x00100000>;
 272                                                 };
 273                                                 partition@100000 {
 274                                                         label = "user";
 275                                                         reg = <0x00000000 0x03f00000>;
 276                                                 };
 277                                         };
 278                                 };
 279                         };
 280
 281                         UART0: serial@ef600300 {
 282                                 device_type = "serial";
 283                                 compatible = "ns16550";
 284                                 reg = <0xef600300 0x00000008>;
 285                                 virtual-reg = <0xef600300>;
 286                                 clock-frequency = <0>; /* Filled in by U-Boot */
 287                                 current-speed = <0>; /* Filled in by U-Boot */
 288                                 interrupt-parent = <&UIC1>;
 289                                 interrupts = <0x1 0x4>;
 290                         };
 291
 292                         UART1: serial@ef600400 {
 293                                 device_type = "serial";
 294                                 compatible = "ns16550";
 295                                 reg = <0xef600400 0x00000008>;
 296                                 virtual-reg = <0xef600400>;
 297                                 clock-frequency = <0>; /* Filled in by U-Boot */
 298                                 current-speed = <0>; /* Filled in by U-Boot */
 299                                 interrupt-parent = <&UIC0>;
 300                                 interrupts = <0x1 0x4>;
 301                         };
 302
 303                         IIC0: i2c@ef600700 {
 304                                 compatible = "ibm,iic-460ex", "ibm,iic";
 305                                 reg = <0xef600700 0x00000014>;
 306                                 interrupt-parent = <&UIC0>;
 307                                 interrupts = <0x2 0x4>;
 308                                 #address-cells = <1>;
 309                                 #size-cells = <0>;
 310                                 rtc@68 {
 311                                         compatible = "stm,m41t80";
 312                                         reg = <0x68>;
 313                                         interrupt-parent = <&UIC2>;
 314                                         interrupts = <0x19 0x8>;
 315                                 };
 316                                 sttm@48 {
 317                                         compatible = "ad,ad7414";
 318                                         reg = <0x48>;
 319                                         interrupt-parent = <&UIC1>;
 320                                         interrupts = <0x14 0x8>;
 321                                 };
 322                         };
 323
 324                         IIC1: i2c@ef600800 {
 325                                 compatible = "ibm,iic-460ex", "ibm,iic";
 326                                 reg = <0xef600800 0x00000014>;
 327                                 interrupt-parent = <&UIC0>;
 328                                 interrupts = <0x3 0x4>;
 329                         };
 330
 331                         GPIO0: gpio@ef600b00 {
 332                                 compatible = "ibm,ppc4xx-gpio";
 333                                 reg = <0xef600b00 0x00000048>;
 334                                 gpio-controller;
 335                         };
 336
 337                         ZMII0: emac-zmii@ef600d00 {
 338                                 compatible = "ibm,zmii-460ex", "ibm,zmii";
 339                                 reg = <0xef600d00 0x0000000c>;
 340                         };
 341
 342                         RGMII0: emac-rgmii@ef601500 {
 343                                 compatible = "ibm,rgmii-460ex", "ibm,rgmii";
 344                                 reg = <0xef601500 0x00000008>;
 345                                 has-mdio;
 346                         };
 347
 348                         TAH0: emac-tah@ef601350 {
 349                                 compatible = "ibm,tah-460ex", "ibm,tah";
 350                                 reg = <0xef601350 0x00000030>;
 351                         };
 352
 353                         TAH1: emac-tah@ef601450 {
 354                                 compatible = "ibm,tah-460ex", "ibm,tah";
 355                                 reg = <0xef601450 0x00000030>;
 356                         };
 357
 358                         EMAC0: ethernet@ef600e00 {
 359                                 device_type = "network";
 360                                 compatible = "ibm,emac-460ex", "ibm,emac4sync";
 361                                 interrupt-parent = <&EMAC0>;
 362                                 interrupts = <0x0 0x1>;
 363                                 #interrupt-cells = <1>;
 364                                 #address-cells = <0>;
 365                                 #size-cells = <0>;
 366                                 interrupt-map = </*Status*/ 0x0 &UIC2 0x10 0x4
 367                                                  /*Wake*/   0x1 &UIC2 0x14 0x4>;
 368                                 reg = <0xef600e00 0x000000c4>;
 369                                 local-mac-address = [000000000000]; /* Filled in by U-Boot */
 370                                 mal-device = <&MAL0>;
 371                                 mal-tx-channel = <0>;
 372                                 mal-rx-channel = <0>;
 373                                 cell-index = <0>;
 374                                 max-frame-size = <9000>;
 375                                 rx-fifo-size = <4096>;
 376                                 tx-fifo-size = <2048>;
 377                                 rx-fifo-size-gige = <16384>;
 378                                 phy-mode = "rgmii";
 379                                 phy-map = <0x00000000>;
 380                                 rgmii-device = <&RGMII0>;
 381                                 rgmii-channel = <0>;
 382                                 tah-device = <&TAH0>;
 383                                 tah-channel = <0>;
 384                                 has-inverted-stacr-oc;
 385                                 has-new-stacr-staopc;
 386                         };
 387
 388                         EMAC1: ethernet@ef600f00 {
 389                                 device_type = "network";
 390                                 compatible = "ibm,emac-460ex", "ibm,emac4sync";
 391                                 interrupt-parent = <&EMAC1>;
 392                                 interrupts = <0x0 0x1>;
 393                                 #interrupt-cells = <1>;
 394                                 #address-cells = <0>;
 395                                 #size-cells = <0>;
 396                                 interrupt-map = </*Status*/ 0x0 &UIC2 0x11 0x4
 397                                                  /*Wake*/   0x1 &UIC2 0x15 0x4>;
 398                                 reg = <0xef600f00 0x000000c4>;
 399                                 local-mac-address = [000000000000]; /* Filled in by U-Boot */
 400                                 mal-device = <&MAL0>;
 401                                 mal-tx-channel = <1>;
 402                                 mal-rx-channel = <8>;
 403                                 cell-index = <1>;
 404                                 max-frame-size = <9000>;
 405                                 rx-fifo-size = <4096>;
 406                                 tx-fifo-size = <2048>;
 407                                 rx-fifo-size-gige = <16384>;
 408                                 phy-mode = "rgmii";
 409                                 phy-map = <0x00000000>;
 410                                 rgmii-device = <&RGMII0>;
 411                                 rgmii-channel = <1>;
 412                                 tah-device = <&TAH1>;
 413                                 tah-channel = <1>;
 414                                 has-inverted-stacr-oc;
 415                                 has-new-stacr-staopc;
 416                                 mdio-device = <&EMAC0>;
 417                         };
 418                 };
 419
 420                 PCIX0: pci@c0ec00000 {
 421                         device_type = "pci";
 422                         #interrupt-cells = <1>;
 423                         #size-cells = <2>;
 424                         #address-cells = <3>;
 425                         compatible = "ibm,plb-pcix-460ex", "ibm,plb-pcix";
 426                         primary;
 427                         large-inbound-windows;
 428                         enable-msi-hole;
 429                         reg = <0x0000000c 0x0ec00000   0x00000008       /* Config space access */
 430                                0x00000000 0x00000000 0x00000000         /* no IACK cycles */
 431                                0x0000000c 0x0ed00000   0x00000004   /* Special cycles */
 432                                0x0000000c 0x0ec80000 0x00000100 /* Internal registers */
 433                                0x0000000c 0x0ec80100  0x000000fc>;      /* Internal messaging registers */
 434
 435                         /* Outbound ranges, one memory and one IO,
 436                          * later cannot be changed
 437                          */
 438                         ranges = <0x02000000 0x00000000 0x80000000 0x0000000d 0x80000000 0x00000000 0x80000000
 439                                   0x02000000 0x00000000 0x00000000 0x0000000c 0x0ee00000 0x00000000 0x00100000
 440                                   0x01000000 0x00000000 0x00000000 0x0000000c 0x08000000 0x00000000 0x00010000>;
 441
 442                         /* Inbound 2GB range starting at 0 */
 443                         dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x80000000>;
 444
 445                         /* This drives busses 0 to 0x3f */
 446                         bus-range = <0x0 0x3f>;
 447
 448                         /* All PCI interrupts are routed to ext IRQ 2 -> UIC1-0 */
 449                         interrupt-map-mask = <0x0 0x0 0x0 0x0>;
 450                         interrupt-map = < 0x0 0x0 0x0 0x0 &UIC1 0x0 0x8 >;
 451                 };
 452
 453                 PCIE0: pciex@d00000000 {
 454                         device_type = "pci";
 455                         #interrupt-cells = <1>;
 456                         #size-cells = <2>;
 457                         #address-cells = <3>;
 458                         compatible = "ibm,plb-pciex-460ex", "ibm,plb-pciex";
 459                         primary;
 460                         port = <0x0>; /* port number */
 461                         reg = <0x0000000d 0x00000000 0x20000000 /* Config space access */
 462                                0x0000000c 0x08010000 0x00001000>;       /* Registers */
 463                         dcr-reg = <0x100 0x020>;
 464                         sdr-base = <0x300>;
 465
 466                         /* Outbound ranges, one memory and one IO,
 467                          * later cannot be changed
 468                          */
 469                         ranges = <0x02000000 0x00000000 0x80000000 0x0000000e 0x00000000 0x00000000 0x80000000
 470                                   0x02000000 0x00000000 0x00000000 0x0000000f 0x00000000 0x00000000 0x00100000
 471                                   0x01000000 0x00000000 0x00000000 0x0000000f 0x80000000 0x00000000 0x00010000>;
 472
 473                         /* Inbound 2GB range starting at 0 */
 474                         dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x80000000>;
 475
 476                         /* This drives busses 40 to 0x7f */
 477                         bus-range = <0x40 0x7f>;
 478
 479                         /* Legacy interrupts (note the weird polarity, the bridge seems
 480                          * to invert PCIe legacy interrupts).
 481                          * We are de-swizzling here because the numbers are actually for
 482                          * port of the root complex virtual P2P bridge. But I want
 483                          * to avoid putting a node for it in the tree, so the numbers
 484                          * below are basically de-swizzled numbers.
 485                          * The real slot is on idsel 0, so the swizzling is 1:1
 486                          */
 487                         interrupt-map-mask = <0x0 0x0 0x0 0x7>;
 488                         interrupt-map = <
 489                                 0x0 0x0 0x0 0x1 &UIC3 0xc 0x4 /* swizzled int A */
 490                                 0x0 0x0 0x0 0x2 &UIC3 0xd 0x4 /* swizzled int B */
 491                                 0x0 0x0 0x0 0x3 &UIC3 0xe 0x4 /* swizzled int C */
 492                                 0x0 0x0 0x0 0x4 &UIC3 0xf 0x4 /* swizzled int D */>;
 493                 };
 494
 495                 PCIE1: pciex@d20000000 {
 496                         device_type = "pci";
 497                         #interrupt-cells = <1>;
 498                         #size-cells = <2>;
 499                         #address-cells = <3>;
 500                         compatible = "ibm,plb-pciex-460ex", "ibm,plb-pciex";
 501                         primary;
 502                         port = <0x1>; /* port number */
 503                         reg = <0x0000000d 0x20000000 0x20000000 /* Config space access */
 504                                0x0000000c 0x08011000 0x00001000>;       /* Registers */
 505                         dcr-reg = <0x120 0x020>;
 506                         sdr-base = <0x340>;
 507
 508                         /* Outbound ranges, one memory and one IO,
 509                          * later cannot be changed
 510                          */
 511                         ranges = <0x02000000 0x00000000 0x80000000 0x0000000e 0x80000000 0x00000000 0x80000000
 512                                   0x02000000 0x00000000 0x00000000 0x0000000f 0x00100000 0x00000000 0x00100000
 513                                   0x01000000 0x00000000 0x00000000 0x0000000f 0x80010000 0x00000000 0x00010000>;
 514
 515                         /* Inbound 2GB range starting at 0 */
 516                         dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x80000000>;
 517
 518                         /* This drives busses 80 to 0xbf */
 519                         bus-range = <0x80 0xbf>;
 520
 521                         /* Legacy interrupts (note the weird polarity, the bridge seems
 522                          * to invert PCIe legacy interrupts).
 523                          * We are de-swizzling here because the numbers are actually for
 524                          * port of the root complex virtual P2P bridge. But I want
 525                          * to avoid putting a node for it in the tree, so the numbers
 526                          * below are basically de-swizzled numbers.
 527                          * The real slot is on idsel 0, so the swizzling is 1:1
 528                          */
 529                         interrupt-map-mask = <0x0 0x0 0x0 0x7>;
 530                         interrupt-map = <
 531                                 0x0 0x0 0x0 0x1 &UIC3 0x10 0x4 /* swizzled int A */
 532                                 0x0 0x0 0x0 0x2 &UIC3 0x11 0x4 /* swizzled int B */
 533                                 0x0 0x0 0x0 0x3 &UIC3 0x12 0x4 /* swizzled int C */
 534                                 0x0 0x0 0x0 0x4 &UIC3 0x13 0x4 /* swizzled int D */>;
 535                 };
 536
 537                 MSI: ppc4xx-msi@C10000000 {
 538                         compatible = "amcc,ppc4xx-msi", "ppc4xx-msi";
 539                         reg = < 0xC 0x10000000 0x100>;
 540                         sdr-base = <0x36C>;
 541                         msi-data = <0x00000000>;
 542                         msi-mask = <0x44440000>;
 543                         interrupt-count = <3>;
 544                         interrupts = <0 1 2 3>;
 545                         interrupt-parent = <&UIC3>;
 546                         #interrupt-cells = <1>;
 547                         #address-cells = <0>;
 548                         #size-cells = <0>;
 549                         interrupt-map = <0 &UIC3 0x18 1
 550                                         1 &UIC3 0x19 1
 551                                         2 &UIC3 0x1A 1
 552                                         3 &UIC3 0x1B 1>;
 553                 };
 554         };
 555 };