12 bool "Support MCR3000 board from CSSI"
15 bool "Support CMPC885 board from CSSI"
25 select SYS_CACHE_SHIFT_4
29 select SYS_CACHE_SHIFT_4
34 prompt "Microcode patch selection"
35 default NO_UCODE_PATCH
37 This allows loading of CPM microcode.
39 Only one microcode can be loaded at a time.
44 config USB_SOF_UCODE_PATCH
48 This microcode fixes CPM15 errata:
50 When the USB controller is configured in Host mode, and the
51 SOF generation (SFTE=1 in USMOD register) is being used,
52 there may be false CRC error indication in other SCCs.
53 Although the data is received correctly, the CRC result
56 config SMC_UCODE_PATCH
57 bool "SMC relocation patch"
59 This microcode relocates SMC1 and SMC2 parameter RAMs to allow
60 extended parameter RAM for SCC3 and SCC4 (ex: for QMC mode)
63 hex "SMC1 relocation offset"
64 depends on SMC_UCODE_PATCH
67 Offset of SMC1 parameter RAM to be written to RPBASE register.
70 hex "SMC2 relocation offset"
71 depends on SMC_UCODE_PATCH
74 Offset of SMC2 parameter RAM to be written to RPBASE register.
78 comment "Specific commands"
81 bool "Enable various commands to dump IMMR information"
83 This enables various commands such as:
85 siuinfo - print System Interface Unit (SIU) registers
86 memcinfo - print Memory Controller registers
88 comment "Configuration Registers"
93 SIU Module Configuration (11-6)
96 hex "SYPCR register" if !WDT_MPC8xxx
99 System Protection Control (11-9)
104 Time Base Status and Control (11-26)
109 Periodic Interrupt Status and Control (11-31)
111 config SYS_PLPRCR_BOOL
112 bool "Customise PLPRCR"
115 hex "PLPRCR register"
116 depends on SYS_PLPRCR_BOOL
118 PLL, Low-Power, and Reset Control Register (15-30)
123 System Clock and reset Control Register (15-27)
126 hex "MASK for setting SCCR register"
131 Debug Event Register (37-47)
133 source "board/cssi/mcr3000/Kconfig"
135 source "board/cssi/cmpc885/Kconfig"