1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * Copyright 2007-2009, 2011 Freescale Semiconductor, Inc.
8 #ifdef CONFIG_RESET_VECTOR_ADDRESS
9 #define RESET_VECTOR_ADDRESS CONFIG_RESET_VECTOR_ADDRESS
11 #define RESET_VECTOR_ADDRESS 0xfffffffc
19 /* Read-only sections, merged into text segment: */
22 #if CONFIG_IS_ENABLED(SYS_MPC85XX_NO_RESETVEC)
23 KEEP(arch/powerpc/cpu/mpc85xx/start.o (.bootpg))
31 *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))
34 /* Read-write section, merged into data segment: */
35 . = (. + 0x00FF) & 0xFFFFFF00;
37 PROVIDE (erotext = .);
46 __got2_entries = ((_GLOBAL_OFFSET_TABLE_ - _GOT2_TABLE_) >> 2) - 1;
47 __fixup_entries = (. - _FIXUP_TABLE_) >> 2;
61 KEEP(*(SORT(__u_boot_list*)));
65 __start___ex_table = .;
66 __ex_table : { *(__ex_table) }
67 __stop___ex_table = .;
71 .text.init : { *(.text.init) }
72 .data.init : { *(.data.init) }
77 #if !CONFIG_IS_ENABLED(SYS_MPC85XX_NO_RESETVEC)
78 .bootpg RESET_VECTOR_ADDRESS - 0xffc :
80 arch/powerpc/cpu/mpc85xx/start.o (.bootpg)
83 .resetvec RESET_VECTOR_ADDRESS :
88 . = RESET_VECTOR_ADDRESS + 0x4;
91 * Make sure that the bss segment isn't linked at 0x0, otherwise its
92 * address won't be updated during relocation fixups. Note that
93 * this is a temporary fix. Code to dynamically the fixup the bss
94 * location will be added in the future. When the bss relocation
95 * fixup code is present this workaround should be removed.
97 #if (RESET_VECTOR_ADDRESS == 0xfffffffc)