1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * Copyright 2007-2009, 2011 Freescale Semiconductor, Inc.
8 #ifdef CFG_RESET_VECTOR_ADDRESS
9 #define RESET_VECTOR_ADDRESS CFG_RESET_VECTOR_ADDRESS
11 #define RESET_VECTOR_ADDRESS 0xfffffffc
19 /* Optional boot sector */
20 #if defined(CONFIG_FSL_PREPBL_ESDHC_BOOT_SECTOR) && !defined(CONFIG_SPL)
21 .bootsect CONFIG_TEXT_BASE - CONFIG_FSL_PREPBL_ESDHC_BOOT_SECTOR_DATA * 512 : {
22 KEEP(arch/powerpc/cpu/mpc85xx/start.o (.bootsect))
23 . = CONFIG_FSL_PREPBL_ESDHC_BOOT_SECTOR_DATA * 512;
27 /* Read-only sections, merged into text segment: */
30 #if CONFIG_IS_ENABLED(SYS_MPC85XX_NO_RESETVEC)
31 KEEP(arch/powerpc/cpu/mpc85xx/start.o (.bootpg))
39 *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))
42 /* Read-write section, merged into data segment: */
43 . = (. + 0x00FF) & 0xFFFFFF00;
45 PROVIDE (erotext = .);
54 __got2_entries = ((_GLOBAL_OFFSET_TABLE_ - _GOT2_TABLE_) >> 2) - 1;
55 __fixup_entries = (. - _FIXUP_TABLE_) >> 2;
69 KEEP(*(SORT(__u_boot_list*)));
73 __start___ex_table = .;
74 __ex_table : { *(__ex_table) }
75 __stop___ex_table = .;
79 .text.init : { *(.text.init) }
80 .data.init : { *(.data.init) }
85 #if !CONFIG_IS_ENABLED(SYS_MPC85XX_NO_RESETVEC)
86 .bootpg RESET_VECTOR_ADDRESS - 0xffc :
88 arch/powerpc/cpu/mpc85xx/start.o (.bootpg)
91 .resetvec RESET_VECTOR_ADDRESS :
96 . = RESET_VECTOR_ADDRESS + 0x4;
99 * Make sure that the bss segment isn't linked at 0x0, otherwise its
100 * address won't be updated during relocation fixups. Note that
101 * this is a temporary fix. Code to dynamically the fixup the bss
102 * location will be added in the future. When the bss relocation
103 * fixup code is present this workaround should be removed.
105 #if (RESET_VECTOR_ADDRESS == 0xfffffffc)