1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright 2008-2011 Freescale Semiconductor, Inc.
8 #include <linux/libfdt.h>
9 #include <fdt_support.h>
11 #include <asm/immap_85xx.h>
13 #include <asm/processor.h>
14 #include <asm/fsl_portals.h>
15 #include <asm/fsl_liodn.h>
17 int get_dpaa_liodn(enum fsl_dpaa_dev dpaa_dev, u32 *liodns, int liodn_offset)
19 liodns[0] = liodn_bases[dpaa_dev].id[0] + liodn_offset;
21 if (liodn_bases[dpaa_dev].num_ids == 2)
22 liodns[1] = liodn_bases[dpaa_dev].id[1] + liodn_offset;
24 return liodn_bases[dpaa_dev].num_ids;
27 #ifdef CONFIG_SYS_SRIO
28 static void set_srio_liodn(struct srio_liodn_id_table *tbl, int size)
32 for (i = 0; i < size; i++) {
33 unsigned long reg_off = tbl[i].reg_offset[0];
34 out_be32((u32 *)reg_off, tbl[i].id[0]);
36 if (tbl[i].num_ids == 2) {
37 reg_off = tbl[i].reg_offset[1];
38 out_be32((u32 *)reg_off, tbl[i].id[1]);
44 static void set_liodn(struct liodn_id_table *tbl, int size)
48 for (i = 0; i < size; i++) {
50 if (tbl[i].num_ids == 2) {
51 liodn = (tbl[i].id[0] << 16) | tbl[i].id[1];
56 out_be32((volatile u32 *)(tbl[i].reg_offset), liodn);
60 #ifdef CONFIG_SYS_DPAA_FMAN
61 static void set_fman_liodn(struct fman_liodn_id_table *tbl, int size)
65 for (i = 0; i < size; i++) {
67 if (tbl[i].num_ids == 2)
68 liodn = (tbl[i].id[0] << 16) | tbl[i].id[1];
72 out_be32((volatile u32 *)(tbl[i].reg_offset), liodn);
77 static void setup_sec_liodn_base(void)
79 ccsr_sec_t *sec = (void *)CFG_SYS_FSL_SEC_ADDR;
82 if (!IS_E_PROCESSOR(get_svr()))
86 sec_out32(&sec->qilcr_ms, 0x3ff<<16);
88 base = (liodn_bases[FSL_HW_PORTAL_SEC].id[0] << 16) |
89 liodn_bases[FSL_HW_PORTAL_SEC].id[1];
91 sec_out32(&sec->qilcr_ls, base);
94 #ifdef CONFIG_SYS_DPAA_FMAN
95 static void setup_fman_liodn_base(enum fsl_dpaa_dev dev,
96 struct fman_liodn_id_table *tbl, int size)
103 case FSL_HW_PORTAL_FMAN1:
104 fm = (void *)CFG_SYS_FSL_FM1_ADDR;
107 #if (CFG_SYS_NUM_FMAN == 2)
108 case FSL_HW_PORTAL_FMAN2:
109 fm = (void *)CFG_SYS_FSL_FM2_ADDR;
113 printf("Error: Invalid device type to %s\n", __FUNCTION__);
117 base = (liodn_bases[dev].id[0] << 16) | liodn_bases[dev].id[0];
119 /* setup all bases the same */
120 for (i = 0; i < 32; i++) {
121 out_be32(&fm->fm_dma.fmdmplr[i], base);
124 /* update tbl to ... */
125 for (i = 0; i < size; i++)
126 tbl[i].id[0] += liodn_bases[dev].id[0];
130 static void setup_pme_liodn_base(void)
132 #ifdef CONFIG_SYS_DPAA_PME
133 ccsr_pme_t *pme = (void *)CFG_SYS_FSL_CORENET_PME_ADDR;
134 u32 base = (liodn_bases[FSL_HW_PORTAL_PME].id[0] << 16) |
135 liodn_bases[FSL_HW_PORTAL_PME].id[1];
137 out_be32(&pme->liodnbr, base);
141 #ifdef CONFIG_SYS_FSL_RAID_ENGINE
142 static void setup_raide_liodn_base(void)
144 struct ccsr_raide *raide = (void *)CFG_SYS_FSL_RAID_ENGINE_ADDR;
146 /* setup raid engine liodn base for data/desc ; both set to 47 */
147 u32 base = (liodn_bases[FSL_HW_PORTAL_RAID_ENGINE].id[0] << 16) |
148 liodn_bases[FSL_HW_PORTAL_RAID_ENGINE].id[0];
150 out_be32(&raide->liodnbr, base);
154 #ifdef CONFIG_SYS_DPAA_RMAN
155 static void set_rman_liodn(struct liodn_id_table *tbl, int size)
158 struct ccsr_rman *rman = (void *)CFG_SYS_FSL_CORENET_RMAN_ADDR;
160 for (i = 0; i < size; i++) {
161 /* write the RMan block number */
162 out_be32(&rman->mmitar, i);
163 /* write the liodn offset corresponding to the block */
164 out_be32((u32 *)(tbl[i].reg_offset), tbl[i].id[0]);
168 static void setup_rman_liodn_base(struct liodn_id_table *tbl, int size)
171 struct ccsr_rman *rman = (void *)CFG_SYS_FSL_CORENET_RMAN_ADDR;
172 u32 base = liodn_bases[FSL_HW_PORTAL_RMAN].id[0];
174 out_be32(&rman->mmliodnbr, base);
176 /* update liodn offset */
177 for (i = 0; i < size; i++)
178 tbl[i].id[0] += base;
182 void set_liodns(void)
184 /* setup general liodn offsets */
185 set_liodn(liodn_tbl, liodn_tbl_sz);
187 #ifdef CONFIG_SYS_SRIO
188 /* setup SRIO port liodns */
189 set_srio_liodn(srio_liodn_tbl, srio_liodn_tbl_sz);
192 /* setup SEC block liodn bases & offsets if we have one */
193 if (IS_E_PROCESSOR(get_svr())) {
194 set_liodn(sec_liodn_tbl, sec_liodn_tbl_sz);
195 setup_sec_liodn_base();
198 /* setup FMAN block(s) liodn bases & offsets if we have one */
199 #ifdef CONFIG_SYS_DPAA_FMAN
200 set_fman_liodn(fman1_liodn_tbl, fman1_liodn_tbl_sz);
201 setup_fman_liodn_base(FSL_HW_PORTAL_FMAN1, fman1_liodn_tbl,
204 #if (CFG_SYS_NUM_FMAN == 2)
205 set_fman_liodn(fman2_liodn_tbl, fman2_liodn_tbl_sz);
206 setup_fman_liodn_base(FSL_HW_PORTAL_FMAN2, fman2_liodn_tbl,
210 /* setup PME liodn base */
211 setup_pme_liodn_base();
213 #ifdef CONFIG_SYS_FSL_RAID_ENGINE
214 /* raid engine ccr addr code for liodn */
215 set_liodn(raide_liodn_tbl, raide_liodn_tbl_sz);
216 setup_raide_liodn_base();
219 #ifdef CONFIG_SYS_DPAA_RMAN
220 /* setup RMan liodn offsets */
221 set_rman_liodn(rman_liodn_tbl, rman_liodn_tbl_sz);
222 /* setup RMan liodn base */
223 setup_rman_liodn_base(rman_liodn_tbl, rman_liodn_tbl_sz);
227 #ifdef CONFIG_SYS_SRIO
228 static void fdt_fixup_srio_liodn(void *blob, struct srio_liodn_id_table *tbl)
232 /* search for srio node, if doesn't exist just return - nothing todo */
233 srio_off = fdt_node_offset_by_compatible(blob, -1, "fsl,srio");
237 for (i = 0; i < srio_liodn_tbl_sz; i++) {
238 int off, portid = tbl[i].portid;
240 off = fdt_node_offset_by_prop_value(blob, srio_off,
241 "cell-index", &portid, 4);
243 off = fdt_setprop(blob, off, "fsl,liodn",
245 sizeof(u32) * tbl[i].num_ids);
247 printf("WARNING unable to set fsl,liodn for "
248 "fsl,srio port %d: %s\n",
249 portid, fdt_strerror(off));
251 debug("WARNING: couldn't set fsl,liodn for srio: %s.\n",
258 #define CFG_SYS_MAX_PCI_EPS 8
260 static void fdt_fixup_pci_liodn_offsets(void *fdt, const char *compat,
263 int off, pci_idx = 0, pci_cnt = 0, i, rc;
264 const uint32_t *base_liodn;
265 uint32_t liodn_offs[CFG_SYS_MAX_PCI_EPS + 1] = { 0 };
268 * Count the number of pci nodes.
269 * It's needed later when the interleaved liodn offsets are generated.
271 fdt_for_each_node_by_compatible(off, fdt, -1, compat)
274 fdt_for_each_node_by_compatible(off, fdt, -1, compat) {
275 base_liodn = fdt_getprop(fdt, off, "fsl,liodn", &rc);
279 if (fdt_get_path(fdt, off, path, sizeof(path)) < 0)
280 strcpy(path, "(unknown)");
281 printf("WARNING Could not get liodn of node %s: %s\n",
282 path, fdt_strerror(rc));
285 for (i = 0; i < CFG_SYS_MAX_PCI_EPS; i++)
286 liodn_offs[i + 1] = ep_liodn_start +
287 i * pci_cnt + pci_idx - *base_liodn;
288 rc = fdt_setprop(fdt, off, "fsl,liodn-offset-list",
289 liodn_offs, sizeof(liodn_offs));
293 if (fdt_get_path(fdt, off, path, sizeof(path)) < 0)
294 strcpy(path, "(unknown)");
295 printf("WARNING Unable to set fsl,liodn-offset-list for "
296 "node %s: %s\n", path, fdt_strerror(rc));
303 static void fdt_fixup_liodn_tbl(void *blob, struct liodn_id_table *tbl, int sz)
307 for (i = 0; i < sz; i++) {
310 if (tbl[i].compat == NULL)
313 off = fdt_node_offset_by_compat_reg(blob,
314 tbl[i].compat, tbl[i].compat_offset);
316 off = fdt_setprop(blob, off, "fsl,liodn",
318 sizeof(u32) * tbl[i].num_ids);
320 printf("WARNING unable to set fsl,liodn for "
322 tbl[i].compat, fdt_strerror(off));
324 debug("WARNING: could not set fsl,liodn for %s: %s.\n",
325 tbl[i].compat, fdt_strerror(off));
330 #ifdef CONFIG_SYS_DPAA_FMAN
331 static void fdt_fixup_liodn_tbl_fman(void *blob,
332 struct fman_liodn_id_table *tbl,
337 for (i = 0; i < sz; i++) {
340 /* Try the new compatible first.
341 * If the node is missing, try the old.
343 off = fdt_node_offset_by_compat_reg(blob,
344 tbl[i].compat[0], tbl[i].compat_offset);
346 off = fdt_node_offset_by_compat_reg(blob,
347 tbl[i].compat[1], tbl[i].compat_offset);
350 off = fdt_setprop(blob, off, "fsl,liodn",
352 sizeof(u32) * tbl[i].num_ids);
354 printf("WARNING unable to set fsl,liodn for FMan Port: %s\n",
357 debug("WARNING: could not set fsl,liodn for FMan Portport: %s.\n",
364 void fdt_fixup_liodn(void *blob)
366 #ifdef CONFIG_SYS_SRIO
367 fdt_fixup_srio_liodn(blob, srio_liodn_tbl);
370 fdt_fixup_liodn_tbl(blob, liodn_tbl, liodn_tbl_sz);
371 #ifdef CONFIG_SYS_DPAA_FMAN
372 fdt_fixup_liodn_tbl_fman(blob, fman1_liodn_tbl, fman1_liodn_tbl_sz);
373 #if (CFG_SYS_NUM_FMAN == 2)
374 fdt_fixup_liodn_tbl_fman(blob, fman2_liodn_tbl, fman2_liodn_tbl_sz);
377 fdt_fixup_liodn_tbl(blob, sec_liodn_tbl, sec_liodn_tbl_sz);
379 #ifdef CONFIG_SYS_FSL_RAID_ENGINE
380 fdt_fixup_liodn_tbl(blob, raide_liodn_tbl, raide_liodn_tbl_sz);
383 #ifdef CONFIG_SYS_DPAA_RMAN
384 fdt_fixup_liodn_tbl(blob, rman_liodn_tbl, rman_liodn_tbl_sz);
387 ccsr_pcix_t *pcix = (ccsr_pcix_t *)CFG_SYS_PCIE1_ADDR;
388 int pci_ver = pcix->ipver1 & 0xffff, liodn_base = 0;
390 if (pci_ver >= 0x0204) {
391 if (pci_ver >= 0x0300)
400 sprintf(compat, "fsl,qoriq-pcie-v%d.%d",
401 (pci_ver & 0xff00) >> 8, pci_ver & 0xff);
402 fdt_fixup_pci_liodn_offsets(blob, compat, liodn_base);
403 fdt_fixup_pci_liodn_offsets(blob, "fsl,qoriq-pcie", liodn_base);