2 * Copyright 2007-2011 Freescale Semiconductor, Inc.
5 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
7 * SPDX-License-Identifier: GPL-2.0+
12 #include <fdt_support.h>
13 #include <asm/processor.h>
14 #include <linux/ctype.h>
16 #include <asm/fsl_fdt.h>
17 #include <asm/fsl_portals.h>
19 #ifdef CONFIG_FSL_ESDHC
20 #include <fsl_esdhc.h>
22 #include "../../../../drivers/qe/qe.h" /* For struct qe_firmware */
24 DECLARE_GLOBAL_DATA_PTR;
26 extern void ft_qe_setup(void *blob);
27 extern void ft_fixup_num_cores(void *blob);
28 extern void ft_srio_setup(void *blob);
33 void ft_fixup_cpu(void *blob, u64 memory_limit)
36 phys_addr_t spin_tbl_addr = get_spin_phys_addr();
37 u32 bootpg = determine_mp_bootpg(NULL);
39 const char *enable_method;
40 #if defined(T1040_TDM_QUIRK_CCSR_BASE)
42 int tdm_hwconfig_enabled = 0;
43 char buffer[HWCONFIG_BUFFER_SIZE] = {0};
46 off = fdt_node_offset_by_prop_value(blob, -1, "device_type", "cpu", 4);
47 while (off != -FDT_ERR_NOTFOUND) {
48 u32 *reg = (u32 *)fdt_getprop(blob, off, "reg", 0);
51 u32 phys_cpu_id = thread_to_core(*reg);
52 u64 val = phys_cpu_id * SIZE_BOOT_ENTRY + spin_tbl_addr;
53 val = cpu_to_fdt64(val);
55 fdt_setprop_string(blob, off, "status",
58 fdt_setprop_string(blob, off, "status",
62 if (hold_cores_in_reset(0)) {
63 #ifdef CONFIG_FSL_CORENET
64 /* Cores held in reset, use BRR to release */
65 enable_method = "fsl,brr-holdoff";
67 /* Cores held in reset, use EEBPCR to release */
68 enable_method = "fsl,eebpcr-holdoff";
71 /* Cores out of reset and in a spin-loop */
72 enable_method = "spin-table";
74 fdt_setprop(blob, off, "cpu-release-addr",
78 fdt_setprop_string(blob, off, "enable-method",
81 printf ("cpu NULL\n");
83 off = fdt_node_offset_by_prop_value(blob, off,
84 "device_type", "cpu", 4);
87 #if defined(T1040_TDM_QUIRK_CCSR_BASE)
88 #define CONFIG_MEM_HOLE_16M 0x1000000
90 * Extract hwconfig from environment.
91 * Search for tdm entry in hwconfig.
93 ret = getenv_f("hwconfig", buffer, sizeof(buffer));
95 tdm_hwconfig_enabled = hwconfig_f("tdm", buffer);
97 /* Reserve the memory hole created by TDM LAW, so OSes dont use it */
98 if (tdm_hwconfig_enabled) {
99 off = fdt_add_mem_rsv(blob, T1040_TDM_QUIRK_CCSR_BASE,
100 CONFIG_MEM_HOLE_16M);
102 printf("Failed to reserve memory for tdm: %s\n",
107 /* Reserve the boot page so OSes dont use it */
108 if ((u64)bootpg < memory_limit) {
109 off = fdt_add_mem_rsv(blob, bootpg, (u64)4096);
111 printf("Failed to reserve memory for bootpg: %s\n",
115 #ifndef CONFIG_MPC8xxx_DISABLE_BPTR
117 * Reserve the default boot page so OSes dont use it.
118 * The default boot page is always mapped to bootpg above using
119 * boot page translation.
121 if (0xfffff000ull < memory_limit) {
122 off = fdt_add_mem_rsv(blob, 0xfffff000ull, (u64)4096);
124 printf("Failed to reserve memory for 0xfffff000: %s\n",
130 /* Reserve spin table page */
131 if (spin_tbl_addr < memory_limit) {
132 off = fdt_add_mem_rsv(blob,
133 (spin_tbl_addr & ~0xffful), 4096);
135 printf("Failed to reserve memory for spin table: %s\n",
138 #ifdef CONFIG_DEEP_SLEEP
139 #ifdef CONFIG_SPL_MMC_BOOT
140 off = fdt_add_mem_rsv(blob, CONFIG_SYS_MMC_U_BOOT_START,
141 CONFIG_SYS_MMC_U_BOOT_SIZE);
143 printf("Failed to reserve memory for SD deep sleep: %s\n",
145 #elif defined(CONFIG_SPL_SPI_BOOT)
146 off = fdt_add_mem_rsv(blob, CONFIG_SYS_SPI_FLASH_U_BOOT_START,
147 CONFIG_SYS_SPI_FLASH_U_BOOT_SIZE);
149 printf("Failed to reserve memory for SPI deep sleep: %s\n",
156 #ifdef CONFIG_SYS_FSL_CPC
157 static inline void ft_fixup_l3cache(void *blob, int off)
159 u32 line_size, num_ways, size, num_sets;
160 cpc_corenet_t *cpc = (void *)CONFIG_SYS_FSL_CPC_ADDR;
161 u32 cfg0 = in_be32(&cpc->cpccfg0);
163 size = CPC_CFG0_SZ_K(cfg0) * 1024 * CONFIG_SYS_NUM_CPC;
164 num_ways = CPC_CFG0_NUM_WAYS(cfg0);
165 line_size = CPC_CFG0_LINE_SZ(cfg0);
166 num_sets = size / (line_size * num_ways);
168 fdt_setprop(blob, off, "cache-unified", NULL, 0);
169 fdt_setprop_cell(blob, off, "cache-block-size", line_size);
170 fdt_setprop_cell(blob, off, "cache-size", size);
171 fdt_setprop_cell(blob, off, "cache-sets", num_sets);
172 fdt_setprop_cell(blob, off, "cache-level", 3);
173 #ifdef CONFIG_SYS_CACHE_STASHING
174 fdt_setprop_cell(blob, off, "cache-stash-id", 1);
178 #define ft_fixup_l3cache(x, y)
181 #if defined(CONFIG_L2_CACHE)
182 /* return size in kilobytes */
183 static inline u32 l2cache_size(void)
185 volatile ccsr_l2cache_t *l2cache = (void *)CONFIG_SYS_MPC85xx_L2_ADDR;
186 volatile u32 l2siz_field = (l2cache->l2ctl >> 28) & 0x3;
187 u32 ver = SVR_SOC_VER(get_svr());
189 switch (l2siz_field) {
193 if (ver == SVR_8540 || ver == SVR_8560 ||
194 ver == SVR_8541 || ver == SVR_8555)
200 if (ver == SVR_8540 || ver == SVR_8560 ||
201 ver == SVR_8541 || ver == SVR_8555)
214 static inline void ft_fixup_l2cache(void *blob)
218 struct cpu_type *cpu = identify_cpu(SVR_SOC_VER(get_svr()));
220 const u32 line_size = 32;
221 const u32 num_ways = 8;
222 const u32 size = l2cache_size() * 1024;
223 const u32 num_sets = size / (line_size * num_ways);
225 off = fdt_node_offset_by_prop_value(blob, -1, "device_type", "cpu", 4);
227 debug("no cpu node fount\n");
231 ph = (u32 *)fdt_getprop(blob, off, "next-level-cache", 0);
234 debug("no next-level-cache property\n");
238 off = fdt_node_offset_by_phandle(blob, *ph);
240 printf("%s: %s\n", __func__, fdt_strerror(off));
247 if (isdigit(cpu->name[0])) {
248 /* MPCxxxx, where xxxx == 4-digit number */
249 len = sprintf(buf, "fsl,mpc%s-l2-cache-controller",
252 /* Pxxxx or Txxxx, where xxxx == 4-digit number */
253 len = sprintf(buf, "fsl,%c%s-l2-cache-controller",
254 tolower(cpu->name[0]), cpu->name + 1) + 1;
258 * append "cache" after the NULL character that the previous
259 * sprintf wrote. This is how a device tree stores multiple
260 * strings in a property.
262 len += sprintf(buf + len, "cache") + 1;
264 fdt_setprop(blob, off, "compatible", buf, len);
266 fdt_setprop(blob, off, "cache-unified", NULL, 0);
267 fdt_setprop_cell(blob, off, "cache-block-size", line_size);
268 fdt_setprop_cell(blob, off, "cache-size", size);
269 fdt_setprop_cell(blob, off, "cache-sets", num_sets);
270 fdt_setprop_cell(blob, off, "cache-level", 2);
272 /* we dont bother w/L3 since no platform of this type has one */
274 #elif defined(CONFIG_BACKSIDE_L2_CACHE) || \
275 defined(CONFIG_SYS_FSL_QORIQ_CHASSIS2)
276 static inline void ft_fixup_l2cache(void *blob)
278 int off, l2_off, l3_off = -1;
280 #ifdef CONFIG_BACKSIDE_L2_CACHE
281 u32 l2cfg0 = mfspr(SPRN_L2CFG0);
283 struct ccsr_cluster_l2 *l2cache =
284 (struct ccsr_cluster_l2 __iomem *)(CONFIG_SYS_FSL_CLUSTER_1_L2);
285 u32 l2cfg0 = in_be32(&l2cache->l2cfg0);
287 u32 size, line_size, num_ways, num_sets;
290 /* P2040/P2040E has no L2, so dont set any L2 props */
291 if (SVR_SOC_VER(get_svr()) == SVR_P2040)
294 size = (l2cfg0 & 0x3fff) * 64 * 1024;
295 num_ways = ((l2cfg0 >> 14) & 0x1f) + 1;
296 line_size = (((l2cfg0 >> 23) & 0x3) + 1) * 32;
297 num_sets = size / (line_size * num_ways);
299 off = fdt_node_offset_by_prop_value(blob, -1, "device_type", "cpu", 4);
301 while (off != -FDT_ERR_NOTFOUND) {
302 ph = (u32 *)fdt_getprop(blob, off, "next-level-cache", 0);
305 debug("no next-level-cache property\n");
309 l2_off = fdt_node_offset_by_phandle(blob, *ph);
311 printf("%s: %s\n", __func__, fdt_strerror(off));
316 #ifdef CONFIG_SYS_CACHE_STASHING
317 u32 *reg = (u32 *)fdt_getprop(blob, off, "reg", 0);
318 #if defined(CONFIG_SYS_FSL_QORIQ_CHASSIS2) && defined(CONFIG_E6500)
319 /* Only initialize every eighth thread */
320 if (reg && !((*reg) % 8)) {
321 fdt_setprop_cell(blob, l2_off, "cache-stash-id",
322 (*reg / 4) + 32 + 1);
326 fdt_setprop_cell(blob, l2_off, "cache-stash-id",
327 (*reg * 2) + 32 + 1);
332 fdt_setprop(blob, l2_off, "cache-unified", NULL, 0);
333 fdt_setprop_cell(blob, l2_off, "cache-block-size",
335 fdt_setprop_cell(blob, l2_off, "cache-size", size);
336 fdt_setprop_cell(blob, l2_off, "cache-sets", num_sets);
337 fdt_setprop_cell(blob, l2_off, "cache-level", 2);
338 fdt_setprop(blob, l2_off, "compatible", "cache", 6);
342 ph = (u32 *)fdt_getprop(blob, l2_off, "next-level-cache", 0);
345 debug("no next-level-cache property\n");
351 off = fdt_node_offset_by_prop_value(blob, off,
352 "device_type", "cpu", 4);
355 l3_off = fdt_node_offset_by_phandle(blob, l3_off);
357 printf("%s: %s\n", __func__, fdt_strerror(off));
360 ft_fixup_l3cache(blob, l3_off);
364 #define ft_fixup_l2cache(x)
367 static inline void ft_fixup_cache(void *blob)
371 off = fdt_node_offset_by_prop_value(blob, -1, "device_type", "cpu", 4);
373 while (off != -FDT_ERR_NOTFOUND) {
374 u32 l1cfg0 = mfspr(SPRN_L1CFG0);
375 u32 l1cfg1 = mfspr(SPRN_L1CFG1);
376 u32 isize, iline_size, inum_sets, inum_ways;
377 u32 dsize, dline_size, dnum_sets, dnum_ways;
380 dsize = (l1cfg0 & 0x7ff) * 1024;
381 dnum_ways = ((l1cfg0 >> 11) & 0xff) + 1;
382 dline_size = (((l1cfg0 >> 23) & 0x3) + 1) * 32;
383 dnum_sets = dsize / (dline_size * dnum_ways);
385 fdt_setprop_cell(blob, off, "d-cache-block-size", dline_size);
386 fdt_setprop_cell(blob, off, "d-cache-size", dsize);
387 fdt_setprop_cell(blob, off, "d-cache-sets", dnum_sets);
389 #ifdef CONFIG_SYS_CACHE_STASHING
391 u32 *reg = (u32 *)fdt_getprop(blob, off, "reg", 0);
393 fdt_setprop_cell(blob, off, "cache-stash-id",
394 (*reg * 2) + 32 + 0);
399 isize = (l1cfg1 & 0x7ff) * 1024;
400 inum_ways = ((l1cfg1 >> 11) & 0xff) + 1;
401 iline_size = (((l1cfg1 >> 23) & 0x3) + 1) * 32;
402 inum_sets = isize / (iline_size * inum_ways);
404 fdt_setprop_cell(blob, off, "i-cache-block-size", iline_size);
405 fdt_setprop_cell(blob, off, "i-cache-size", isize);
406 fdt_setprop_cell(blob, off, "i-cache-sets", inum_sets);
408 off = fdt_node_offset_by_prop_value(blob, off,
409 "device_type", "cpu", 4);
412 ft_fixup_l2cache(blob);
416 void fdt_add_enet_stashing(void *fdt)
418 do_fixup_by_compat(fdt, "gianfar", "bd-stash", NULL, 0, 1);
420 do_fixup_by_compat_u32(fdt, "gianfar", "rx-stash-len", 96, 1);
422 do_fixup_by_compat_u32(fdt, "gianfar", "rx-stash-idx", 0, 1);
423 do_fixup_by_compat(fdt, "fsl,etsec2", "bd-stash", NULL, 0, 1);
424 do_fixup_by_compat_u32(fdt, "fsl,etsec2", "rx-stash-len", 96, 1);
425 do_fixup_by_compat_u32(fdt, "fsl,etsec2", "rx-stash-idx", 0, 1);
428 #if defined(CONFIG_SYS_DPAA_FMAN) || defined(CONFIG_SYS_DPAA_PME)
429 #ifdef CONFIG_SYS_DPAA_FMAN
430 static void ft_fixup_clks(void *blob, const char *compat, u32 offset,
433 phys_addr_t phys = offset + CONFIG_SYS_CCSRBAR_PHYS;
434 int off = fdt_node_offset_by_compat_reg(blob, compat, phys);
437 off = fdt_setprop_cell(blob, off, "clock-frequency", freq);
439 printf("WARNING enable to set clock-frequency "
440 "for %s: %s\n", compat, fdt_strerror(off));
445 static void ft_fixup_dpaa_clks(void *blob)
449 get_sys_info(&sysinfo);
450 #ifdef CONFIG_SYS_DPAA_FMAN
451 ft_fixup_clks(blob, "fsl,fman", CONFIG_SYS_FSL_FM1_OFFSET,
452 sysinfo.freq_fman[0]);
454 #if (CONFIG_SYS_NUM_FMAN == 2)
455 ft_fixup_clks(blob, "fsl,fman", CONFIG_SYS_FSL_FM2_OFFSET,
456 sysinfo.freq_fman[1]);
460 #ifdef CONFIG_SYS_DPAA_QBMAN
461 do_fixup_by_compat_u32(blob, "fsl,qman",
462 "clock-frequency", sysinfo.freq_qman, 1);
465 #ifdef CONFIG_SYS_DPAA_PME
466 do_fixup_by_compat_u32(blob, "fsl,pme",
467 "clock-frequency", sysinfo.freq_pme, 1);
471 #define ft_fixup_dpaa_clks(x)
475 static void ft_fixup_qe_snum(void *blob)
479 svr = mfspr(SPRN_SVR);
480 if (SVR_SOC_VER(svr) == SVR_8569) {
481 if(IS_SVR_REV(svr, 1, 0))
482 do_fixup_by_compat_u32(blob, "fsl,qe",
483 "fsl,qe-num-snums", 46, 1);
485 do_fixup_by_compat_u32(blob, "fsl,qe",
486 "fsl,qe-num-snums", 76, 1);
492 * fdt_fixup_fman_firmware -- insert the Fman firmware into the device tree
494 * The binding for an Fman firmware node is documented in
495 * Documentation/powerpc/dts-bindings/fsl/dpaa/fman.txt. This node contains
496 * the actual Fman firmware binary data. The operating system is expected to
497 * be able to parse the binary data to determine any attributes it needs.
499 #ifdef CONFIG_SYS_DPAA_FMAN
500 void fdt_fixup_fman_firmware(void *blob)
502 int rc, fmnode, fwnode = -1;
504 struct qe_firmware *fmanfw;
505 const struct qe_header *hdr;
510 /* The first Fman we find will contain the actual firmware. */
511 fmnode = fdt_node_offset_by_compatible(blob, -1, "fsl,fman");
513 /* Exit silently if there are no Fman devices */
516 /* If we already have a firmware node, then also exit silently. */
517 if (fdt_node_offset_by_compatible(blob, -1, "fsl,fman-firmware") > 0)
520 /* If the environment variable is not set, then exit silently */
521 p = getenv("fman_ucode");
525 fmanfw = (struct qe_firmware *) simple_strtoul(p, NULL, 16);
529 hdr = &fmanfw->header;
530 length = be32_to_cpu(hdr->length);
532 /* Verify the firmware. */
533 if ((hdr->magic[0] != 'Q') || (hdr->magic[1] != 'E') ||
534 (hdr->magic[2] != 'F')) {
535 printf("Data at %p is not an Fman firmware\n", fmanfw);
539 if (length > CONFIG_SYS_QE_FMAN_FW_LENGTH) {
540 printf("Fman firmware at %p is too large (size=%u)\n",
545 length -= sizeof(u32); /* Subtract the size of the CRC */
546 crc = be32_to_cpu(*(u32 *)((void *)fmanfw + length));
547 if (crc != crc32_no_comp(0, (void *)fmanfw, length)) {
548 printf("Fman firmware at %p has invalid CRC\n", fmanfw);
552 /* Increase the size of the fdt to make room for the node. */
553 rc = fdt_increase_size(blob, fmanfw->header.length);
555 printf("Unable to make room for Fman firmware: %s\n",
560 /* Create the firmware node. */
561 fwnode = fdt_add_subnode(blob, fmnode, "fman-firmware");
564 fdt_get_path(blob, fmnode, s, sizeof(s));
565 printf("Could not add firmware node to %s: %s\n", s,
566 fdt_strerror(fwnode));
569 rc = fdt_setprop_string(blob, fwnode, "compatible", "fsl,fman-firmware");
572 fdt_get_path(blob, fwnode, s, sizeof(s));
573 printf("Could not add compatible property to node %s: %s\n", s,
577 phandle = fdt_create_phandle(blob, fwnode);
580 fdt_get_path(blob, fwnode, s, sizeof(s));
581 printf("Could not add phandle property to node %s: %s\n", s,
585 rc = fdt_setprop(blob, fwnode, "fsl,firmware", fmanfw, fmanfw->header.length);
588 fdt_get_path(blob, fwnode, s, sizeof(s));
589 printf("Could not add firmware property to node %s: %s\n", s,
594 /* Find all other Fman nodes and point them to the firmware node. */
595 while ((fmnode = fdt_node_offset_by_compatible(blob, fmnode, "fsl,fman")) > 0) {
596 rc = fdt_setprop_cell(blob, fmnode, "fsl,firmware-phandle", phandle);
599 fdt_get_path(blob, fmnode, s, sizeof(s));
600 printf("Could not add pointer property to node %s: %s\n",
601 s, fdt_strerror(rc));
607 #define fdt_fixup_fman_firmware(x)
610 #if defined(CONFIG_PPC_P4080)
611 static void fdt_fixup_usb(void *fdt)
613 ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
614 u32 rcwsr11 = in_be32(&gur->rcwsr[11]);
617 off = fdt_node_offset_by_compatible(fdt, -1, "fsl,mpc85xx-usb2-mph");
618 if ((rcwsr11 & FSL_CORENET_RCWSR11_EC1) !=
619 FSL_CORENET_RCWSR11_EC1_FM1_USB1)
620 fdt_status_disabled(fdt, off);
622 off = fdt_node_offset_by_compatible(fdt, -1, "fsl,mpc85xx-usb2-dr");
623 if ((rcwsr11 & FSL_CORENET_RCWSR11_EC2) !=
624 FSL_CORENET_RCWSR11_EC2_USB2)
625 fdt_status_disabled(fdt, off);
628 #define fdt_fixup_usb(x)
631 #if defined(CONFIG_PPC_T2080) || defined(CONFIG_PPC_T4240) || \
632 defined(CONFIG_PPC_T4160) || defined(CONFIG_PPC_T4080)
633 void fdt_fixup_dma3(void *blob)
635 /* the 3rd DMA is not functional if SRIO2 is chosen */
637 ccsr_gur_t __iomem *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
639 #define CONFIG_SYS_ELO3_DMA3 (0xffe000000 + 0x102300)
640 #if defined(CONFIG_PPC_T2080)
641 u32 srds_prtcl_s2 = in_be32(&gur->rcwsr[4]) &
642 FSL_CORENET2_RCWSR4_SRDS2_PRTCL;
643 srds_prtcl_s2 >>= FSL_CORENET2_RCWSR4_SRDS2_PRTCL_SHIFT;
645 switch (srds_prtcl_s2) {
649 #elif defined(CONFIG_PPC_T4240) || defined(CONFIG_PPC_T4160) || \
650 defined(CONFIG_PPC_T4080)
651 u32 srds_prtcl_s4 = in_be32(&gur->rcwsr[4]) &
652 FSL_CORENET2_RCWSR4_SRDS4_PRTCL;
653 srds_prtcl_s4 >>= FSL_CORENET2_RCWSR4_SRDS4_PRTCL_SHIFT;
655 switch (srds_prtcl_s4) {
661 nodeoff = fdt_node_offset_by_compat_reg(blob, "fsl,elo3-dma",
662 CONFIG_SYS_ELO3_DMA3);
664 fdt_status_disabled(blob, nodeoff);
666 printf("WARNING: unable to disable dma3\n");
673 #define fdt_fixup_dma3(x)
676 #if defined(CONFIG_PPC_T1040)
677 static void fdt_fixup_l2_switch(void *blob)
682 /* The l2switch node from device-tree has
683 * compatible string "vitesse-9953" */
684 node = fdt_node_offset_by_compatible(blob, -1, "vitesse-9953");
685 if (node == -FDT_ERR_NOTFOUND)
686 /* no l2switch node has been found */
689 /* Get MAC address for the l2switch from "l2switchaddr"*/
690 if (!eth_getenv_enetaddr("l2switchaddr", l2swaddr)) {
691 printf("Warning: MAC address for l2switch not found\n");
692 memset(l2swaddr, 0, sizeof(l2swaddr));
695 /* Add MAC address to l2switch node */
696 fdt_setprop(blob, node, "local-mac-address", l2swaddr,
700 #define fdt_fixup_l2_switch(x)
703 void ft_cpu_setup(void *blob, bd_t *bd)
710 /* delete crypto node if not on an E-processor */
711 if (!IS_E_PROCESSOR(get_svr()))
712 fdt_fixup_crypto_node(blob, 0);
713 #if CONFIG_SYS_FSL_SEC_COMPAT >= 4
715 ccsr_sec_t __iomem *sec;
717 sec = (void __iomem *)CONFIG_SYS_FSL_SEC_ADDR;
718 fdt_fixup_crypto_node(blob, sec_in32(&sec->secvid_ms));
722 fdt_fixup_ethernet(blob);
724 fdt_add_enet_stashing(blob);
726 #ifndef CONFIG_FSL_TBCLK_EXTRA_DIV
727 #define CONFIG_FSL_TBCLK_EXTRA_DIV 1
729 do_fixup_by_prop_u32(blob, "device_type", "cpu", 4,
730 "timebase-frequency", get_tbclk() / CONFIG_FSL_TBCLK_EXTRA_DIV,
732 do_fixup_by_prop_u32(blob, "device_type", "cpu", 4,
733 "bus-frequency", bd->bi_busfreq, 1);
734 get_sys_info(&sysinfo);
735 off = fdt_node_offset_by_prop_value(blob, -1, "device_type", "cpu", 4);
736 while (off != -FDT_ERR_NOTFOUND) {
737 u32 *reg = (u32 *)fdt_getprop(blob, off, "reg", &len);
738 val = cpu_to_fdt32(sysinfo.freq_processor[(*reg) / (len / 4)]);
739 fdt_setprop(blob, off, "clock-frequency", &val, 4);
740 off = fdt_node_offset_by_prop_value(blob, off, "device_type",
743 do_fixup_by_prop_u32(blob, "device_type", "soc", 4,
744 "bus-frequency", bd->bi_busfreq, 1);
746 do_fixup_by_compat_u32(blob, "fsl,pq3-localbus",
747 "bus-frequency", gd->arch.lbc_clk, 1);
748 do_fixup_by_compat_u32(blob, "fsl,elbc",
749 "bus-frequency", gd->arch.lbc_clk, 1);
752 ft_fixup_qe_snum(blob);
755 fdt_fixup_fman_firmware(blob);
757 #ifdef CONFIG_SYS_NS16550
758 do_fixup_by_compat_u32(blob, "ns16550",
759 "clock-frequency", CONFIG_SYS_NS16550_CLK, 1);
763 do_fixup_by_compat_u32(blob, "fsl,cpm2-scc-uart",
764 "current-speed", gd->baudrate, 1);
766 do_fixup_by_compat_u32(blob, "fsl,cpm2-brg",
767 "clock-frequency", bd->bi_brgfreq, 1);
770 #ifdef CONFIG_FSL_CORENET
771 do_fixup_by_compat_u32(blob, "fsl,qoriq-clockgen-1.0",
772 "clock-frequency", CONFIG_SYS_CLK_FREQ, 1);
773 do_fixup_by_compat_u32(blob, "fsl,qoriq-clockgen-2.0",
774 "clock-frequency", CONFIG_SYS_CLK_FREQ, 1);
775 do_fixup_by_compat_u32(blob, "fsl,mpic",
776 "clock-frequency", get_bus_freq(0)/2, 1);
778 do_fixup_by_compat_u32(blob, "fsl,mpic",
779 "clock-frequency", get_bus_freq(0), 1);
782 fdt_fixup_memory(blob, (u64)bd->bi_memstart, (u64)bd->bi_memsize);
785 ft_fixup_cpu(blob, (u64)bd->bi_memstart + (u64)bd->bi_memsize);
786 ft_fixup_num_cores(blob);
789 ft_fixup_cache(blob);
791 #if defined(CONFIG_FSL_ESDHC)
792 fdt_fixup_esdhc(blob, bd);
795 ft_fixup_dpaa_clks(blob);
797 #if defined(CONFIG_SYS_BMAN_MEM_PHYS)
798 fdt_portal(blob, "fsl,bman-portal", "bman-portals",
799 (u64)CONFIG_SYS_BMAN_MEM_PHYS,
800 CONFIG_SYS_BMAN_MEM_SIZE);
801 fdt_fixup_bportals(blob);
804 #if defined(CONFIG_SYS_QMAN_MEM_PHYS)
805 fdt_portal(blob, "fsl,qman-portal", "qman-portals",
806 (u64)CONFIG_SYS_QMAN_MEM_PHYS,
807 CONFIG_SYS_QMAN_MEM_SIZE);
809 fdt_fixup_qportals(blob);
812 #ifdef CONFIG_SYS_SRIO
817 * system-clock = CCB clock/2
818 * Here gd->bus_clk = CCB clock
819 * We are using the system clock as 1588 Timer reference
820 * clock source select
822 do_fixup_by_compat_u32(blob, "fsl,gianfar-ptp-timer",
823 "timer-frequency", gd->bus_clk/2, 1);
826 * clock-freq should change to clock-frequency and
827 * flexcan-v1.0 should change to p1010-flexcan respectively
830 do_fixup_by_compat_u32(blob, "fsl,flexcan-v1.0",
831 "clock_freq", gd->bus_clk/2, 1);
833 do_fixup_by_compat_u32(blob, "fsl,flexcan-v1.0",
834 "clock-frequency", gd->bus_clk/2, 1);
836 do_fixup_by_compat_u32(blob, "fsl,p1010-flexcan",
837 "clock-frequency", gd->bus_clk/2, 1);
841 fdt_fixup_l2_switch(blob);
843 fdt_fixup_dma3(blob);
847 * For some CCSR devices, we only have the virtual address, not the physical
848 * address. This is because we map CCSR as a whole, so we typically don't need
849 * a macro for the physical address of any device within CCSR. In this case,
850 * we calculate the physical address of that device using it's the difference
851 * between the virtual address of the device and the virtual address of the
854 #define CCSR_VIRT_TO_PHYS(x) \
855 (CONFIG_SYS_CCSRBAR_PHYS + ((x) - CONFIG_SYS_CCSRBAR))
857 static void msg(const char *name, uint64_t uaddr, uint64_t daddr)
859 printf("Warning: U-Boot configured %s at address %llx,\n"
860 "but the device tree has it at %llx\n", name, uaddr, daddr);
864 * Verify the device tree
866 * This function compares several CONFIG_xxx macros that contain physical
867 * addresses with the corresponding nodes in the device tree, to see if
868 * the physical addresses are all correct. For example, if
869 * CONFIG_SYS_NS16550_COM1 is defined, then it contains the virtual address
870 * of the first UART. We convert this to a physical address and compare
871 * that with the physical address of the first ns16550-compatible node
872 * in the device tree. If they don't match, then we display a warning.
874 * Returns 1 on success, 0 on failure
876 int ft_verify_fdt(void *fdt)
882 /* First check the CCSR base address */
883 off = fdt_node_offset_by_prop_value(fdt, -1, "device_type", "soc", 4);
885 addr = fdt_get_base_address(fdt, off);
888 printf("Warning: could not determine base CCSR address in "
890 /* No point in checking anything else */
894 if (addr != CONFIG_SYS_CCSRBAR_PHYS) {
895 msg("CCSR", CONFIG_SYS_CCSRBAR_PHYS, addr);
896 /* No point in checking anything else */
901 * Check some nodes via aliases. We assume that U-Boot and the device
902 * tree enumerate the devices equally. E.g. the first serial port in
903 * U-Boot is the same as "serial0" in the device tree.
905 aliases = fdt_path_offset(fdt, "/aliases");
907 #ifdef CONFIG_SYS_NS16550_COM1
908 if (!fdt_verify_alias_address(fdt, aliases, "serial0",
909 CCSR_VIRT_TO_PHYS(CONFIG_SYS_NS16550_COM1)))
913 #ifdef CONFIG_SYS_NS16550_COM2
914 if (!fdt_verify_alias_address(fdt, aliases, "serial1",
915 CCSR_VIRT_TO_PHYS(CONFIG_SYS_NS16550_COM2)))
921 * The localbus node is typically a root node, even though the lbc
922 * controller is part of CCSR. If we were to put the lbc node under
923 * the SOC node, then the 'ranges' property in the lbc node would
924 * translate through the 'ranges' property of the parent SOC node, and
925 * we don't want that. Since it's a separate node, it's possible for
926 * the 'reg' property to be wrong, so check it here. For now, we
927 * only check for "fsl,elbc" nodes.
929 #ifdef CONFIG_SYS_LBC_ADDR
930 off = fdt_node_offset_by_compatible(fdt, -1, "fsl,elbc");
932 const fdt32_t *reg = fdt_getprop(fdt, off, "reg", NULL);
934 uint64_t uaddr = CCSR_VIRT_TO_PHYS(CONFIG_SYS_LBC_ADDR);
936 addr = fdt_translate_address(fdt, off, reg);
938 msg("the localbus", uaddr, addr);
948 void fdt_del_diu(void *blob)
952 while ((nodeoff = fdt_node_offset_by_compatible(blob, 0,
954 fdt_del_node(blob, nodeoff);