2 * Copyright 2007-2011 Freescale Semiconductor, Inc.
5 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
7 * See file CREDITS for list of people who contributed to this
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License as
12 * published by the Free Software Foundation; either version 2 of
13 * the License, or (at your option) any later version.
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
28 #include <fdt_support.h>
29 #include <asm/processor.h>
30 #include <linux/ctype.h>
32 #include <asm/fsl_portals.h>
33 #ifdef CONFIG_FSL_ESDHC
34 #include <fsl_esdhc.h>
36 #include "../../../../drivers/qe/qe.h" /* For struct qe_firmware */
38 DECLARE_GLOBAL_DATA_PTR;
40 extern void ft_qe_setup(void *blob);
41 extern void ft_fixup_num_cores(void *blob);
42 extern void ft_srio_setup(void *blob);
47 void ft_fixup_cpu(void *blob, u64 memory_limit)
50 ulong spin_tbl_addr = get_spin_phys_addr();
51 u32 bootpg = determine_mp_bootpg();
53 const char *enable_method;
55 off = fdt_node_offset_by_prop_value(blob, -1, "device_type", "cpu", 4);
56 while (off != -FDT_ERR_NOTFOUND) {
57 u32 *reg = (u32 *)fdt_getprop(blob, off, "reg", 0);
60 u64 val = *reg * SIZE_BOOT_ENTRY + spin_tbl_addr;
61 val = cpu_to_fdt32(val);
63 fdt_setprop_string(blob, off, "status",
66 fdt_setprop_string(blob, off, "status",
70 if (hold_cores_in_reset(0)) {
71 #ifdef CONFIG_FSL_CORENET
72 /* Cores held in reset, use BRR to release */
73 enable_method = "fsl,brr-holdoff";
75 /* Cores held in reset, use EEBPCR to release */
76 enable_method = "fsl,eebpcr-holdoff";
79 /* Cores out of reset and in a spin-loop */
80 enable_method = "spin-table";
82 fdt_setprop(blob, off, "cpu-release-addr",
86 fdt_setprop_string(blob, off, "enable-method",
89 printf ("cpu NULL\n");
91 off = fdt_node_offset_by_prop_value(blob, off,
92 "device_type", "cpu", 4);
95 /* Reserve the boot page so OSes dont use it */
96 if ((u64)bootpg < memory_limit) {
97 off = fdt_add_mem_rsv(blob, bootpg, (u64)4096);
99 printf("%s: %s\n", __FUNCTION__, fdt_strerror(off));
104 #ifdef CONFIG_SYS_FSL_CPC
105 static inline void ft_fixup_l3cache(void *blob, int off)
107 u32 line_size, num_ways, size, num_sets;
108 cpc_corenet_t *cpc = (void *)CONFIG_SYS_FSL_CPC_ADDR;
109 u32 cfg0 = in_be32(&cpc->cpccfg0);
111 size = CPC_CFG0_SZ_K(cfg0) * 1024 * CONFIG_SYS_NUM_CPC;
112 num_ways = CPC_CFG0_NUM_WAYS(cfg0);
113 line_size = CPC_CFG0_LINE_SZ(cfg0);
114 num_sets = size / (line_size * num_ways);
116 fdt_setprop(blob, off, "cache-unified", NULL, 0);
117 fdt_setprop_cell(blob, off, "cache-block-size", line_size);
118 fdt_setprop_cell(blob, off, "cache-size", size);
119 fdt_setprop_cell(blob, off, "cache-sets", num_sets);
120 fdt_setprop_cell(blob, off, "cache-level", 3);
121 #ifdef CONFIG_SYS_CACHE_STASHING
122 fdt_setprop_cell(blob, off, "cache-stash-id", 1);
126 #define ft_fixup_l3cache(x, y)
129 #if defined(CONFIG_L2_CACHE)
130 /* return size in kilobytes */
131 static inline u32 l2cache_size(void)
133 volatile ccsr_l2cache_t *l2cache = (void *)CONFIG_SYS_MPC85xx_L2_ADDR;
134 volatile u32 l2siz_field = (l2cache->l2ctl >> 28) & 0x3;
135 u32 ver = SVR_SOC_VER(get_svr());
137 switch (l2siz_field) {
141 if (ver == SVR_8540 || ver == SVR_8560 ||
142 ver == SVR_8541 || ver == SVR_8541_E ||
143 ver == SVR_8555 || ver == SVR_8555_E)
149 if (ver == SVR_8540 || ver == SVR_8560 ||
150 ver == SVR_8541 || ver == SVR_8541_E ||
151 ver == SVR_8555 || ver == SVR_8555_E)
164 static inline void ft_fixup_l2cache(void *blob)
168 struct cpu_type *cpu = identify_cpu(SVR_SOC_VER(get_svr()));
170 const u32 line_size = 32;
171 const u32 num_ways = 8;
172 const u32 size = l2cache_size() * 1024;
173 const u32 num_sets = size / (line_size * num_ways);
175 off = fdt_node_offset_by_prop_value(blob, -1, "device_type", "cpu", 4);
177 debug("no cpu node fount\n");
181 ph = (u32 *)fdt_getprop(blob, off, "next-level-cache", 0);
184 debug("no next-level-cache property\n");
188 off = fdt_node_offset_by_phandle(blob, *ph);
190 printf("%s: %s\n", __func__, fdt_strerror(off));
197 if (isdigit(cpu->name[0])) {
198 /* MPCxxxx, where xxxx == 4-digit number */
199 len = sprintf(buf, "fsl,mpc%s-l2-cache-controller",
202 /* Pxxxx or Txxxx, where xxxx == 4-digit number */
203 len = sprintf(buf, "fsl,%c%s-l2-cache-controller",
204 tolower(cpu->name[0]), cpu->name + 1) + 1;
208 * append "cache" after the NULL character that the previous
209 * sprintf wrote. This is how a device tree stores multiple
210 * strings in a property.
212 len += sprintf(buf + len, "cache") + 1;
214 fdt_setprop(blob, off, "compatible", buf, len);
216 fdt_setprop(blob, off, "cache-unified", NULL, 0);
217 fdt_setprop_cell(blob, off, "cache-block-size", line_size);
218 fdt_setprop_cell(blob, off, "cache-size", size);
219 fdt_setprop_cell(blob, off, "cache-sets", num_sets);
220 fdt_setprop_cell(blob, off, "cache-level", 2);
222 /* we dont bother w/L3 since no platform of this type has one */
224 #elif defined(CONFIG_BACKSIDE_L2_CACHE)
225 static inline void ft_fixup_l2cache(void *blob)
227 int off, l2_off, l3_off = -1;
229 u32 l2cfg0 = mfspr(SPRN_L2CFG0);
230 u32 size, line_size, num_ways, num_sets;
233 /* P2040/P2040E has no L2, so dont set any L2 props */
234 if ((SVR_SOC_VER(get_svr()) == SVR_P2040) ||
235 (SVR_SOC_VER(get_svr()) == SVR_P2040_E))
238 size = (l2cfg0 & 0x3fff) * 64 * 1024;
239 num_ways = ((l2cfg0 >> 14) & 0x1f) + 1;
240 line_size = (((l2cfg0 >> 23) & 0x3) + 1) * 32;
241 num_sets = size / (line_size * num_ways);
243 off = fdt_node_offset_by_prop_value(blob, -1, "device_type", "cpu", 4);
245 while (off != -FDT_ERR_NOTFOUND) {
246 ph = (u32 *)fdt_getprop(blob, off, "next-level-cache", 0);
249 debug("no next-level-cache property\n");
253 l2_off = fdt_node_offset_by_phandle(blob, *ph);
255 printf("%s: %s\n", __func__, fdt_strerror(off));
260 #ifdef CONFIG_SYS_CACHE_STASHING
261 u32 *reg = (u32 *)fdt_getprop(blob, off, "reg", 0);
263 fdt_setprop_cell(blob, l2_off, "cache-stash-id",
264 (*reg * 2) + 32 + 1);
267 fdt_setprop(blob, l2_off, "cache-unified", NULL, 0);
268 fdt_setprop_cell(blob, l2_off, "cache-block-size",
270 fdt_setprop_cell(blob, l2_off, "cache-size", size);
271 fdt_setprop_cell(blob, l2_off, "cache-sets", num_sets);
272 fdt_setprop_cell(blob, l2_off, "cache-level", 2);
273 fdt_setprop(blob, l2_off, "compatible", "cache", 6);
277 ph = (u32 *)fdt_getprop(blob, l2_off, "next-level-cache", 0);
280 debug("no next-level-cache property\n");
286 off = fdt_node_offset_by_prop_value(blob, off,
287 "device_type", "cpu", 4);
290 l3_off = fdt_node_offset_by_phandle(blob, l3_off);
292 printf("%s: %s\n", __func__, fdt_strerror(off));
295 ft_fixup_l3cache(blob, l3_off);
299 #define ft_fixup_l2cache(x)
302 static inline void ft_fixup_cache(void *blob)
306 off = fdt_node_offset_by_prop_value(blob, -1, "device_type", "cpu", 4);
308 while (off != -FDT_ERR_NOTFOUND) {
309 u32 l1cfg0 = mfspr(SPRN_L1CFG0);
310 u32 l1cfg1 = mfspr(SPRN_L1CFG1);
311 u32 isize, iline_size, inum_sets, inum_ways;
312 u32 dsize, dline_size, dnum_sets, dnum_ways;
315 dsize = (l1cfg0 & 0x7ff) * 1024;
316 dnum_ways = ((l1cfg0 >> 11) & 0xff) + 1;
317 dline_size = (((l1cfg0 >> 23) & 0x3) + 1) * 32;
318 dnum_sets = dsize / (dline_size * dnum_ways);
320 fdt_setprop_cell(blob, off, "d-cache-block-size", dline_size);
321 fdt_setprop_cell(blob, off, "d-cache-size", dsize);
322 fdt_setprop_cell(blob, off, "d-cache-sets", dnum_sets);
324 #ifdef CONFIG_SYS_CACHE_STASHING
326 u32 *reg = (u32 *)fdt_getprop(blob, off, "reg", 0);
328 fdt_setprop_cell(blob, off, "cache-stash-id",
329 (*reg * 2) + 32 + 0);
334 isize = (l1cfg1 & 0x7ff) * 1024;
335 inum_ways = ((l1cfg1 >> 11) & 0xff) + 1;
336 iline_size = (((l1cfg1 >> 23) & 0x3) + 1) * 32;
337 inum_sets = isize / (iline_size * inum_ways);
339 fdt_setprop_cell(blob, off, "i-cache-block-size", iline_size);
340 fdt_setprop_cell(blob, off, "i-cache-size", isize);
341 fdt_setprop_cell(blob, off, "i-cache-sets", inum_sets);
343 off = fdt_node_offset_by_prop_value(blob, off,
344 "device_type", "cpu", 4);
347 ft_fixup_l2cache(blob);
351 void fdt_add_enet_stashing(void *fdt)
353 do_fixup_by_compat(fdt, "gianfar", "bd-stash", NULL, 0, 1);
355 do_fixup_by_compat_u32(fdt, "gianfar", "rx-stash-len", 96, 1);
357 do_fixup_by_compat_u32(fdt, "gianfar", "rx-stash-idx", 0, 1);
358 do_fixup_by_compat(fdt, "fsl,etsec2", "bd-stash", NULL, 0, 1);
359 do_fixup_by_compat_u32(fdt, "fsl,etsec2", "rx-stash-len", 96, 1);
360 do_fixup_by_compat_u32(fdt, "fsl,etsec2", "rx-stash-idx", 0, 1);
363 #if defined(CONFIG_SYS_DPAA_FMAN) || defined(CONFIG_SYS_DPAA_PME)
364 #ifdef CONFIG_SYS_DPAA_FMAN
365 static void ft_fixup_clks(void *blob, const char *compat, u32 offset,
368 phys_addr_t phys = offset + CONFIG_SYS_CCSRBAR_PHYS;
369 int off = fdt_node_offset_by_compat_reg(blob, compat, phys);
372 off = fdt_setprop_cell(blob, off, "clock-frequency", freq);
374 printf("WARNING enable to set clock-frequency "
375 "for %s: %s\n", compat, fdt_strerror(off));
380 static void ft_fixup_dpaa_clks(void *blob)
384 get_sys_info(&sysinfo);
385 #ifdef CONFIG_SYS_DPAA_FMAN
386 ft_fixup_clks(blob, "fsl,fman", CONFIG_SYS_FSL_FM1_OFFSET,
387 sysinfo.freqFMan[0]);
389 #if (CONFIG_SYS_NUM_FMAN == 2)
390 ft_fixup_clks(blob, "fsl,fman", CONFIG_SYS_FSL_FM2_OFFSET,
391 sysinfo.freqFMan[1]);
395 #ifdef CONFIG_SYS_DPAA_PME
396 do_fixup_by_compat_u32(blob, "fsl,pme",
397 "clock-frequency", sysinfo.freqPME, 1);
401 #define ft_fixup_dpaa_clks(x)
405 static void ft_fixup_qe_snum(void *blob)
409 svr = mfspr(SPRN_SVR);
410 if (SVR_SOC_VER(svr) == SVR_8569_E) {
411 if(IS_SVR_REV(svr, 1, 0))
412 do_fixup_by_compat_u32(blob, "fsl,qe",
413 "fsl,qe-num-snums", 46, 1);
415 do_fixup_by_compat_u32(blob, "fsl,qe",
416 "fsl,qe-num-snums", 76, 1);
422 * fdt_fixup_fman_firmware -- insert the Fman firmware into the device tree
424 * The binding for an Fman firmware node is documented in
425 * Documentation/powerpc/dts-bindings/fsl/dpaa/fman.txt. This node contains
426 * the actual Fman firmware binary data. The operating system is expected to
427 * be able to parse the binary data to determine any attributes it needs.
429 #ifdef CONFIG_SYS_DPAA_FMAN
430 void fdt_fixup_fman_firmware(void *blob)
432 int rc, fmnode, fwnode = -1;
434 struct qe_firmware *fmanfw;
435 const struct qe_header *hdr;
440 /* The first Fman we find will contain the actual firmware. */
441 fmnode = fdt_node_offset_by_compatible(blob, -1, "fsl,fman");
443 /* Exit silently if there are no Fman devices */
446 /* If we already have a firmware node, then also exit silently. */
447 if (fdt_node_offset_by_compatible(blob, -1, "fsl,fman-firmware") > 0)
450 /* If the environment variable is not set, then exit silently */
451 p = getenv("fman_ucode");
455 fmanfw = (struct qe_firmware *) simple_strtoul(p, NULL, 0);
459 hdr = &fmanfw->header;
460 length = be32_to_cpu(hdr->length);
462 /* Verify the firmware. */
463 if ((hdr->magic[0] != 'Q') || (hdr->magic[1] != 'E') ||
464 (hdr->magic[2] != 'F')) {
465 printf("Data at %p is not an Fman firmware\n", fmanfw);
469 if (length > CONFIG_SYS_QE_FMAN_FW_LENGTH) {
470 printf("Fman firmware at %p is too large (size=%u)\n",
475 length -= sizeof(u32); /* Subtract the size of the CRC */
476 crc = be32_to_cpu(*(u32 *)((void *)fmanfw + length));
477 if (crc != crc32_no_comp(0, (void *)fmanfw, length)) {
478 printf("Fman firmware at %p has invalid CRC\n", fmanfw);
482 /* Increase the size of the fdt to make room for the node. */
483 rc = fdt_increase_size(blob, fmanfw->header.length);
485 printf("Unable to make room for Fman firmware: %s\n",
490 /* Create the firmware node. */
491 fwnode = fdt_add_subnode(blob, fmnode, "fman-firmware");
494 fdt_get_path(blob, fmnode, s, sizeof(s));
495 printf("Could not add firmware node to %s: %s\n", s,
496 fdt_strerror(fwnode));
499 rc = fdt_setprop_string(blob, fwnode, "compatible", "fsl,fman-firmware");
502 fdt_get_path(blob, fwnode, s, sizeof(s));
503 printf("Could not add compatible property to node %s: %s\n", s,
507 phandle = fdt_create_phandle(blob, fwnode);
510 fdt_get_path(blob, fwnode, s, sizeof(s));
511 printf("Could not add phandle property to node %s: %s\n", s,
515 rc = fdt_setprop(blob, fwnode, "fsl,firmware", fmanfw, fmanfw->header.length);
518 fdt_get_path(blob, fwnode, s, sizeof(s));
519 printf("Could not add firmware property to node %s: %s\n", s,
524 /* Find all other Fman nodes and point them to the firmware node. */
525 while ((fmnode = fdt_node_offset_by_compatible(blob, fmnode, "fsl,fman")) > 0) {
526 rc = fdt_setprop_cell(blob, fmnode, "fsl,firmware-phandle", phandle);
529 fdt_get_path(blob, fmnode, s, sizeof(s));
530 printf("Could not add pointer property to node %s: %s\n",
531 s, fdt_strerror(rc));
537 #define fdt_fixup_fman_firmware(x)
540 #if defined(CONFIG_PPC_P4080) || defined(CONFIG_PPC_P3060)
541 static void fdt_fixup_usb(void *fdt)
543 ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
544 u32 rcwsr11 = in_be32(&gur->rcwsr[11]);
547 off = fdt_node_offset_by_compatible(fdt, -1, "fsl,mpc85xx-usb2-mph");
548 if ((rcwsr11 & FSL_CORENET_RCWSR11_EC1) !=
549 FSL_CORENET_RCWSR11_EC1_FM1_USB1)
550 fdt_status_disabled(fdt, off);
552 off = fdt_node_offset_by_compatible(fdt, -1, "fsl,mpc85xx-usb2-dr");
553 if ((rcwsr11 & FSL_CORENET_RCWSR11_EC2) !=
554 FSL_CORENET_RCWSR11_EC2_USB2)
555 fdt_status_disabled(fdt, off);
558 #define fdt_fixup_usb(x)
561 void ft_cpu_setup(void *blob, bd_t *bd)
567 /* delete crypto node if not on an E-processor */
568 if (!IS_E_PROCESSOR(get_svr()))
569 fdt_fixup_crypto_node(blob, 0);
571 fdt_fixup_ethernet(blob);
573 fdt_add_enet_stashing(blob);
575 do_fixup_by_prop_u32(blob, "device_type", "cpu", 4,
576 "timebase-frequency", get_tbclk(), 1);
577 do_fixup_by_prop_u32(blob, "device_type", "cpu", 4,
578 "bus-frequency", bd->bi_busfreq, 1);
579 get_sys_info(&sysinfo);
580 off = fdt_node_offset_by_prop_value(blob, -1, "device_type", "cpu", 4);
581 while (off != -FDT_ERR_NOTFOUND) {
582 u32 *reg = (u32 *)fdt_getprop(blob, off, "reg", 0);
583 val = cpu_to_fdt32(sysinfo.freqProcessor[*reg]);
584 fdt_setprop(blob, off, "clock-frequency", &val, 4);
585 off = fdt_node_offset_by_prop_value(blob, off, "device_type",
588 do_fixup_by_prop_u32(blob, "device_type", "soc", 4,
589 "bus-frequency", bd->bi_busfreq, 1);
591 do_fixup_by_compat_u32(blob, "fsl,pq3-localbus",
592 "bus-frequency", gd->lbc_clk, 1);
593 do_fixup_by_compat_u32(blob, "fsl,elbc",
594 "bus-frequency", gd->lbc_clk, 1);
597 ft_fixup_qe_snum(blob);
600 fdt_fixup_fman_firmware(blob);
602 #ifdef CONFIG_SYS_NS16550
603 do_fixup_by_compat_u32(blob, "ns16550",
604 "clock-frequency", CONFIG_SYS_NS16550_CLK, 1);
608 do_fixup_by_compat_u32(blob, "fsl,cpm2-scc-uart",
609 "current-speed", bd->bi_baudrate, 1);
611 do_fixup_by_compat_u32(blob, "fsl,cpm2-brg",
612 "clock-frequency", bd->bi_brgfreq, 1);
615 #ifdef CONFIG_FSL_CORENET
616 do_fixup_by_compat_u32(blob, "fsl,qoriq-clockgen-1.0",
617 "clock-frequency", CONFIG_SYS_CLK_FREQ, 1);
620 fdt_fixup_memory(blob, (u64)bd->bi_memstart, (u64)bd->bi_memsize);
623 ft_fixup_cpu(blob, (u64)bd->bi_memstart + (u64)bd->bi_memsize);
624 ft_fixup_num_cores(blob);
627 ft_fixup_cache(blob);
629 #if defined(CONFIG_FSL_ESDHC)
630 fdt_fixup_esdhc(blob, bd);
633 ft_fixup_dpaa_clks(blob);
635 #if defined(CONFIG_SYS_BMAN_MEM_PHYS)
636 fdt_portal(blob, "fsl,bman-portal", "bman-portals",
637 (u64)CONFIG_SYS_BMAN_MEM_PHYS,
638 CONFIG_SYS_BMAN_MEM_SIZE);
639 fdt_fixup_bportals(blob);
642 #if defined(CONFIG_SYS_QMAN_MEM_PHYS)
643 fdt_portal(blob, "fsl,qman-portal", "qman-portals",
644 (u64)CONFIG_SYS_QMAN_MEM_PHYS,
645 CONFIG_SYS_QMAN_MEM_SIZE);
647 fdt_fixup_qportals(blob);
650 #ifdef CONFIG_SYS_SRIO
655 * system-clock = CCB clock/2
656 * Here gd->bus_clk = CCB clock
657 * We are using the system clock as 1588 Timer reference
658 * clock source select
660 do_fixup_by_compat_u32(blob, "fsl,gianfar-ptp-timer",
661 "timer-frequency", gd->bus_clk/2, 1);
664 * clock-freq should change to clock-frequency and
665 * flexcan-v1.0 should change to p1010-flexcan respectively
668 do_fixup_by_compat_u32(blob, "fsl,flexcan-v1.0",
669 "clock_freq", gd->bus_clk/2, 1);
671 do_fixup_by_compat_u32(blob, "fsl,flexcan-v1.0",
672 "clock-frequency", gd->bus_clk/2, 1);
674 do_fixup_by_compat_u32(blob, "fsl,p1010-flexcan",
675 "clock-frequency", gd->bus_clk/2, 1);
681 * For some CCSR devices, we only have the virtual address, not the physical
682 * address. This is because we map CCSR as a whole, so we typically don't need
683 * a macro for the physical address of any device within CCSR. In this case,
684 * we calculate the physical address of that device using it's the difference
685 * between the virtual address of the device and the virtual address of the
688 #define CCSR_VIRT_TO_PHYS(x) \
689 (CONFIG_SYS_CCSRBAR_PHYS + ((x) - CONFIG_SYS_CCSRBAR))
691 static void msg(const char *name, uint64_t uaddr, uint64_t daddr)
693 printf("Warning: U-Boot configured %s at address %llx,\n"
694 "but the device tree has it at %llx\n", name, uaddr, daddr);
698 * Verify the device tree
700 * This function compares several CONFIG_xxx macros that contain physical
701 * addresses with the corresponding nodes in the device tree, to see if
702 * the physical addresses are all correct. For example, if
703 * CONFIG_SYS_NS16550_COM1 is defined, then it contains the virtual address
704 * of the first UART. We convert this to a physical address and compare
705 * that with the physical address of the first ns16550-compatible node
706 * in the device tree. If they don't match, then we display a warning.
708 * Returns 1 on success, 0 on failure
710 int ft_verify_fdt(void *fdt)
716 /* First check the CCSR base address */
717 off = fdt_node_offset_by_prop_value(fdt, -1, "device_type", "soc", 4);
719 addr = fdt_get_base_address(fdt, off);
722 printf("Warning: could not determine base CCSR address in "
724 /* No point in checking anything else */
728 if (addr != CONFIG_SYS_CCSRBAR_PHYS) {
729 msg("CCSR", CONFIG_SYS_CCSRBAR_PHYS, addr);
730 /* No point in checking anything else */
735 * Check some nodes via aliases. We assume that U-Boot and the device
736 * tree enumerate the devices equally. E.g. the first serial port in
737 * U-Boot is the same as "serial0" in the device tree.
739 aliases = fdt_path_offset(fdt, "/aliases");
741 #ifdef CONFIG_SYS_NS16550_COM1
742 if (!fdt_verify_alias_address(fdt, aliases, "serial0",
743 CCSR_VIRT_TO_PHYS(CONFIG_SYS_NS16550_COM1)))
747 #ifdef CONFIG_SYS_NS16550_COM2
748 if (!fdt_verify_alias_address(fdt, aliases, "serial1",
749 CCSR_VIRT_TO_PHYS(CONFIG_SYS_NS16550_COM2)))
755 * The localbus node is typically a root node, even though the lbc
756 * controller is part of CCSR. If we were to put the lbc node under
757 * the SOC node, then the 'ranges' property in the lbc node would
758 * translate through the 'ranges' property of the parent SOC node, and
759 * we don't want that. Since it's a separate node, it's possible for
760 * the 'reg' property to be wrong, so check it here. For now, we
761 * only check for "fsl,elbc" nodes.
763 #ifdef CONFIG_SYS_LBC_ADDR
764 off = fdt_node_offset_by_compatible(fdt, -1, "fsl,elbc");
766 const u32 *reg = fdt_getprop(fdt, off, "reg", NULL);
768 uint64_t uaddr = CCSR_VIRT_TO_PHYS(CONFIG_SYS_LBC_ADDR);
770 addr = fdt_translate_address(fdt, off, reg);
772 msg("the localbus", uaddr, addr);