arch/powerpc/cpu/mpc85xx/fdt.c

   1 /*
   2  * Copyright 2007-2011 Freescale Semiconductor, Inc.
   3  *
   4  * (C) Copyright 2000
   5  * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
   6  *
   7  * See file CREDITS for list of people who contributed to this
   8  * project.
   9  *
  10  * This program is free software; you can redistribute it and/or
  11  * modify it under the terms of the GNU General Public License as
  12  * published by the Free Software Foundation; either version 2 of
  13  * the License, or (at your option) any later version.
  14  *
  15  * This program is distributed in the hope that it will be useful,
  16  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  17  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  18  * GNU General Public License for more details.
  19  *
  20  * You should have received a copy of the GNU General Public License
  21  * along with this program; if not, write to the Free Software
  22  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  23  * MA 02111-1307 USA
  24  */
  25
  26 #include <common.h>
  27 #include <libfdt.h>
  28 #include <fdt_support.h>
  29 #include <asm/processor.h>
  30 #include <linux/ctype.h>
  31 #include <asm/io.h>
  32 #include <asm/fsl_portals.h>
  33 #ifdef CONFIG_FSL_ESDHC
  34 #include <fsl_esdhc.h>
  35 #endif
  36 #include "../../../../drivers/qe/qe.h"          /* For struct qe_firmware */
  37
  38 DECLARE_GLOBAL_DATA_PTR;
  39
  40 extern void ft_qe_setup(void *blob);
  41 extern void ft_fixup_num_cores(void *blob);
  42 extern void ft_srio_setup(void *blob);
  43
  44 #ifdef CONFIG_MP
  45 #include "mp.h"
  46
  47 void ft_fixup_cpu(void *blob, u64 memory_limit)
  48 {
  49         int off;
  50         phys_addr_t spin_tbl_addr = get_spin_phys_addr();
  51         u32 bootpg = determine_mp_bootpg(NULL);
  52         u32 id = get_my_id();
  53         const char *enable_method;
  54
  55         off = fdt_node_offset_by_prop_value(blob, -1, "device_type", "cpu", 4);
  56         while (off != -FDT_ERR_NOTFOUND) {
  57                 u32 *reg = (u32 *)fdt_getprop(blob, off, "reg", 0);
  58
  59                 if (reg) {
  60                         u32 phys_cpu_id = thread_to_core(*reg);
  61                         u64 val = phys_cpu_id * SIZE_BOOT_ENTRY + spin_tbl_addr;
  62                         val = cpu_to_fdt64(val);
  63                         if (*reg == id) {
  64                                 fdt_setprop_string(blob, off, "status",
  65                                                                 "okay");
  66                         } else {
  67                                 fdt_setprop_string(blob, off, "status",
  68                                                                 "disabled");
  69                         }
  70
  71                         if (hold_cores_in_reset(0)) {
  72 #ifdef CONFIG_FSL_CORENET
  73                                 /* Cores held in reset, use BRR to release */
  74                                 enable_method = "fsl,brr-holdoff";
  75 #else
  76                                 /* Cores held in reset, use EEBPCR to release */
  77                                 enable_method = "fsl,eebpcr-holdoff";
  78 #endif
  79                         } else {
  80                                 /* Cores out of reset and in a spin-loop */
  81                                 enable_method = "spin-table";
  82
  83                                 fdt_setprop(blob, off, "cpu-release-addr",
  84                                                 &val, sizeof(val));
  85                         }
  86
  87                         fdt_setprop_string(blob, off, "enable-method",
  88                                                         enable_method);
  89                 } else {
  90                         printf ("cpu NULL\n");
  91                 }
  92                 off = fdt_node_offset_by_prop_value(blob, off,
  93                                 "device_type", "cpu", 4);
  94         }
  95
  96         /* Reserve the boot page so OSes dont use it */
  97         if ((u64)bootpg < memory_limit) {
  98                 off = fdt_add_mem_rsv(blob, bootpg, (u64)4096);
  99                 if (off < 0)
 100                         printf("Failed to reserve memory for bootpg: %s\n",
 101                                 fdt_strerror(off));
 102         }
 103
 104 #ifndef CONFIG_MPC8xxx_DISABLE_BPTR
 105         /*
 106          * Reserve the default boot page so OSes dont use it.
 107          * The default boot page is always mapped to bootpg above using
 108          * boot page translation.
 109          */
 110         if (0xfffff000ull < memory_limit) {
 111                 off = fdt_add_mem_rsv(blob, 0xfffff000ull, (u64)4096);
 112                 if (off < 0) {
 113                         printf("Failed to reserve memory for 0xfffff000: %s\n",
 114                                 fdt_strerror(off));
 115                 }
 116         }
 117 #endif
 118
 119         /* Reserve spin table page */
 120         if (spin_tbl_addr < memory_limit) {
 121                 off = fdt_add_mem_rsv(blob,
 122                         (spin_tbl_addr & ~0xffful), 4096);
 123                 if (off < 0)
 124                         printf("Failed to reserve memory for spin table: %s\n",
 125                                 fdt_strerror(off));
 126         }
 127 }
 128 #endif
 129
 130 #ifdef CONFIG_SYS_FSL_CPC
 131 static inline void ft_fixup_l3cache(void *blob, int off)
 132 {
 133         u32 line_size, num_ways, size, num_sets;
 134         cpc_corenet_t *cpc = (void *)CONFIG_SYS_FSL_CPC_ADDR;
 135         u32 cfg0 = in_be32(&cpc->cpccfg0);
 136
 137         size = CPC_CFG0_SZ_K(cfg0) * 1024 * CONFIG_SYS_NUM_CPC;
 138         num_ways = CPC_CFG0_NUM_WAYS(cfg0);
 139         line_size = CPC_CFG0_LINE_SZ(cfg0);
 140         num_sets = size / (line_size * num_ways);
 141
 142         fdt_setprop(blob, off, "cache-unified", NULL, 0);
 143         fdt_setprop_cell(blob, off, "cache-block-size", line_size);
 144         fdt_setprop_cell(blob, off, "cache-size", size);
 145         fdt_setprop_cell(blob, off, "cache-sets", num_sets);
 146         fdt_setprop_cell(blob, off, "cache-level", 3);
 147 #ifdef CONFIG_SYS_CACHE_STASHING
 148         fdt_setprop_cell(blob, off, "cache-stash-id", 1);
 149 #endif
 150 }
 151 #else
 152 #define ft_fixup_l3cache(x, y)
 153 #endif
 154
 155 #if defined(CONFIG_L2_CACHE)
 156 /* return size in kilobytes */
 157 static inline u32 l2cache_size(void)
 158 {
 159         volatile ccsr_l2cache_t *l2cache = (void *)CONFIG_SYS_MPC85xx_L2_ADDR;
 160         volatile u32 l2siz_field = (l2cache->l2ctl >> 28) & 0x3;
 161         u32 ver = SVR_SOC_VER(get_svr());
 162
 163         switch (l2siz_field) {
 164         case 0x0:
 165                 break;
 166         case 0x1:
 167                 if (ver == SVR_8540 || ver == SVR_8560   ||
 168                     ver == SVR_8541 || ver == SVR_8555)
 169                         return 128;
 170                 else
 171                         return 256;
 172                 break;
 173         case 0x2:
 174                 if (ver == SVR_8540 || ver == SVR_8560   ||
 175                     ver == SVR_8541 || ver == SVR_8555)
 176                         return 256;
 177                 else
 178                         return 512;
 179                 break;
 180         case 0x3:
 181                 return 1024;
 182                 break;
 183         }
 184
 185         return 0;
 186 }
 187
 188 static inline void ft_fixup_l2cache(void *blob)
 189 {
 190         int len, off;
 191         u32 *ph;
 192         struct cpu_type *cpu = identify_cpu(SVR_SOC_VER(get_svr()));
 193
 194         const u32 line_size = 32;
 195         const u32 num_ways = 8;
 196         const u32 size = l2cache_size() * 1024;
 197         const u32 num_sets = size / (line_size * num_ways);
 198
 199         off = fdt_node_offset_by_prop_value(blob, -1, "device_type", "cpu", 4);
 200         if (off < 0) {
 201                 debug("no cpu node fount\n");
 202                 return;
 203         }
 204
 205         ph = (u32 *)fdt_getprop(blob, off, "next-level-cache", 0);
 206
 207         if (ph == NULL) {
 208                 debug("no next-level-cache property\n");
 209                 return ;
 210         }
 211
 212         off = fdt_node_offset_by_phandle(blob, *ph);
 213         if (off < 0) {
 214                 printf("%s: %s\n", __func__, fdt_strerror(off));
 215                 return ;
 216         }
 217
 218         if (cpu) {
 219                 char buf[40];
 220
 221                 if (isdigit(cpu->name[0])) {
 222                         /* MPCxxxx, where xxxx == 4-digit number */
 223                         len = sprintf(buf, "fsl,mpc%s-l2-cache-controller",
 224                                 cpu->name) + 1;
 225                 } else {
 226                         /* Pxxxx or Txxxx, where xxxx == 4-digit number */
 227                         len = sprintf(buf, "fsl,%c%s-l2-cache-controller",
 228                                 tolower(cpu->name[0]), cpu->name + 1) + 1;
 229                 }
 230
 231                 /*
 232                  * append "cache" after the NULL character that the previous
 233                  * sprintf wrote.  This is how a device tree stores multiple
 234                  * strings in a property.
 235                  */
 236                 len += sprintf(buf + len, "cache") + 1;
 237
 238                 fdt_setprop(blob, off, "compatible", buf, len);
 239         }
 240         fdt_setprop(blob, off, "cache-unified", NULL, 0);
 241         fdt_setprop_cell(blob, off, "cache-block-size", line_size);
 242         fdt_setprop_cell(blob, off, "cache-size", size);
 243         fdt_setprop_cell(blob, off, "cache-sets", num_sets);
 244         fdt_setprop_cell(blob, off, "cache-level", 2);
 245
 246         /* we dont bother w/L3 since no platform of this type has one */
 247 }
 248 #elif defined(CONFIG_BACKSIDE_L2_CACHE) || \
 249         defined(CONFIG_SYS_FSL_QORIQ_CHASSIS2)
 250 static inline void ft_fixup_l2cache(void *blob)
 251 {
 252         int off, l2_off, l3_off = -1;
 253         u32 *ph;
 254 #ifdef  CONFIG_BACKSIDE_L2_CACHE
 255         u32 l2cfg0 = mfspr(SPRN_L2CFG0);
 256 #else
 257         struct ccsr_cluster_l2 *l2cache =
 258                 (struct ccsr_cluster_l2 __iomem *)(CONFIG_SYS_FSL_CLUSTER_1_L2);
 259         u32 l2cfg0 = in_be32(&l2cache->l2cfg0);
 260 #endif
 261         u32 size, line_size, num_ways, num_sets;
 262         int has_l2 = 1;
 263
 264         /* P2040/P2040E has no L2, so dont set any L2 props */
 265         if (SVR_SOC_VER(get_svr()) == SVR_P2040)
 266                 has_l2 = 0;
 267
 268         size = (l2cfg0 & 0x3fff) * 64 * 1024;
 269         num_ways = ((l2cfg0 >> 14) & 0x1f) + 1;
 270         line_size = (((l2cfg0 >> 23) & 0x3) + 1) * 32;
 271         num_sets = size / (line_size * num_ways);
 272
 273         off = fdt_node_offset_by_prop_value(blob, -1, "device_type", "cpu", 4);
 274
 275         while (off != -FDT_ERR_NOTFOUND) {
 276                 ph = (u32 *)fdt_getprop(blob, off, "next-level-cache", 0);
 277
 278                 if (ph == NULL) {
 279                         debug("no next-level-cache property\n");
 280                         goto next;
 281                 }
 282
 283                 l2_off = fdt_node_offset_by_phandle(blob, *ph);
 284                 if (l2_off < 0) {
 285                         printf("%s: %s\n", __func__, fdt_strerror(off));
 286                         goto next;
 287                 }
 288
 289                 if (has_l2) {
 290 #ifdef CONFIG_SYS_CACHE_STASHING
 291                         u32 *reg = (u32 *)fdt_getprop(blob, off, "reg", 0);
 292 #ifdef CONFIG_SYS_FSL_QORIQ_CHASSIS2
 293                         /* Only initialize every eighth thread */
 294                         if (reg && !((*reg) % 8))
 295 #else
 296                         if (reg)
 297 #endif
 298                                 fdt_setprop_cell(blob, l2_off, "cache-stash-id",
 299                                          (*reg * 2) + 32 + 1);
 300 #endif
 301
 302                         fdt_setprop(blob, l2_off, "cache-unified", NULL, 0);
 303                         fdt_setprop_cell(blob, l2_off, "cache-block-size",
 304                                                 line_size);
 305                         fdt_setprop_cell(blob, l2_off, "cache-size", size);
 306                         fdt_setprop_cell(blob, l2_off, "cache-sets", num_sets);
 307                         fdt_setprop_cell(blob, l2_off, "cache-level", 2);
 308                         fdt_setprop(blob, l2_off, "compatible", "cache", 6);
 309                 }
 310
 311                 if (l3_off < 0) {
 312                         ph = (u32 *)fdt_getprop(blob, l2_off, "next-level-cache", 0);
 313
 314                         if (ph == NULL) {
 315                                 debug("no next-level-cache property\n");
 316                                 goto next;
 317                         }
 318                         l3_off = *ph;
 319                 }
 320 next:
 321                 off = fdt_node_offset_by_prop_value(blob, off,
 322                                 "device_type", "cpu", 4);
 323         }
 324         if (l3_off > 0) {
 325                 l3_off = fdt_node_offset_by_phandle(blob, l3_off);
 326                 if (l3_off < 0) {
 327                         printf("%s: %s\n", __func__, fdt_strerror(off));
 328                         return ;
 329                 }
 330                 ft_fixup_l3cache(blob, l3_off);
 331         }
 332 }
 333 #else
 334 #define ft_fixup_l2cache(x)
 335 #endif
 336
 337 static inline void ft_fixup_cache(void *blob)
 338 {
 339         int off;
 340
 341         off = fdt_node_offset_by_prop_value(blob, -1, "device_type", "cpu", 4);
 342
 343         while (off != -FDT_ERR_NOTFOUND) {
 344                 u32 l1cfg0 = mfspr(SPRN_L1CFG0);
 345                 u32 l1cfg1 = mfspr(SPRN_L1CFG1);
 346                 u32 isize, iline_size, inum_sets, inum_ways;
 347                 u32 dsize, dline_size, dnum_sets, dnum_ways;
 348
 349                 /* d-side config */
 350                 dsize = (l1cfg0 & 0x7ff) * 1024;
 351                 dnum_ways = ((l1cfg0 >> 11) & 0xff) + 1;
 352                 dline_size = (((l1cfg0 >> 23) & 0x3) + 1) * 32;
 353                 dnum_sets = dsize / (dline_size * dnum_ways);
 354
 355                 fdt_setprop_cell(blob, off, "d-cache-block-size", dline_size);
 356                 fdt_setprop_cell(blob, off, "d-cache-size", dsize);
 357                 fdt_setprop_cell(blob, off, "d-cache-sets", dnum_sets);
 358
 359 #ifdef CONFIG_SYS_CACHE_STASHING
 360                 {
 361                         u32 *reg = (u32 *)fdt_getprop(blob, off, "reg", 0);
 362                         if (reg)
 363                                 fdt_setprop_cell(blob, off, "cache-stash-id",
 364                                          (*reg * 2) + 32 + 0);
 365                 }
 366 #endif
 367
 368                 /* i-side config */
 369                 isize = (l1cfg1 & 0x7ff) * 1024;
 370                 inum_ways = ((l1cfg1 >> 11) & 0xff) + 1;
 371                 iline_size = (((l1cfg1 >> 23) & 0x3) + 1) * 32;
 372                 inum_sets = isize / (iline_size * inum_ways);
 373
 374                 fdt_setprop_cell(blob, off, "i-cache-block-size", iline_size);
 375                 fdt_setprop_cell(blob, off, "i-cache-size", isize);
 376                 fdt_setprop_cell(blob, off, "i-cache-sets", inum_sets);
 377
 378                 off = fdt_node_offset_by_prop_value(blob, off,
 379                                 "device_type", "cpu", 4);
 380         }
 381
 382         ft_fixup_l2cache(blob);
 383 }
 384
 385
 386 void fdt_add_enet_stashing(void *fdt)
 387 {
 388         do_fixup_by_compat(fdt, "gianfar", "bd-stash", NULL, 0, 1);
 389
 390         do_fixup_by_compat_u32(fdt, "gianfar", "rx-stash-len", 96, 1);
 391
 392         do_fixup_by_compat_u32(fdt, "gianfar", "rx-stash-idx", 0, 1);
 393         do_fixup_by_compat(fdt, "fsl,etsec2", "bd-stash", NULL, 0, 1);
 394         do_fixup_by_compat_u32(fdt, "fsl,etsec2", "rx-stash-len", 96, 1);
 395         do_fixup_by_compat_u32(fdt, "fsl,etsec2", "rx-stash-idx", 0, 1);
 396 }
 397
 398 #if defined(CONFIG_SYS_DPAA_FMAN) || defined(CONFIG_SYS_DPAA_PME)
 399 #ifdef CONFIG_SYS_DPAA_FMAN
 400 static void ft_fixup_clks(void *blob, const char *compat, u32 offset,
 401                           unsigned long freq)
 402 {
 403         phys_addr_t phys = offset + CONFIG_SYS_CCSRBAR_PHYS;
 404         int off = fdt_node_offset_by_compat_reg(blob, compat, phys);
 405
 406         if (off >= 0) {
 407                 off = fdt_setprop_cell(blob, off, "clock-frequency", freq);
 408                 if (off > 0)
 409                         printf("WARNING enable to set clock-frequency "
 410                                 "for %s: %s\n", compat, fdt_strerror(off));
 411         }
 412 }
 413 #endif
 414
 415 static void ft_fixup_dpaa_clks(void *blob)
 416 {
 417         sys_info_t sysinfo;
 418
 419         get_sys_info(&sysinfo);
 420 #ifdef CONFIG_SYS_DPAA_FMAN
 421         ft_fixup_clks(blob, "fsl,fman", CONFIG_SYS_FSL_FM1_OFFSET,
 422                         sysinfo.freqFMan[0]);
 423
 424 #if (CONFIG_SYS_NUM_FMAN == 2)
 425         ft_fixup_clks(blob, "fsl,fman", CONFIG_SYS_FSL_FM2_OFFSET,
 426                         sysinfo.freqFMan[1]);
 427 #endif
 428 #endif
 429
 430 #ifdef CONFIG_SYS_DPAA_QBMAN
 431         do_fixup_by_compat_u32(blob, "fsl,qman",
 432                         "clock-frequency", sysinfo.freqQMAN, 1);
 433 #endif
 434
 435 #ifdef CONFIG_SYS_DPAA_PME
 436         do_fixup_by_compat_u32(blob, "fsl,pme",
 437                 "clock-frequency", sysinfo.freqPME, 1);
 438 #endif
 439 }
 440 #else
 441 #define ft_fixup_dpaa_clks(x)
 442 #endif
 443
 444 #ifdef CONFIG_QE
 445 static void ft_fixup_qe_snum(void *blob)
 446 {
 447         unsigned int svr;
 448
 449         svr = mfspr(SPRN_SVR);
 450         if (SVR_SOC_VER(svr) == SVR_8569) {
 451                 if(IS_SVR_REV(svr, 1, 0))
 452                         do_fixup_by_compat_u32(blob, "fsl,qe",
 453                                 "fsl,qe-num-snums", 46, 1);
 454                 else
 455                         do_fixup_by_compat_u32(blob, "fsl,qe",
 456                                 "fsl,qe-num-snums", 76, 1);
 457         }
 458 }
 459 #endif
 460
 461 /**
 462  * fdt_fixup_fman_firmware -- insert the Fman firmware into the device tree
 463  *
 464  * The binding for an Fman firmware node is documented in
 465  * Documentation/powerpc/dts-bindings/fsl/dpaa/fman.txt.  This node contains
 466  * the actual Fman firmware binary data.  The operating system is expected to
 467  * be able to parse the binary data to determine any attributes it needs.
 468  */
 469 #ifdef CONFIG_SYS_DPAA_FMAN
 470 void fdt_fixup_fman_firmware(void *blob)
 471 {
 472         int rc, fmnode, fwnode = -1;
 473         uint32_t phandle;
 474         struct qe_firmware *fmanfw;
 475         const struct qe_header *hdr;
 476         unsigned int length;
 477         uint32_t crc;
 478         const char *p;
 479
 480         /* The first Fman we find will contain the actual firmware. */
 481         fmnode = fdt_node_offset_by_compatible(blob, -1, "fsl,fman");
 482         if (fmnode < 0)
 483                 /* Exit silently if there are no Fman devices */
 484                 return;
 485
 486         /* If we already have a firmware node, then also exit silently. */
 487         if (fdt_node_offset_by_compatible(blob, -1, "fsl,fman-firmware") > 0)
 488                 return;
 489
 490         /* If the environment variable is not set, then exit silently */
 491         p = getenv("fman_ucode");
 492         if (!p)
 493                 return;
 494
 495         fmanfw = (struct qe_firmware *) simple_strtoul(p, NULL, 0);
 496         if (!fmanfw)
 497                 return;
 498
 499         hdr = &fmanfw->header;
 500         length = be32_to_cpu(hdr->length);
 501
 502         /* Verify the firmware. */
 503         if ((hdr->magic[0] != 'Q') || (hdr->magic[1] != 'E') ||
 504                 (hdr->magic[2] != 'F')) {
 505                 printf("Data at %p is not an Fman firmware\n", fmanfw);
 506                 return;
 507         }
 508
 509         if (length > CONFIG_SYS_QE_FMAN_FW_LENGTH) {
 510                 printf("Fman firmware at %p is too large (size=%u)\n",
 511                        fmanfw, length);
 512                 return;
 513         }
 514
 515         length -= sizeof(u32);  /* Subtract the size of the CRC */
 516         crc = be32_to_cpu(*(u32 *)((void *)fmanfw + length));
 517         if (crc != crc32_no_comp(0, (void *)fmanfw, length)) {
 518                 printf("Fman firmware at %p has invalid CRC\n", fmanfw);
 519                 return;
 520         }
 521
 522         /* Increase the size of the fdt to make room for the node. */
 523         rc = fdt_increase_size(blob, fmanfw->header.length);
 524         if (rc < 0) {
 525                 printf("Unable to make room for Fman firmware: %s\n",
 526                         fdt_strerror(rc));
 527                 return;
 528         }
 529
 530         /* Create the firmware node. */
 531         fwnode = fdt_add_subnode(blob, fmnode, "fman-firmware");
 532         if (fwnode < 0) {
 533                 char s[64];
 534                 fdt_get_path(blob, fmnode, s, sizeof(s));
 535                 printf("Could not add firmware node to %s: %s\n", s,
 536                        fdt_strerror(fwnode));
 537                 return;
 538         }
 539         rc = fdt_setprop_string(blob, fwnode, "compatible", "fsl,fman-firmware");
 540         if (rc < 0) {
 541                 char s[64];
 542                 fdt_get_path(blob, fwnode, s, sizeof(s));
 543                 printf("Could not add compatible property to node %s: %s\n", s,
 544                        fdt_strerror(rc));
 545                 return;
 546         }
 547         phandle = fdt_create_phandle(blob, fwnode);
 548         if (!phandle) {
 549                 char s[64];
 550                 fdt_get_path(blob, fwnode, s, sizeof(s));
 551                 printf("Could not add phandle property to node %s: %s\n", s,
 552                        fdt_strerror(rc));
 553                 return;
 554         }
 555         rc = fdt_setprop(blob, fwnode, "fsl,firmware", fmanfw, fmanfw->header.length);
 556         if (rc < 0) {
 557                 char s[64];
 558                 fdt_get_path(blob, fwnode, s, sizeof(s));
 559                 printf("Could not add firmware property to node %s: %s\n", s,
 560                        fdt_strerror(rc));
 561                 return;
 562         }
 563
 564         /* Find all other Fman nodes and point them to the firmware node. */
 565         while ((fmnode = fdt_node_offset_by_compatible(blob, fmnode, "fsl,fman")) > 0) {
 566                 rc = fdt_setprop_cell(blob, fmnode, "fsl,firmware-phandle", phandle);
 567                 if (rc < 0) {
 568                         char s[64];
 569                         fdt_get_path(blob, fmnode, s, sizeof(s));
 570                         printf("Could not add pointer property to node %s: %s\n",
 571                                s, fdt_strerror(rc));
 572                         return;
 573                 }
 574         }
 575 }
 576 #else
 577 #define fdt_fixup_fman_firmware(x)
 578 #endif
 579
 580 #if defined(CONFIG_PPC_P4080)
 581 static void fdt_fixup_usb(void *fdt)
 582 {
 583         ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
 584         u32 rcwsr11 = in_be32(&gur->rcwsr[11]);
 585         int off;
 586
 587         off = fdt_node_offset_by_compatible(fdt, -1, "fsl,mpc85xx-usb2-mph");
 588         if ((rcwsr11 & FSL_CORENET_RCWSR11_EC1) !=
 589                                 FSL_CORENET_RCWSR11_EC1_FM1_USB1)
 590                 fdt_status_disabled(fdt, off);
 591
 592         off = fdt_node_offset_by_compatible(fdt, -1, "fsl,mpc85xx-usb2-dr");
 593         if ((rcwsr11 & FSL_CORENET_RCWSR11_EC2) !=
 594                                 FSL_CORENET_RCWSR11_EC2_USB2)
 595                 fdt_status_disabled(fdt, off);
 596 }
 597 #else
 598 #define fdt_fixup_usb(x)
 599 #endif
 600
 601 void ft_cpu_setup(void *blob, bd_t *bd)
 602 {
 603         int off;
 604         int val;
 605         sys_info_t sysinfo;
 606
 607         /* delete crypto node if not on an E-processor */
 608         if (!IS_E_PROCESSOR(get_svr()))
 609                 fdt_fixup_crypto_node(blob, 0);
 610 #if CONFIG_SYS_FSL_SEC_COMPAT >= 4
 611         else {
 612                 ccsr_sec_t __iomem *sec;
 613
 614                 sec = (void __iomem *)CONFIG_SYS_FSL_SEC_ADDR;
 615                 fdt_fixup_crypto_node(blob, in_be32(&sec->secvid_ms));
 616         }
 617 #endif
 618
 619         fdt_fixup_ethernet(blob);
 620
 621         fdt_add_enet_stashing(blob);
 622
 623         do_fixup_by_prop_u32(blob, "device_type", "cpu", 4,
 624                 "timebase-frequency", get_tbclk(), 1);
 625         do_fixup_by_prop_u32(blob, "device_type", "cpu", 4,
 626                 "bus-frequency", bd->bi_busfreq, 1);
 627         get_sys_info(&sysinfo);
 628         off = fdt_node_offset_by_prop_value(blob, -1, "device_type", "cpu", 4);
 629         while (off != -FDT_ERR_NOTFOUND) {
 630                 u32 *reg = (u32 *)fdt_getprop(blob, off, "reg", 0);
 631                 val = cpu_to_fdt32(sysinfo.freqProcessor[*reg]);
 632                 fdt_setprop(blob, off, "clock-frequency", &val, 4);
 633                 off = fdt_node_offset_by_prop_value(blob, off, "device_type",
 634                                                         "cpu", 4);
 635         }
 636         do_fixup_by_prop_u32(blob, "device_type", "soc", 4,
 637                 "bus-frequency", bd->bi_busfreq, 1);
 638
 639         do_fixup_by_compat_u32(blob, "fsl,pq3-localbus",
 640                 "bus-frequency", gd->arch.lbc_clk, 1);
 641         do_fixup_by_compat_u32(blob, "fsl,elbc",
 642                 "bus-frequency", gd->arch.lbc_clk, 1);
 643 #ifdef CONFIG_QE
 644         ft_qe_setup(blob);
 645         ft_fixup_qe_snum(blob);
 646 #endif
 647
 648         fdt_fixup_fman_firmware(blob);
 649
 650 #ifdef CONFIG_SYS_NS16550
 651         do_fixup_by_compat_u32(blob, "ns16550",
 652                 "clock-frequency", CONFIG_SYS_NS16550_CLK, 1);
 653 #endif
 654
 655 #ifdef CONFIG_CPM2
 656         do_fixup_by_compat_u32(blob, "fsl,cpm2-scc-uart",
 657                 "current-speed", bd->bi_baudrate, 1);
 658
 659         do_fixup_by_compat_u32(blob, "fsl,cpm2-brg",
 660                 "clock-frequency", bd->bi_brgfreq, 1);
 661 #endif
 662
 663 #ifdef CONFIG_FSL_CORENET
 664         do_fixup_by_compat_u32(blob, "fsl,qoriq-clockgen-1.0",
 665                 "clock-frequency", CONFIG_SYS_CLK_FREQ, 1);
 666         do_fixup_by_compat_u32(blob, "fsl,qoriq-clockgen-2.0",
 667                 "clock-frequency", CONFIG_SYS_CLK_FREQ, 1);
 668         do_fixup_by_compat_u32(blob, "fsl,mpic",
 669                 "clock-frequency", get_bus_freq(0)/2, 1);
 670 #else
 671         do_fixup_by_compat_u32(blob, "fsl,mpic",
 672                 "clock-frequency", get_bus_freq(0), 1);
 673 #endif
 674
 675         fdt_fixup_memory(blob, (u64)bd->bi_memstart, (u64)bd->bi_memsize);
 676
 677 #ifdef CONFIG_MP
 678         ft_fixup_cpu(blob, (u64)bd->bi_memstart + (u64)bd->bi_memsize);
 679         ft_fixup_num_cores(blob);
 680 #endif
 681
 682         ft_fixup_cache(blob);
 683
 684 #if defined(CONFIG_FSL_ESDHC)
 685         fdt_fixup_esdhc(blob, bd);
 686 #endif
 687
 688         ft_fixup_dpaa_clks(blob);
 689
 690 #if defined(CONFIG_SYS_BMAN_MEM_PHYS)
 691         fdt_portal(blob, "fsl,bman-portal", "bman-portals",
 692                         (u64)CONFIG_SYS_BMAN_MEM_PHYS,
 693                         CONFIG_SYS_BMAN_MEM_SIZE);
 694         fdt_fixup_bportals(blob);
 695 #endif
 696
 697 #if defined(CONFIG_SYS_QMAN_MEM_PHYS)
 698         fdt_portal(blob, "fsl,qman-portal", "qman-portals",
 699                         (u64)CONFIG_SYS_QMAN_MEM_PHYS,
 700                         CONFIG_SYS_QMAN_MEM_SIZE);
 701
 702         fdt_fixup_qportals(blob);
 703 #endif
 704
 705 #ifdef CONFIG_SYS_SRIO
 706         ft_srio_setup(blob);
 707 #endif
 708
 709         /*
 710          * system-clock = CCB clock/2
 711          * Here gd->bus_clk = CCB clock
 712          * We are using the system clock as 1588 Timer reference
 713          * clock source select
 714          */
 715         do_fixup_by_compat_u32(blob, "fsl,gianfar-ptp-timer",
 716                         "timer-frequency", gd->bus_clk/2, 1);
 717
 718         /*
 719          * clock-freq should change to clock-frequency and
 720          * flexcan-v1.0 should change to p1010-flexcan respectively
 721          * in the future.
 722          */
 723         do_fixup_by_compat_u32(blob, "fsl,flexcan-v1.0",
 724                         "clock_freq", gd->bus_clk/2, 1);
 725
 726         do_fixup_by_compat_u32(blob, "fsl,flexcan-v1.0",
 727                         "clock-frequency", gd->bus_clk/2, 1);
 728
 729         do_fixup_by_compat_u32(blob, "fsl,p1010-flexcan",
 730                         "clock-frequency", gd->bus_clk/2, 1);
 731
 732         fdt_fixup_usb(blob);
 733 }
 734
 735 /*
 736  * For some CCSR devices, we only have the virtual address, not the physical
 737  * address.  This is because we map CCSR as a whole, so we typically don't need
 738  * a macro for the physical address of any device within CCSR.  In this case,
 739  * we calculate the physical address of that device using it's the difference
 740  * between the virtual address of the device and the virtual address of the
 741  * beginning of CCSR.
 742  */
 743 #define CCSR_VIRT_TO_PHYS(x) \
 744         (CONFIG_SYS_CCSRBAR_PHYS + ((x) - CONFIG_SYS_CCSRBAR))
 745
 746 static void msg(const char *name, uint64_t uaddr, uint64_t daddr)
 747 {
 748         printf("Warning: U-Boot configured %s at address %llx,\n"
 749                "but the device tree has it at %llx\n", name, uaddr, daddr);
 750 }
 751
 752 /*
 753  * Verify the device tree
 754  *
 755  * This function compares several CONFIG_xxx macros that contain physical
 756  * addresses with the corresponding nodes in the device tree, to see if
 757  * the physical addresses are all correct.  For example, if
 758  * CONFIG_SYS_NS16550_COM1 is defined, then it contains the virtual address
 759  * of the first UART.  We convert this to a physical address and compare
 760  * that with the physical address of the first ns16550-compatible node
 761  * in the device tree.  If they don't match, then we display a warning.
 762  *
 763  * Returns 1 on success, 0 on failure
 764  */
 765 int ft_verify_fdt(void *fdt)
 766 {
 767         uint64_t addr = 0;
 768         int aliases;
 769         int off;
 770
 771         /* First check the CCSR base address */
 772         off = fdt_node_offset_by_prop_value(fdt, -1, "device_type", "soc", 4);
 773         if (off > 0)
 774                 addr = fdt_get_base_address(fdt, off);
 775
 776         if (!addr) {
 777                 printf("Warning: could not determine base CCSR address in "
 778                        "device tree\n");
 779                 /* No point in checking anything else */
 780                 return 0;
 781         }
 782
 783         if (addr != CONFIG_SYS_CCSRBAR_PHYS) {
 784                 msg("CCSR", CONFIG_SYS_CCSRBAR_PHYS, addr);
 785                 /* No point in checking anything else */
 786                 return 0;
 787         }
 788
 789         /*
 790          * Check some nodes via aliases.  We assume that U-Boot and the device
 791          * tree enumerate the devices equally.  E.g. the first serial port in
 792          * U-Boot is the same as "serial0" in the device tree.
 793          */
 794         aliases = fdt_path_offset(fdt, "/aliases");
 795         if (aliases > 0) {
 796 #ifdef CONFIG_SYS_NS16550_COM1
 797                 if (!fdt_verify_alias_address(fdt, aliases, "serial0",
 798                         CCSR_VIRT_TO_PHYS(CONFIG_SYS_NS16550_COM1)))
 799                         return 0;
 800 #endif
 801
 802 #ifdef CONFIG_SYS_NS16550_COM2
 803                 if (!fdt_verify_alias_address(fdt, aliases, "serial1",
 804                         CCSR_VIRT_TO_PHYS(CONFIG_SYS_NS16550_COM2)))
 805                         return 0;
 806 #endif
 807         }
 808
 809         /*
 810          * The localbus node is typically a root node, even though the lbc
 811          * controller is part of CCSR.  If we were to put the lbc node under
 812          * the SOC node, then the 'ranges' property in the lbc node would
 813          * translate through the 'ranges' property of the parent SOC node, and
 814          * we don't want that.  Since it's a separate node, it's possible for
 815          * the 'reg' property to be wrong, so check it here.  For now, we
 816          * only check for "fsl,elbc" nodes.
 817          */
 818 #ifdef CONFIG_SYS_LBC_ADDR
 819         off = fdt_node_offset_by_compatible(fdt, -1, "fsl,elbc");
 820         if (off > 0) {
 821                 const fdt32_t *reg = fdt_getprop(fdt, off, "reg", NULL);
 822                 if (reg) {
 823                         uint64_t uaddr = CCSR_VIRT_TO_PHYS(CONFIG_SYS_LBC_ADDR);
 824
 825                         addr = fdt_translate_address(fdt, off, reg);
 826                         if (uaddr != addr) {
 827                                 msg("the localbus", uaddr, addr);
 828                                 return 0;
 829                         }
 830                 }
 831         }
 832 #endif
 833
 834         return 1;
 835 }