arch/powerpc/cpu/mpc85xx/Kconfig

   1 menu "mpc85xx CPU"
   2         depends on MPC85xx
   3
   4 config SYS_CPU
   5         default "mpc85xx"
   6
   7 config CMD_ERRATA
   8         bool "Enable the 'errata' command"
   9         depends on MPC85xx
  10         default y
  11         help
  12           This enables the 'errata' command which displays a list of errata
  13           work-arounds which are enabled for the current board.
  14
  15 choice
  16         prompt "Target select"
  17         optional
  18
  19 config TARGET_SBC8548
  20         bool "Support sbc8548"
  21         select ARCH_MPC8548
  22
  23 config TARGET_SOCRATES
  24         bool "Support socrates"
  25         select ARCH_MPC8544
  26
  27 config TARGET_B4420QDS
  28         bool "Support B4420QDS"
  29         select ARCH_B4420
  30         select SUPPORT_SPL
  31         select PHYS_64BIT
  32
  33 config TARGET_B4860QDS
  34         bool "Support B4860QDS"
  35         select ARCH_B4860
  36         select BOARD_LATE_INIT if CHAIN_OF_TRUST
  37         select SUPPORT_SPL
  38         select PHYS_64BIT
  39
  40 config TARGET_BSC9131RDB
  41         bool "Support BSC9131RDB"
  42         select ARCH_BSC9131
  43         select SUPPORT_SPL
  44         select BOARD_EARLY_INIT_F
  45
  46 config TARGET_BSC9132QDS
  47         bool "Support BSC9132QDS"
  48         select ARCH_BSC9132
  49         select BOARD_LATE_INIT if CHAIN_OF_TRUST
  50         select SUPPORT_SPL
  51         select BOARD_EARLY_INIT_F
  52
  53 config TARGET_C29XPCIE
  54         bool "Support C29XPCIE"
  55         select ARCH_C29X
  56         select BOARD_LATE_INIT if CHAIN_OF_TRUST
  57         select SUPPORT_SPL
  58         select SUPPORT_TPL
  59         select PHYS_64BIT
  60
  61 config TARGET_P3041DS
  62         bool "Support P3041DS"
  63         select PHYS_64BIT
  64         select ARCH_P3041
  65         select BOARD_LATE_INIT if CHAIN_OF_TRUST
  66
  67 config TARGET_P4080DS
  68         bool "Support P4080DS"
  69         select PHYS_64BIT
  70         select ARCH_P4080
  71         select BOARD_LATE_INIT if CHAIN_OF_TRUST
  72
  73 config TARGET_P5020DS
  74         bool "Support P5020DS"
  75         select PHYS_64BIT
  76         select ARCH_P5020
  77         select BOARD_LATE_INIT if CHAIN_OF_TRUST
  78
  79 config TARGET_P5040DS
  80         bool "Support P5040DS"
  81         select PHYS_64BIT
  82         select ARCH_P5040
  83         select BOARD_LATE_INIT if CHAIN_OF_TRUST
  84
  85 config TARGET_MPC8536DS
  86         bool "Support MPC8536DS"
  87         select ARCH_MPC8536
  88 # Use DDR3 controller with DDR2 DIMMs on this board
  89         select SYS_FSL_DDRC_GEN3
  90
  91 config TARGET_MPC8541CDS
  92         bool "Support MPC8541CDS"
  93         select ARCH_MPC8541
  94
  95 config TARGET_MPC8544DS
  96         bool "Support MPC8544DS"
  97         select ARCH_MPC8544
  98
  99 config TARGET_MPC8548CDS
 100         bool "Support MPC8548CDS"
 101         select ARCH_MPC8548
 102
 103 config TARGET_MPC8555CDS
 104         bool "Support MPC8555CDS"
 105         select ARCH_MPC8555
 106
 107 config TARGET_MPC8568MDS
 108         bool "Support MPC8568MDS"
 109         select ARCH_MPC8568
 110
 111 config TARGET_MPC8569MDS
 112         bool "Support MPC8569MDS"
 113         select ARCH_MPC8569
 114
 115 config TARGET_MPC8572DS
 116         bool "Support MPC8572DS"
 117         select ARCH_MPC8572
 118 # Use DDR3 controller with DDR2 DIMMs on this board
 119         select SYS_FSL_DDRC_GEN3
 120         imply SCSI
 121
 122 config TARGET_P1010RDB_PA
 123         bool "Support P1010RDB_PA"
 124         select ARCH_P1010
 125         select BOARD_LATE_INIT if CHAIN_OF_TRUST
 126         select SUPPORT_SPL
 127         select SUPPORT_TPL
 128         imply CMD_EEPROM
 129
 130 config TARGET_P1010RDB_PB
 131         bool "Support P1010RDB_PB"
 132         select ARCH_P1010
 133         select BOARD_LATE_INIT if CHAIN_OF_TRUST
 134         select SUPPORT_SPL
 135         select SUPPORT_TPL
 136         imply CMD_EEPROM
 137
 138 config TARGET_P1022DS
 139         bool "Support P1022DS"
 140         select ARCH_P1022
 141         select SUPPORT_SPL
 142         select SUPPORT_TPL
 143
 144 config TARGET_P1023RDB
 145         bool "Support P1023RDB"
 146         select ARCH_P1023
 147         imply CMD_EEPROM
 148
 149 config TARGET_P1020MBG
 150         bool "Support P1020MBG-PC"
 151         select SUPPORT_SPL
 152         select SUPPORT_TPL
 153         select ARCH_P1020
 154         imply CMD_EEPROM
 155
 156 config TARGET_P1020RDB_PC
 157         bool "Support P1020RDB-PC"
 158         select SUPPORT_SPL
 159         select SUPPORT_TPL
 160         select ARCH_P1020
 161         imply CMD_EEPROM
 162
 163 config TARGET_P1020RDB_PD
 164         bool "Support P1020RDB-PD"
 165         select SUPPORT_SPL
 166         select SUPPORT_TPL
 167         select ARCH_P1020
 168         imply CMD_EEPROM
 169
 170 config TARGET_P1020UTM
 171         bool "Support P1020UTM"
 172         select SUPPORT_SPL
 173         select SUPPORT_TPL
 174         select ARCH_P1020
 175         imply CMD_EEPROM
 176
 177 config TARGET_P1021RDB
 178         bool "Support P1021RDB"
 179         select SUPPORT_SPL
 180         select SUPPORT_TPL
 181         select ARCH_P1021
 182         imply CMD_EEPROM
 183
 184 config TARGET_P1024RDB
 185         bool "Support P1024RDB"
 186         select SUPPORT_SPL
 187         select SUPPORT_TPL
 188         select ARCH_P1024
 189         imply CMD_EEPROM
 190
 191 config TARGET_P1025RDB
 192         bool "Support P1025RDB"
 193         select SUPPORT_SPL
 194         select SUPPORT_TPL
 195         select ARCH_P1025
 196         imply CMD_EEPROM
 197
 198 config TARGET_P2020RDB
 199         bool "Support P2020RDB-PC"
 200         select SUPPORT_SPL
 201         select SUPPORT_TPL
 202         select ARCH_P2020
 203         imply CMD_EEPROM
 204
 205 config TARGET_P1_TWR
 206         bool "Support p1_twr"
 207         select ARCH_P1025
 208
 209 config TARGET_P2041RDB
 210         bool "Support P2041RDB"
 211         select ARCH_P2041
 212         select BOARD_LATE_INIT if CHAIN_OF_TRUST
 213         select PHYS_64BIT
 214
 215 config TARGET_QEMU_PPCE500
 216         bool "Support qemu-ppce500"
 217         select ARCH_QEMU_E500
 218         select PHYS_64BIT
 219
 220 config TARGET_T1024QDS
 221         bool "Support T1024QDS"
 222         select ARCH_T1024
 223         select BOARD_LATE_INIT if CHAIN_OF_TRUST
 224         select SUPPORT_SPL
 225         select PHYS_64BIT
 226         imply CMD_EEPROM
 227
 228 config TARGET_T1023RDB
 229         bool "Support T1023RDB"
 230         select ARCH_T1023
 231         select BOARD_LATE_INIT if CHAIN_OF_TRUST
 232         select SUPPORT_SPL
 233         select PHYS_64BIT
 234         imply CMD_EEPROM
 235
 236 config TARGET_T1024RDB
 237         bool "Support T1024RDB"
 238         select ARCH_T1024
 239         select BOARD_LATE_INIT if CHAIN_OF_TRUST
 240         select SUPPORT_SPL
 241         select PHYS_64BIT
 242         imply CMD_EEPROM
 243
 244 config TARGET_T1040QDS
 245         bool "Support T1040QDS"
 246         select ARCH_T1040
 247         select BOARD_LATE_INIT if CHAIN_OF_TRUST
 248         select PHYS_64BIT
 249         imply CMD_EEPROM
 250
 251 config TARGET_T1040RDB
 252         bool "Support T1040RDB"
 253         select ARCH_T1040
 254         select BOARD_LATE_INIT if CHAIN_OF_TRUST
 255         select SUPPORT_SPL
 256         select PHYS_64BIT
 257
 258 config TARGET_T1040D4RDB
 259         bool "Support T1040D4RDB"
 260         select ARCH_T1040
 261         select BOARD_LATE_INIT if CHAIN_OF_TRUST
 262         select SUPPORT_SPL
 263         select PHYS_64BIT
 264
 265 config TARGET_T1042RDB
 266         bool "Support T1042RDB"
 267         select ARCH_T1042
 268         select BOARD_LATE_INIT if CHAIN_OF_TRUST
 269         select SUPPORT_SPL
 270         select PHYS_64BIT
 271
 272 config TARGET_T1042D4RDB
 273         bool "Support T1042D4RDB"
 274         select ARCH_T1042
 275         select BOARD_LATE_INIT if CHAIN_OF_TRUST
 276         select SUPPORT_SPL
 277         select PHYS_64BIT
 278
 279 config TARGET_T1042RDB_PI
 280         bool "Support T1042RDB_PI"
 281         select ARCH_T1042
 282         select BOARD_LATE_INIT if CHAIN_OF_TRUST
 283         select SUPPORT_SPL
 284         select PHYS_64BIT
 285
 286 config TARGET_T2080QDS
 287         bool "Support T2080QDS"
 288         select ARCH_T2080
 289         select BOARD_LATE_INIT if CHAIN_OF_TRUST
 290         select SUPPORT_SPL
 291         select PHYS_64BIT
 292
 293 config TARGET_T2080RDB
 294         bool "Support T2080RDB"
 295         select ARCH_T2080
 296         select BOARD_LATE_INIT if CHAIN_OF_TRUST
 297         select SUPPORT_SPL
 298         select PHYS_64BIT
 299
 300 config TARGET_T2081QDS
 301         bool "Support T2081QDS"
 302         select ARCH_T2081
 303         select SUPPORT_SPL
 304         select PHYS_64BIT
 305
 306 config TARGET_T4160QDS
 307         bool "Support T4160QDS"
 308         select ARCH_T4160
 309         select BOARD_LATE_INIT if CHAIN_OF_TRUST
 310         select SUPPORT_SPL
 311         select PHYS_64BIT
 312
 313 config TARGET_T4160RDB
 314         bool "Support T4160RDB"
 315         select ARCH_T4160
 316         select SUPPORT_SPL
 317         select PHYS_64BIT
 318
 319 config TARGET_T4240QDS
 320         bool "Support T4240QDS"
 321         select ARCH_T4240
 322         select BOARD_LATE_INIT if CHAIN_OF_TRUST
 323         select SUPPORT_SPL
 324         select PHYS_64BIT
 325
 326 config TARGET_T4240RDB
 327         bool "Support T4240RDB"
 328         select ARCH_T4240
 329         select SUPPORT_SPL
 330         select PHYS_64BIT
 331
 332 config TARGET_CONTROLCENTERD
 333         bool "Support controlcenterd"
 334         select ARCH_P1022
 335
 336 config TARGET_KMP204X
 337         bool "Support kmp204x"
 338         select ARCH_P2041
 339         select PHYS_64BIT
 340         imply CMD_CRAMFS
 341         imply FS_CRAMFS
 342
 343 config TARGET_XPEDITE520X
 344         bool "Support xpedite520x"
 345         select ARCH_MPC8548
 346
 347 config TARGET_XPEDITE537X
 348         bool "Support xpedite537x"
 349         select ARCH_MPC8572
 350 # Use DDR3 controller with DDR2 DIMMs on this board
 351         select SYS_FSL_DDRC_GEN3
 352
 353 config TARGET_XPEDITE550X
 354         bool "Support xpedite550x"
 355         select ARCH_P2020
 356
 357 config TARGET_UCP1020
 358         bool "Support uCP1020"
 359         select ARCH_P1020
 360
 361 config TARGET_CYRUS_P5020
 362         bool "Support Varisys Cyrus P5020"
 363         select ARCH_P5020
 364         select PHYS_64BIT
 365
 366 config TARGET_CYRUS_P5040
 367          bool "Support Varisys Cyrus P5040"
 368         select ARCH_P5040
 369         select PHYS_64BIT
 370
 371 endchoice
 372
 373 config ARCH_B4420
 374         bool
 375         select E500MC
 376         select E6500
 377         select FSL_LAW
 378         select SYS_FSL_DDR_VER_47
 379         select SYS_FSL_ERRATUM_A004477
 380         select SYS_FSL_ERRATUM_A005871
 381         select SYS_FSL_ERRATUM_A006379
 382         select SYS_FSL_ERRATUM_A006384
 383         select SYS_FSL_ERRATUM_A006475
 384         select SYS_FSL_ERRATUM_A006593
 385         select SYS_FSL_ERRATUM_A007075
 386         select SYS_FSL_ERRATUM_A007186
 387         select SYS_FSL_ERRATUM_A007212
 388         select SYS_FSL_ERRATUM_A009942
 389         select SYS_FSL_HAS_DDR3
 390         select SYS_FSL_HAS_SEC
 391         select SYS_FSL_QORIQ_CHASSIS2
 392         select SYS_FSL_SEC_BE
 393         select SYS_FSL_SEC_COMPAT_4
 394         select SYS_PPC64
 395         select FSL_IFC
 396         imply CMD_EEPROM
 397
 398 config ARCH_B4860
 399         bool
 400         select E500MC
 401         select E6500
 402         select FSL_LAW
 403         select SYS_FSL_DDR_VER_47
 404         select SYS_FSL_ERRATUM_A004477
 405         select SYS_FSL_ERRATUM_A005871
 406         select SYS_FSL_ERRATUM_A006379
 407         select SYS_FSL_ERRATUM_A006384
 408         select SYS_FSL_ERRATUM_A006475
 409         select SYS_FSL_ERRATUM_A006593
 410         select SYS_FSL_ERRATUM_A007075
 411         select SYS_FSL_ERRATUM_A007186
 412         select SYS_FSL_ERRATUM_A007212
 413         select SYS_FSL_ERRATUM_A007907
 414         select SYS_FSL_ERRATUM_A009942
 415         select SYS_FSL_HAS_DDR3
 416         select SYS_FSL_HAS_SEC
 417         select SYS_FSL_QORIQ_CHASSIS2
 418         select SYS_FSL_SEC_BE
 419         select SYS_FSL_SEC_COMPAT_4
 420         select SYS_PPC64
 421         select FSL_IFC
 422         imply CMD_EEPROM
 423
 424 config ARCH_BSC9131
 425         bool
 426         select FSL_LAW
 427         select SYS_FSL_DDR_VER_44
 428         select SYS_FSL_ERRATUM_A004477
 429         select SYS_FSL_ERRATUM_A005125
 430         select SYS_FSL_ERRATUM_ESDHC111
 431         select SYS_FSL_HAS_DDR3
 432         select SYS_FSL_HAS_SEC
 433         select SYS_FSL_SEC_BE
 434         select SYS_FSL_SEC_COMPAT_4
 435         select FSL_IFC
 436         imply CMD_EEPROM
 437
 438 config ARCH_BSC9132
 439         bool
 440         select FSL_LAW
 441         select SYS_FSL_DDR_VER_46
 442         select SYS_FSL_ERRATUM_A004477
 443         select SYS_FSL_ERRATUM_A005125
 444         select SYS_FSL_ERRATUM_A005434
 445         select SYS_FSL_ERRATUM_ESDHC111
 446         select SYS_FSL_ERRATUM_I2C_A004447
 447         select SYS_FSL_ERRATUM_IFC_A002769
 448         select SYS_FSL_HAS_DDR3
 449         select SYS_FSL_HAS_SEC
 450         select SYS_FSL_SEC_BE
 451         select SYS_FSL_SEC_COMPAT_4
 452         select SYS_PPC_E500_USE_DEBUG_TLB
 453         select FSL_IFC
 454         imply CMD_EEPROM
 455
 456 config ARCH_C29X
 457         bool
 458         select FSL_LAW
 459         select SYS_FSL_DDR_VER_46
 460         select SYS_FSL_ERRATUM_A005125
 461         select SYS_FSL_ERRATUM_ESDHC111
 462         select SYS_FSL_HAS_DDR3
 463         select SYS_FSL_HAS_SEC
 464         select SYS_FSL_SEC_BE
 465         select SYS_FSL_SEC_COMPAT_6
 466         select SYS_PPC_E500_USE_DEBUG_TLB
 467         select FSL_IFC
 468
 469 config ARCH_MPC8536
 470         bool
 471         select FSL_LAW
 472         select SYS_FSL_ERRATUM_A004508
 473         select SYS_FSL_ERRATUM_A005125
 474         select SYS_FSL_HAS_DDR2
 475         select SYS_FSL_HAS_DDR3
 476         select SYS_FSL_HAS_SEC
 477         select SYS_FSL_SEC_BE
 478         select SYS_FSL_SEC_COMPAT_2
 479         select SYS_PPC_E500_USE_DEBUG_TLB
 480         select FSL_ELBC
 481
 482 config ARCH_MPC8540
 483         bool
 484         select FSL_LAW
 485         select SYS_FSL_HAS_DDR1
 486
 487 config ARCH_MPC8541
 488         bool
 489         select FSL_LAW
 490         select SYS_FSL_HAS_DDR1
 491         select SYS_FSL_HAS_SEC
 492         select SYS_FSL_SEC_BE
 493         select SYS_FSL_SEC_COMPAT_2
 494
 495 config ARCH_MPC8544
 496         bool
 497         select FSL_LAW
 498         select SYS_FSL_ERRATUM_A005125
 499         select SYS_FSL_HAS_DDR2
 500         select SYS_FSL_HAS_SEC
 501         select SYS_FSL_SEC_BE
 502         select SYS_FSL_SEC_COMPAT_2
 503         select SYS_PPC_E500_USE_DEBUG_TLB
 504         select FSL_ELBC
 505
 506 config ARCH_MPC8548
 507         bool
 508         select FSL_LAW
 509         select SYS_FSL_ERRATUM_A005125
 510         select SYS_FSL_ERRATUM_NMG_DDR120
 511         select SYS_FSL_ERRATUM_NMG_LBC103
 512         select SYS_FSL_ERRATUM_NMG_ETSEC129
 513         select SYS_FSL_ERRATUM_I2C_A004447
 514         select SYS_FSL_HAS_DDR2
 515         select SYS_FSL_HAS_DDR1
 516         select SYS_FSL_HAS_SEC
 517         select SYS_FSL_SEC_BE
 518         select SYS_FSL_SEC_COMPAT_2
 519         select SYS_PPC_E500_USE_DEBUG_TLB
 520
 521 config ARCH_MPC8555
 522         bool
 523         select FSL_LAW
 524         select SYS_FSL_HAS_DDR1
 525         select SYS_FSL_HAS_SEC
 526         select SYS_FSL_SEC_BE
 527         select SYS_FSL_SEC_COMPAT_2
 528
 529 config ARCH_MPC8560
 530         bool
 531         select FSL_LAW
 532         select SYS_FSL_HAS_DDR1
 533
 534 config ARCH_MPC8568
 535         bool
 536         select FSL_LAW
 537         select SYS_FSL_HAS_DDR2
 538         select SYS_FSL_HAS_SEC
 539         select SYS_FSL_SEC_BE
 540         select SYS_FSL_SEC_COMPAT_2
 541
 542 config ARCH_MPC8569
 543         bool
 544         select FSL_LAW
 545         select SYS_FSL_ERRATUM_A004508
 546         select SYS_FSL_ERRATUM_A005125
 547         select SYS_FSL_HAS_DDR3
 548         select SYS_FSL_HAS_SEC
 549         select SYS_FSL_SEC_BE
 550         select SYS_FSL_SEC_COMPAT_2
 551         select FSL_ELBC
 552
 553 config ARCH_MPC8572
 554         bool
 555         select FSL_LAW
 556         select SYS_FSL_ERRATUM_A004508
 557         select SYS_FSL_ERRATUM_A005125
 558         select SYS_FSL_ERRATUM_DDR_115
 559         select SYS_FSL_ERRATUM_DDR111_DDR134
 560         select SYS_FSL_HAS_DDR2
 561         select SYS_FSL_HAS_DDR3
 562         select SYS_FSL_HAS_SEC
 563         select SYS_FSL_SEC_BE
 564         select SYS_FSL_SEC_COMPAT_2
 565         select SYS_PPC_E500_USE_DEBUG_TLB
 566         select FSL_ELBC
 567
 568 config ARCH_P1010
 569         bool
 570         select FSL_LAW
 571         select SYS_FSL_ERRATUM_A004477
 572         select SYS_FSL_ERRATUM_A004508
 573         select SYS_FSL_ERRATUM_A005125
 574         select SYS_FSL_ERRATUM_A006261
 575         select SYS_FSL_ERRATUM_A007075
 576         select SYS_FSL_ERRATUM_ESDHC111
 577         select SYS_FSL_ERRATUM_I2C_A004447
 578         select SYS_FSL_ERRATUM_IFC_A002769
 579         select SYS_FSL_ERRATUM_P1010_A003549
 580         select SYS_FSL_ERRATUM_SEC_A003571
 581         select SYS_FSL_ERRATUM_IFC_A003399
 582         select SYS_FSL_HAS_DDR3
 583         select SYS_FSL_HAS_SEC
 584         select SYS_FSL_SEC_BE
 585         select SYS_FSL_SEC_COMPAT_4
 586         select SYS_PPC_E500_USE_DEBUG_TLB
 587         select FSL_IFC
 588         imply CMD_EEPROM
 589
 590 config ARCH_P1011
 591         bool
 592         select FSL_LAW
 593         select SYS_FSL_ERRATUM_A004508
 594         select SYS_FSL_ERRATUM_A005125
 595         select SYS_FSL_ERRATUM_ELBC_A001
 596         select SYS_FSL_ERRATUM_ESDHC111
 597         select SYS_FSL_HAS_DDR3
 598         select SYS_FSL_HAS_SEC
 599         select SYS_FSL_SEC_BE
 600         select SYS_FSL_SEC_COMPAT_2
 601         select SYS_PPC_E500_USE_DEBUG_TLB
 602         select FSL_ELBC
 603
 604 config ARCH_P1020
 605         bool
 606         select FSL_LAW
 607         select SYS_FSL_ERRATUM_A004508
 608         select SYS_FSL_ERRATUM_A005125
 609         select SYS_FSL_ERRATUM_ELBC_A001
 610         select SYS_FSL_ERRATUM_ESDHC111
 611         select SYS_FSL_HAS_DDR3
 612         select SYS_FSL_HAS_SEC
 613         select SYS_FSL_SEC_BE
 614         select SYS_FSL_SEC_COMPAT_2
 615         select SYS_PPC_E500_USE_DEBUG_TLB
 616         select FSL_ELBC
 617
 618 config ARCH_P1021
 619         bool
 620         select FSL_LAW
 621         select SYS_FSL_ERRATUM_A004508
 622         select SYS_FSL_ERRATUM_A005125
 623         select SYS_FSL_ERRATUM_ELBC_A001
 624         select SYS_FSL_ERRATUM_ESDHC111
 625         select SYS_FSL_HAS_DDR3
 626         select SYS_FSL_HAS_SEC
 627         select SYS_FSL_SEC_BE
 628         select SYS_FSL_SEC_COMPAT_2
 629         select SYS_PPC_E500_USE_DEBUG_TLB
 630         select FSL_ELBC
 631
 632 config ARCH_P1022
 633         bool
 634         select FSL_LAW
 635         select SYS_FSL_ERRATUM_A004477
 636         select SYS_FSL_ERRATUM_A004508
 637         select SYS_FSL_ERRATUM_A005125
 638         select SYS_FSL_ERRATUM_ELBC_A001
 639         select SYS_FSL_ERRATUM_ESDHC111
 640         select SYS_FSL_ERRATUM_SATA_A001
 641         select SYS_FSL_HAS_DDR3
 642         select SYS_FSL_HAS_SEC
 643         select SYS_FSL_SEC_BE
 644         select SYS_FSL_SEC_COMPAT_2
 645         select SYS_PPC_E500_USE_DEBUG_TLB
 646         select FSL_ELBC
 647
 648 config ARCH_P1023
 649         bool
 650         select FSL_LAW
 651         select SYS_FSL_ERRATUM_A004508
 652         select SYS_FSL_ERRATUM_A005125
 653         select SYS_FSL_ERRATUM_I2C_A004447
 654         select SYS_FSL_HAS_DDR3
 655         select SYS_FSL_HAS_SEC
 656         select SYS_FSL_SEC_BE
 657         select SYS_FSL_SEC_COMPAT_4
 658         select FSL_ELBC
 659
 660 config ARCH_P1024
 661         bool
 662         select FSL_LAW
 663         select SYS_FSL_ERRATUM_A004508
 664         select SYS_FSL_ERRATUM_A005125
 665         select SYS_FSL_ERRATUM_ELBC_A001
 666         select SYS_FSL_ERRATUM_ESDHC111
 667         select SYS_FSL_HAS_DDR3
 668         select SYS_FSL_HAS_SEC
 669         select SYS_FSL_SEC_BE
 670         select SYS_FSL_SEC_COMPAT_2
 671         select SYS_PPC_E500_USE_DEBUG_TLB
 672         select FSL_ELBC
 673         imply CMD_EEPROM
 674
 675 config ARCH_P1025
 676         bool
 677         select FSL_LAW
 678         select SYS_FSL_ERRATUM_A004508
 679         select SYS_FSL_ERRATUM_A005125
 680         select SYS_FSL_ERRATUM_ELBC_A001
 681         select SYS_FSL_ERRATUM_ESDHC111
 682         select SYS_FSL_HAS_DDR3
 683         select SYS_FSL_HAS_SEC
 684         select SYS_FSL_SEC_BE
 685         select SYS_FSL_SEC_COMPAT_2
 686         select SYS_PPC_E500_USE_DEBUG_TLB
 687         select FSL_ELBC
 688
 689 config ARCH_P2020
 690         bool
 691         select FSL_LAW
 692         select SYS_FSL_ERRATUM_A004477
 693         select SYS_FSL_ERRATUM_A004508
 694         select SYS_FSL_ERRATUM_A005125
 695         select SYS_FSL_ERRATUM_ESDHC111
 696         select SYS_FSL_ERRATUM_ESDHC_A001
 697         select SYS_FSL_HAS_DDR3
 698         select SYS_FSL_HAS_SEC
 699         select SYS_FSL_SEC_BE
 700         select SYS_FSL_SEC_COMPAT_2
 701         select SYS_PPC_E500_USE_DEBUG_TLB
 702         select FSL_ELBC
 703         imply CMD_EEPROM
 704
 705 config ARCH_P2041
 706         bool
 707         select E500MC
 708         select FSL_LAW
 709         select SYS_FSL_ERRATUM_A004510
 710         select SYS_FSL_ERRATUM_A004849
 711         select SYS_FSL_ERRATUM_A006261
 712         select SYS_FSL_ERRATUM_CPU_A003999
 713         select SYS_FSL_ERRATUM_DDR_A003
 714         select SYS_FSL_ERRATUM_DDR_A003474
 715         select SYS_FSL_ERRATUM_ESDHC111
 716         select SYS_FSL_ERRATUM_I2C_A004447
 717         select SYS_FSL_ERRATUM_NMG_CPU_A011
 718         select SYS_FSL_ERRATUM_SRIO_A004034
 719         select SYS_FSL_ERRATUM_USB14
 720         select SYS_FSL_HAS_DDR3
 721         select SYS_FSL_HAS_SEC
 722         select SYS_FSL_QORIQ_CHASSIS1
 723         select SYS_FSL_SEC_BE
 724         select SYS_FSL_SEC_COMPAT_4
 725         select FSL_ELBC
 726
 727 config ARCH_P3041
 728         bool
 729         select E500MC
 730         select FSL_LAW
 731         select SYS_FSL_DDR_VER_44
 732         select SYS_FSL_ERRATUM_A004510
 733         select SYS_FSL_ERRATUM_A004849
 734         select SYS_FSL_ERRATUM_A005812
 735         select SYS_FSL_ERRATUM_A006261
 736         select SYS_FSL_ERRATUM_CPU_A003999
 737         select SYS_FSL_ERRATUM_DDR_A003
 738         select SYS_FSL_ERRATUM_DDR_A003474
 739         select SYS_FSL_ERRATUM_ESDHC111
 740         select SYS_FSL_ERRATUM_I2C_A004447
 741         select SYS_FSL_ERRATUM_NMG_CPU_A011
 742         select SYS_FSL_ERRATUM_SRIO_A004034
 743         select SYS_FSL_ERRATUM_USB14
 744         select SYS_FSL_HAS_DDR3
 745         select SYS_FSL_HAS_SEC
 746         select SYS_FSL_QORIQ_CHASSIS1
 747         select SYS_FSL_SEC_BE
 748         select SYS_FSL_SEC_COMPAT_4
 749         select FSL_ELBC
 750
 751 config ARCH_P4080
 752         bool
 753         select E500MC
 754         select FSL_LAW
 755         select SYS_FSL_DDR_VER_44
 756         select SYS_FSL_ERRATUM_A004510
 757         select SYS_FSL_ERRATUM_A004580
 758         select SYS_FSL_ERRATUM_A004849
 759         select SYS_FSL_ERRATUM_A005812
 760         select SYS_FSL_ERRATUM_A007075
 761         select SYS_FSL_ERRATUM_CPC_A002
 762         select SYS_FSL_ERRATUM_CPC_A003
 763         select SYS_FSL_ERRATUM_CPU_A003999
 764         select SYS_FSL_ERRATUM_DDR_A003
 765         select SYS_FSL_ERRATUM_DDR_A003474
 766         select SYS_FSL_ERRATUM_ELBC_A001
 767         select SYS_FSL_ERRATUM_ESDHC111
 768         select SYS_FSL_ERRATUM_ESDHC13
 769         select SYS_FSL_ERRATUM_ESDHC135
 770         select SYS_FSL_ERRATUM_I2C_A004447
 771         select SYS_FSL_ERRATUM_NMG_CPU_A011
 772         select SYS_FSL_ERRATUM_SRIO_A004034
 773         select SYS_P4080_ERRATUM_CPU22
 774         select SYS_P4080_ERRATUM_PCIE_A003
 775         select SYS_P4080_ERRATUM_SERDES8
 776         select SYS_P4080_ERRATUM_SERDES9
 777         select SYS_P4080_ERRATUM_SERDES_A001
 778         select SYS_P4080_ERRATUM_SERDES_A005
 779         select SYS_FSL_HAS_DDR3
 780         select SYS_FSL_HAS_SEC
 781         select SYS_FSL_QORIQ_CHASSIS1
 782         select SYS_FSL_SEC_BE
 783         select SYS_FSL_SEC_COMPAT_4
 784         select FSL_ELBC
 785
 786 config ARCH_P5020
 787         bool
 788         select E500MC
 789         select FSL_LAW
 790         select SYS_FSL_DDR_VER_44
 791         select SYS_FSL_ERRATUM_A004510
 792         select SYS_FSL_ERRATUM_A006261
 793         select SYS_FSL_ERRATUM_DDR_A003
 794         select SYS_FSL_ERRATUM_DDR_A003474
 795         select SYS_FSL_ERRATUM_ESDHC111
 796         select SYS_FSL_ERRATUM_I2C_A004447
 797         select SYS_FSL_ERRATUM_SRIO_A004034
 798         select SYS_FSL_ERRATUM_USB14
 799         select SYS_FSL_HAS_DDR3
 800         select SYS_FSL_HAS_SEC
 801         select SYS_FSL_QORIQ_CHASSIS1
 802         select SYS_FSL_SEC_BE
 803         select SYS_FSL_SEC_COMPAT_4
 804         select SYS_PPC64
 805         select FSL_ELBC
 806
 807 config ARCH_P5040
 808         bool
 809         select E500MC
 810         select FSL_LAW
 811         select SYS_FSL_DDR_VER_44
 812         select SYS_FSL_ERRATUM_A004510
 813         select SYS_FSL_ERRATUM_A004699
 814         select SYS_FSL_ERRATUM_A005812
 815         select SYS_FSL_ERRATUM_A006261
 816         select SYS_FSL_ERRATUM_DDR_A003
 817         select SYS_FSL_ERRATUM_DDR_A003474
 818         select SYS_FSL_ERRATUM_ESDHC111
 819         select SYS_FSL_ERRATUM_USB14
 820         select SYS_FSL_HAS_DDR3
 821         select SYS_FSL_HAS_SEC
 822         select SYS_FSL_QORIQ_CHASSIS1
 823         select SYS_FSL_SEC_BE
 824         select SYS_FSL_SEC_COMPAT_4
 825         select SYS_PPC64
 826         select FSL_ELBC
 827
 828 config ARCH_QEMU_E500
 829         bool
 830
 831 config ARCH_T1023
 832         bool
 833         select E500MC
 834         select FSL_LAW
 835         select SYS_FSL_DDR_VER_50
 836         select SYS_FSL_ERRATUM_A008378
 837         select SYS_FSL_ERRATUM_A009663
 838         select SYS_FSL_ERRATUM_A009942
 839         select SYS_FSL_ERRATUM_ESDHC111
 840         select SYS_FSL_HAS_DDR3
 841         select SYS_FSL_HAS_DDR4
 842         select SYS_FSL_HAS_SEC
 843         select SYS_FSL_QORIQ_CHASSIS2
 844         select SYS_FSL_SEC_BE
 845         select SYS_FSL_SEC_COMPAT_5
 846         select FSL_IFC
 847         imply CMD_EEPROM
 848
 849 config ARCH_T1024
 850         bool
 851         select E500MC
 852         select FSL_LAW
 853         select SYS_FSL_DDR_VER_50
 854         select SYS_FSL_ERRATUM_A008378
 855         select SYS_FSL_ERRATUM_A009663
 856         select SYS_FSL_ERRATUM_A009942
 857         select SYS_FSL_ERRATUM_ESDHC111
 858         select SYS_FSL_HAS_DDR3
 859         select SYS_FSL_HAS_DDR4
 860         select SYS_FSL_HAS_SEC
 861         select SYS_FSL_QORIQ_CHASSIS2
 862         select SYS_FSL_SEC_BE
 863         select SYS_FSL_SEC_COMPAT_5
 864         select FSL_IFC
 865         imply CMD_EEPROM
 866
 867 config ARCH_T1040
 868         bool
 869         select E500MC
 870         select FSL_LAW
 871         select SYS_FSL_DDR_VER_50
 872         select SYS_FSL_ERRATUM_A008044
 873         select SYS_FSL_ERRATUM_A008378
 874         select SYS_FSL_ERRATUM_A009663
 875         select SYS_FSL_ERRATUM_A009942
 876         select SYS_FSL_ERRATUM_ESDHC111
 877         select SYS_FSL_HAS_DDR3
 878         select SYS_FSL_HAS_DDR4
 879         select SYS_FSL_HAS_SEC
 880         select SYS_FSL_QORIQ_CHASSIS2
 881         select SYS_FSL_SEC_BE
 882         select SYS_FSL_SEC_COMPAT_5
 883         select FSL_IFC
 884
 885 config ARCH_T1042
 886         bool
 887         select E500MC
 888         select FSL_LAW
 889         select SYS_FSL_DDR_VER_50
 890         select SYS_FSL_ERRATUM_A008044
 891         select SYS_FSL_ERRATUM_A008378
 892         select SYS_FSL_ERRATUM_A009663
 893         select SYS_FSL_ERRATUM_A009942
 894         select SYS_FSL_ERRATUM_ESDHC111
 895         select SYS_FSL_HAS_DDR3
 896         select SYS_FSL_HAS_DDR4
 897         select SYS_FSL_HAS_SEC
 898         select SYS_FSL_QORIQ_CHASSIS2
 899         select SYS_FSL_SEC_BE
 900         select SYS_FSL_SEC_COMPAT_5
 901         select FSL_IFC
 902
 903 config ARCH_T2080
 904         bool
 905         select E500MC
 906         select E6500
 907         select FSL_LAW
 908         select SYS_FSL_DDR_VER_47
 909         select SYS_FSL_ERRATUM_A006379
 910         select SYS_FSL_ERRATUM_A006593
 911         select SYS_FSL_ERRATUM_A007186
 912         select SYS_FSL_ERRATUM_A007212
 913         select SYS_FSL_ERRATUM_A007815
 914         select SYS_FSL_ERRATUM_A007907
 915         select SYS_FSL_ERRATUM_A009942
 916         select SYS_FSL_ERRATUM_ESDHC111
 917         select SYS_FSL_HAS_DDR3
 918         select SYS_FSL_HAS_SEC
 919         select SYS_FSL_QORIQ_CHASSIS2
 920         select SYS_FSL_SEC_BE
 921         select SYS_FSL_SEC_COMPAT_4
 922         select SYS_PPC64
 923         select FSL_IFC
 924
 925 config ARCH_T2081
 926         bool
 927         select E500MC
 928         select E6500
 929         select FSL_LAW
 930         select SYS_FSL_DDR_VER_47
 931         select SYS_FSL_ERRATUM_A006379
 932         select SYS_FSL_ERRATUM_A006593
 933         select SYS_FSL_ERRATUM_A007186
 934         select SYS_FSL_ERRATUM_A007212
 935         select SYS_FSL_ERRATUM_A009942
 936         select SYS_FSL_ERRATUM_ESDHC111
 937         select SYS_FSL_HAS_DDR3
 938         select SYS_FSL_HAS_SEC
 939         select SYS_FSL_QORIQ_CHASSIS2
 940         select SYS_FSL_SEC_BE
 941         select SYS_FSL_SEC_COMPAT_4
 942         select SYS_PPC64
 943         select FSL_IFC
 944
 945 config ARCH_T4160
 946         bool
 947         select E500MC
 948         select E6500
 949         select FSL_LAW
 950         select SYS_FSL_DDR_VER_47
 951         select SYS_FSL_ERRATUM_A004468
 952         select SYS_FSL_ERRATUM_A005871
 953         select SYS_FSL_ERRATUM_A006379
 954         select SYS_FSL_ERRATUM_A006593
 955         select SYS_FSL_ERRATUM_A007186
 956         select SYS_FSL_ERRATUM_A007798
 957         select SYS_FSL_ERRATUM_A009942
 958         select SYS_FSL_HAS_DDR3
 959         select SYS_FSL_HAS_SEC
 960         select SYS_FSL_QORIQ_CHASSIS2
 961         select SYS_FSL_SEC_BE
 962         select SYS_FSL_SEC_COMPAT_4
 963         select SYS_PPC64
 964         select FSL_IFC
 965
 966 config ARCH_T4240
 967         bool
 968         select E500MC
 969         select E6500
 970         select FSL_LAW
 971         select SYS_FSL_DDR_VER_47
 972         select SYS_FSL_ERRATUM_A004468
 973         select SYS_FSL_ERRATUM_A005871
 974         select SYS_FSL_ERRATUM_A006261
 975         select SYS_FSL_ERRATUM_A006379
 976         select SYS_FSL_ERRATUM_A006593
 977         select SYS_FSL_ERRATUM_A007186
 978         select SYS_FSL_ERRATUM_A007798
 979         select SYS_FSL_ERRATUM_A007815
 980         select SYS_FSL_ERRATUM_A007907
 981         select SYS_FSL_ERRATUM_A009942
 982         select SYS_FSL_HAS_DDR3
 983         select SYS_FSL_HAS_SEC
 984         select SYS_FSL_QORIQ_CHASSIS2
 985         select SYS_FSL_SEC_BE
 986         select SYS_FSL_SEC_COMPAT_4
 987         select SYS_PPC64
 988         select FSL_IFC
 989
 990 config BOOKE
 991         bool
 992         default y
 993
 994 config E500
 995         bool
 996         default y
 997         help
 998                 Enable PowerPC E500 cores, including e500v1, e500v2, e500mc
 999
1000 config E500MC
1001         bool
1002         help
1003                 Enble PowerPC E500MC core
1004
1005 config E6500
1006         bool
1007         help
1008                 Enable PowerPC E6500 core
1009
1010 config FSL_LAW
1011         bool
1012         help
1013                 Use Freescale common code for Local Access Window
1014
1015 config SECURE_BOOT
1016         bool    "Secure Boot"
1017         help
1018                 Enable Freescale Secure Boot feature. Normally selected
1019                 by defconfig. If unsure, do not change.
1020
1021 config MAX_CPUS
1022         int "Maximum number of CPUs permitted for MPC85xx"
1023         default 12 if ARCH_T4240
1024         default 8 if ARCH_P4080 || \
1025                      ARCH_T4160
1026         default 4 if ARCH_B4860 || \
1027                      ARCH_P2041 || \
1028                      ARCH_P3041 || \
1029                      ARCH_P5040 || \
1030                      ARCH_T1040 || \
1031                      ARCH_T1042 || \
1032                      ARCH_T2080 || \
1033                      ARCH_T2081
1034         default 2 if ARCH_B4420 || \
1035                      ARCH_BSC9132 || \
1036                      ARCH_MPC8572 || \
1037                      ARCH_P1020 || \
1038                      ARCH_P1021 || \
1039                      ARCH_P1022 || \
1040                      ARCH_P1023 || \
1041                      ARCH_P1024 || \
1042                      ARCH_P1025 || \
1043                      ARCH_P2020 || \
1044                      ARCH_P5020 || \
1045                      ARCH_T1023 || \
1046                      ARCH_T1024
1047         default 1
1048         help
1049           Set this number to the maximum number of possible CPUs in the SoC.
1050           SoCs may have multiple clusters with each cluster may have multiple
1051           ports. If some ports are reserved but higher ports are used for
1052           cores, count the reserved ports. This will allocate enough memory
1053           in spin table to properly handle all cores.
1054
1055 config SYS_CCSRBAR_DEFAULT
1056         hex "Default CCSRBAR address"
1057         default 0xff700000 if   ARCH_BSC9131    || \
1058                                 ARCH_BSC9132    || \
1059                                 ARCH_C29X       || \
1060                                 ARCH_MPC8536    || \
1061                                 ARCH_MPC8540    || \
1062                                 ARCH_MPC8541    || \
1063                                 ARCH_MPC8544    || \
1064                                 ARCH_MPC8548    || \
1065                                 ARCH_MPC8555    || \
1066                                 ARCH_MPC8560    || \
1067                                 ARCH_MPC8568    || \
1068                                 ARCH_MPC8569    || \
1069                                 ARCH_MPC8572    || \
1070                                 ARCH_P1010      || \
1071                                 ARCH_P1011      || \
1072                                 ARCH_P1020      || \
1073                                 ARCH_P1021      || \
1074                                 ARCH_P1022      || \
1075                                 ARCH_P1024      || \
1076                                 ARCH_P1025      || \
1077                                 ARCH_P2020
1078         default 0xff600000 if   ARCH_P1023
1079         default 0xfe000000 if   ARCH_B4420      || \
1080                                 ARCH_B4860      || \
1081                                 ARCH_P2041      || \
1082                                 ARCH_P3041      || \
1083                                 ARCH_P4080      || \
1084                                 ARCH_P5020      || \
1085                                 ARCH_P5040      || \
1086                                 ARCH_T1023      || \
1087                                 ARCH_T1024      || \
1088                                 ARCH_T1040      || \
1089                                 ARCH_T1042      || \
1090                                 ARCH_T2080      || \
1091                                 ARCH_T2081      || \
1092                                 ARCH_T4160      || \
1093                                 ARCH_T4240
1094         default 0xe0000000 if ARCH_QEMU_E500
1095         help
1096                 Default value of CCSRBAR comes from power-on-reset. It
1097                 is fixed on each SoC. Some SoCs can have different value
1098                 if changed by pre-boot regime. The value here must match
1099                 the current value in SoC. If not sure, do not change.
1100
1101 config SYS_FSL_ERRATUM_A004468
1102         bool
1103
1104 config SYS_FSL_ERRATUM_A004477
1105         bool
1106
1107 config SYS_FSL_ERRATUM_A004508
1108         bool
1109
1110 config SYS_FSL_ERRATUM_A004580
1111         bool
1112
1113 config SYS_FSL_ERRATUM_A004699
1114         bool
1115
1116 config SYS_FSL_ERRATUM_A004849
1117         bool
1118
1119 config SYS_FSL_ERRATUM_A004510
1120         bool
1121
1122 config SYS_FSL_ERRATUM_A004510_SVR_REV
1123         hex
1124         depends on SYS_FSL_ERRATUM_A004510
1125         default 0x20 if ARCH_P4080
1126         default 0x10
1127
1128 config SYS_FSL_ERRATUM_A004510_SVR_REV2
1129         hex
1130         depends on (SYS_FSL_ERRATUM_A004510 && (ARCH_P2041 || ARCH_P3041))
1131         default 0x11
1132
1133 config SYS_FSL_ERRATUM_A005125
1134         bool
1135
1136 config SYS_FSL_ERRATUM_A005434
1137         bool
1138
1139 config SYS_FSL_ERRATUM_A005812
1140         bool
1141
1142 config SYS_FSL_ERRATUM_A005871
1143         bool
1144
1145 config SYS_FSL_ERRATUM_A006261
1146         bool
1147
1148 config SYS_FSL_ERRATUM_A006379
1149         bool
1150
1151 config SYS_FSL_ERRATUM_A006384
1152         bool
1153
1154 config SYS_FSL_ERRATUM_A006475
1155         bool
1156
1157 config SYS_FSL_ERRATUM_A006593
1158         bool
1159
1160 config SYS_FSL_ERRATUM_A007075
1161         bool
1162
1163 config SYS_FSL_ERRATUM_A007186
1164         bool
1165
1166 config SYS_FSL_ERRATUM_A007212
1167         bool
1168
1169 config SYS_FSL_ERRATUM_A007815
1170         bool
1171
1172 config SYS_FSL_ERRATUM_A007798
1173         bool
1174
1175 config SYS_FSL_ERRATUM_A007907
1176         bool
1177
1178 config SYS_FSL_ERRATUM_A008044
1179         bool
1180
1181 config SYS_FSL_ERRATUM_CPC_A002
1182         bool
1183
1184 config SYS_FSL_ERRATUM_CPC_A003
1185         bool
1186
1187 config SYS_FSL_ERRATUM_CPU_A003999
1188         bool
1189
1190 config SYS_FSL_ERRATUM_ELBC_A001
1191         bool
1192
1193 config SYS_FSL_ERRATUM_I2C_A004447
1194         bool
1195
1196 config SYS_FSL_A004447_SVR_REV
1197         hex
1198         depends on SYS_FSL_ERRATUM_I2C_A004447
1199         default 0x00 if ARCH_MPC8548
1200         default 0x10 if ARCH_P1010
1201         default 0x11 if ARCH_P1023 || ARCH_P2041 || ARCH_BSC9132
1202         default 0x20 if ARCH_P3041 || ARCH_P4080 || ARCH_P5020
1203
1204 config SYS_FSL_ERRATUM_IFC_A002769
1205         bool
1206
1207 config SYS_FSL_ERRATUM_IFC_A003399
1208         bool
1209
1210 config SYS_FSL_ERRATUM_NMG_CPU_A011
1211         bool
1212
1213 config SYS_FSL_ERRATUM_NMG_ETSEC129
1214         bool
1215
1216 config SYS_FSL_ERRATUM_NMG_LBC103
1217         bool
1218
1219 config SYS_FSL_ERRATUM_P1010_A003549
1220         bool
1221
1222 config SYS_FSL_ERRATUM_SATA_A001
1223         bool
1224
1225 config SYS_FSL_ERRATUM_SEC_A003571
1226         bool
1227
1228 config SYS_FSL_ERRATUM_SRIO_A004034
1229         bool
1230
1231 config SYS_FSL_ERRATUM_USB14
1232         bool
1233
1234 config SYS_P4080_ERRATUM_CPU22
1235         bool
1236
1237 config SYS_P4080_ERRATUM_PCIE_A003
1238         bool
1239
1240 config SYS_P4080_ERRATUM_SERDES8
1241         bool
1242
1243 config SYS_P4080_ERRATUM_SERDES9
1244         bool
1245
1246 config SYS_P4080_ERRATUM_SERDES_A001
1247         bool
1248
1249 config SYS_P4080_ERRATUM_SERDES_A005
1250         bool
1251
1252 config SYS_FSL_QORIQ_CHASSIS1
1253         bool
1254
1255 config SYS_FSL_QORIQ_CHASSIS2
1256         bool
1257
1258 config SYS_FSL_NUM_LAWS
1259         int "Number of local access windows"
1260         depends on FSL_LAW
1261         default 32 if   ARCH_B4420      || \
1262                         ARCH_B4860      || \
1263                         ARCH_P2041      || \
1264                         ARCH_P3041      || \
1265                         ARCH_P4080      || \
1266                         ARCH_P5020      || \
1267                         ARCH_P5040      || \
1268                         ARCH_T2080      || \
1269                         ARCH_T2081      || \
1270                         ARCH_T4160      || \
1271                         ARCH_T4240
1272         default 16 if   ARCH_T1023      || \
1273                         ARCH_T1024      || \
1274                         ARCH_T1040      || \
1275                         ARCH_T1042
1276         default 12 if   ARCH_BSC9131    || \
1277                         ARCH_BSC9132    || \
1278                         ARCH_C29X       || \
1279                         ARCH_MPC8536    || \
1280                         ARCH_MPC8572    || \
1281                         ARCH_P1010      || \
1282                         ARCH_P1011      || \
1283                         ARCH_P1020      || \
1284                         ARCH_P1021      || \
1285                         ARCH_P1022      || \
1286                         ARCH_P1023      || \
1287                         ARCH_P1024      || \
1288                         ARCH_P1025      || \
1289                         ARCH_P2020
1290         default 10 if   ARCH_MPC8544    || \
1291                         ARCH_MPC8548    || \
1292                         ARCH_MPC8568    || \
1293                         ARCH_MPC8569
1294         default 8 if    ARCH_MPC8540    || \
1295                         ARCH_MPC8541    || \
1296                         ARCH_MPC8555    || \
1297                         ARCH_MPC8560
1298         help
1299                 Number of local access windows. This is fixed per SoC.
1300                 If not sure, do not change.
1301
1302 config SYS_FSL_THREADS_PER_CORE
1303         int
1304         default 2 if E6500
1305         default 1
1306
1307 config SYS_NUM_TLBCAMS
1308         int "Number of TLB CAM entries"
1309         default 64 if E500MC
1310         default 16
1311         help
1312                 Number of TLB CAM entries for Book-E chips. 64 for E500MC,
1313                 16 for other E500 SoCs.
1314
1315 config SYS_PPC64
1316         bool
1317
1318 config SYS_PPC_E500_USE_DEBUG_TLB
1319         bool
1320
1321 config FSL_IFC
1322         bool
1323
1324 config FSL_ELBC
1325         bool
1326
1327 config SYS_PPC_E500_DEBUG_TLB
1328         int "Temporary TLB entry for external debugger"
1329         depends on SYS_PPC_E500_USE_DEBUG_TLB
1330         default 0 if    ARCH_MPC8544 || ARCH_MPC8548
1331         default 1 if    ARCH_MPC8536
1332         default 2 if    ARCH_MPC8572    || \
1333                         ARCH_P1011      || \
1334                         ARCH_P1020      || \
1335                         ARCH_P1021      || \
1336                         ARCH_P1022      || \
1337                         ARCH_P1024      || \
1338                         ARCH_P1025      || \
1339                         ARCH_P2020
1340         default 3 if    ARCH_P1010      || \
1341                         ARCH_BSC9132    || \
1342                         ARCH_C29X
1343         help
1344                 Select a temporary TLB entry to be used during boot to work
1345                 around limitations in e500v1 and e500v2 external debugger
1346                 support. This reduces the portions of the boot code where
1347                 breakpoints and single stepping do not work. The value of this
1348                 symbol should be set to the TLB1 entry to be used for this
1349                 purpose. If unsure, do not change.
1350
1351 config SYS_FSL_IFC_CLK_DIV
1352         int "Divider of platform clock"
1353         depends on FSL_IFC
1354         default 2 if    ARCH_B4420      || \
1355                         ARCH_B4860      || \
1356                         ARCH_T1024      || \
1357                         ARCH_T1023      || \
1358                         ARCH_T1040      || \
1359                         ARCH_T1042      || \
1360                         ARCH_T4160      || \
1361                         ARCH_T4240
1362         default 1
1363         help
1364                 Defines divider of platform clock(clock input to
1365                 IFC controller).
1366
1367 config SYS_FSL_LBC_CLK_DIV
1368         int "Divider of platform clock"
1369         depends on FSL_ELBC || ARCH_MPC8540 || \
1370                 ARCH_MPC8548 || ARCH_MPC8541 || \
1371                 ARCH_MPC8555 || ARCH_MPC8560 || \
1372                 ARCH_MPC8568
1373
1374         default 2 if    ARCH_P2041      || \
1375                         ARCH_P3041      || \
1376                         ARCH_P4080      || \
1377                         ARCH_P5020      || \
1378                         ARCH_P5040
1379         default 1
1380
1381         help
1382                 Defines divider of platform clock(clock input to
1383                 eLBC controller).
1384
1385 source "board/freescale/b4860qds/Kconfig"
1386 source "board/freescale/bsc9131rdb/Kconfig"
1387 source "board/freescale/bsc9132qds/Kconfig"
1388 source "board/freescale/c29xpcie/Kconfig"
1389 source "board/freescale/corenet_ds/Kconfig"
1390 source "board/freescale/mpc8536ds/Kconfig"
1391 source "board/freescale/mpc8541cds/Kconfig"
1392 source "board/freescale/mpc8544ds/Kconfig"
1393 source "board/freescale/mpc8548cds/Kconfig"
1394 source "board/freescale/mpc8555cds/Kconfig"
1395 source "board/freescale/mpc8568mds/Kconfig"
1396 source "board/freescale/mpc8569mds/Kconfig"
1397 source "board/freescale/mpc8572ds/Kconfig"
1398 source "board/freescale/p1010rdb/Kconfig"
1399 source "board/freescale/p1022ds/Kconfig"
1400 source "board/freescale/p1023rdb/Kconfig"
1401 source "board/freescale/p1_p2_rdb_pc/Kconfig"
1402 source "board/freescale/p1_twr/Kconfig"
1403 source "board/freescale/p2041rdb/Kconfig"
1404 source "board/freescale/qemu-ppce500/Kconfig"
1405 source "board/freescale/t102xqds/Kconfig"
1406 source "board/freescale/t102xrdb/Kconfig"
1407 source "board/freescale/t1040qds/Kconfig"
1408 source "board/freescale/t104xrdb/Kconfig"
1409 source "board/freescale/t208xqds/Kconfig"
1410 source "board/freescale/t208xrdb/Kconfig"
1411 source "board/freescale/t4qds/Kconfig"
1412 source "board/freescale/t4rdb/Kconfig"
1413 source "board/gdsys/p1022/Kconfig"
1414 source "board/keymile/kmp204x/Kconfig"
1415 source "board/sbc8548/Kconfig"
1416 source "board/socrates/Kconfig"
1417 source "board/varisys/cyrus/Kconfig"
1418 source "board/xes/xpedite520x/Kconfig"
1419 source "board/xes/xpedite537x/Kconfig"
1420 source "board/xes/xpedite550x/Kconfig"
1421 source "board/Arcturus/ucp1020/Kconfig"
1422
1423 endmenu