arch/powerpc/cpu/mpc85xx/Kconfig

   1 menu "mpc85xx CPU"
   2         depends on MPC85xx
   3
   4 config SYS_CPU
   5         default "mpc85xx"
   6
   7 config CMD_ERRATA
   8         bool "Enable the 'errata' command"
   9         depends on MPC85xx
  10         default y
  11         help
  12           This enables the 'errata' command which displays a list of errata
  13           work-arounds which are enabled for the current board.
  14
  15 choice
  16         prompt "Target select"
  17         optional
  18
  19 config TARGET_SBC8548
  20         bool "Support sbc8548"
  21         select ARCH_MPC8548
  22         imply ENV_IS_IN_FLASH
  23
  24 config TARGET_SOCRATES
  25         bool "Support socrates"
  26         select ARCH_MPC8544
  27
  28 config TARGET_B4420QDS
  29         bool "Support B4420QDS"
  30         select ARCH_B4420
  31         select SUPPORT_SPL
  32         select PHYS_64BIT
  33
  34 config TARGET_B4860QDS
  35         bool "Support B4860QDS"
  36         select ARCH_B4860
  37         select BOARD_LATE_INIT if CHAIN_OF_TRUST
  38         select SUPPORT_SPL
  39         select PHYS_64BIT
  40
  41 config TARGET_BSC9131RDB
  42         bool "Support BSC9131RDB"
  43         select ARCH_BSC9131
  44         select SUPPORT_SPL
  45         select BOARD_EARLY_INIT_F
  46
  47 config TARGET_BSC9132QDS
  48         bool "Support BSC9132QDS"
  49         select ARCH_BSC9132
  50         select BOARD_LATE_INIT if CHAIN_OF_TRUST
  51         select SUPPORT_SPL
  52         select BOARD_EARLY_INIT_F
  53
  54 config TARGET_C29XPCIE
  55         bool "Support C29XPCIE"
  56         select ARCH_C29X
  57         select BOARD_LATE_INIT if CHAIN_OF_TRUST
  58         select SUPPORT_SPL
  59         select SUPPORT_TPL
  60         select PHYS_64BIT
  61
  62 config TARGET_P3041DS
  63         bool "Support P3041DS"
  64         select PHYS_64BIT
  65         select ARCH_P3041
  66         select BOARD_LATE_INIT if CHAIN_OF_TRUST
  67         imply CMD_SATA
  68
  69 config TARGET_P4080DS
  70         bool "Support P4080DS"
  71         select PHYS_64BIT
  72         select ARCH_P4080
  73         select BOARD_LATE_INIT if CHAIN_OF_TRUST
  74         imply CMD_SATA
  75
  76 config TARGET_P5020DS
  77         bool "Support P5020DS"
  78         select PHYS_64BIT
  79         select ARCH_P5020
  80         select BOARD_LATE_INIT if CHAIN_OF_TRUST
  81         imply CMD_SATA
  82
  83 config TARGET_P5040DS
  84         bool "Support P5040DS"
  85         select PHYS_64BIT
  86         select ARCH_P5040
  87         select BOARD_LATE_INIT if CHAIN_OF_TRUST
  88         imply CMD_SATA
  89
  90 config TARGET_MPC8536DS
  91         bool "Support MPC8536DS"
  92         select ARCH_MPC8536
  93 # Use DDR3 controller with DDR2 DIMMs on this board
  94         select SYS_FSL_DDRC_GEN3
  95         imply CMD_SATA
  96
  97 config TARGET_MPC8541CDS
  98         bool "Support MPC8541CDS"
  99         select ARCH_MPC8541
 100
 101 config TARGET_MPC8544DS
 102         bool "Support MPC8544DS"
 103         select ARCH_MPC8544
 104
 105 config TARGET_MPC8548CDS
 106         bool "Support MPC8548CDS"
 107         select ARCH_MPC8548
 108         imply ENV_IS_IN_FLASH
 109
 110 config TARGET_MPC8555CDS
 111         bool "Support MPC8555CDS"
 112         select ARCH_MPC8555
 113
 114 config TARGET_MPC8568MDS
 115         bool "Support MPC8568MDS"
 116         select ARCH_MPC8568
 117
 118 config TARGET_MPC8569MDS
 119         bool "Support MPC8569MDS"
 120         select ARCH_MPC8569
 121
 122 config TARGET_MPC8572DS
 123         bool "Support MPC8572DS"
 124         select ARCH_MPC8572
 125 # Use DDR3 controller with DDR2 DIMMs on this board
 126         select SYS_FSL_DDRC_GEN3
 127         imply SCSI
 128
 129 config TARGET_P1010RDB_PA
 130         bool "Support P1010RDB_PA"
 131         select ARCH_P1010
 132         select BOARD_LATE_INIT if CHAIN_OF_TRUST
 133         select SUPPORT_SPL
 134         select SUPPORT_TPL
 135         imply CMD_EEPROM
 136         imply CMD_SATA
 137
 138 config TARGET_P1010RDB_PB
 139         bool "Support P1010RDB_PB"
 140         select ARCH_P1010
 141         select BOARD_LATE_INIT if CHAIN_OF_TRUST
 142         select SUPPORT_SPL
 143         select SUPPORT_TPL
 144         imply CMD_EEPROM
 145         imply CMD_SATA
 146
 147 config TARGET_P1022DS
 148         bool "Support P1022DS"
 149         select ARCH_P1022
 150         select SUPPORT_SPL
 151         select SUPPORT_TPL
 152         imply CMD_SATA
 153
 154 config TARGET_P1023RDB
 155         bool "Support P1023RDB"
 156         select ARCH_P1023
 157         imply CMD_EEPROM
 158
 159 config TARGET_P1020MBG
 160         bool "Support P1020MBG-PC"
 161         select SUPPORT_SPL
 162         select SUPPORT_TPL
 163         select ARCH_P1020
 164         imply CMD_EEPROM
 165         imply CMD_SATA
 166
 167 config TARGET_P1020RDB_PC
 168         bool "Support P1020RDB-PC"
 169         select SUPPORT_SPL
 170         select SUPPORT_TPL
 171         select ARCH_P1020
 172         imply CMD_EEPROM
 173         imply CMD_SATA
 174
 175 config TARGET_P1020RDB_PD
 176         bool "Support P1020RDB-PD"
 177         select SUPPORT_SPL
 178         select SUPPORT_TPL
 179         select ARCH_P1020
 180         imply CMD_EEPROM
 181         imply CMD_SATA
 182
 183 config TARGET_P1020UTM
 184         bool "Support P1020UTM"
 185         select SUPPORT_SPL
 186         select SUPPORT_TPL
 187         select ARCH_P1020
 188         imply CMD_EEPROM
 189         imply CMD_SATA
 190
 191 config TARGET_P1021RDB
 192         bool "Support P1021RDB"
 193         select SUPPORT_SPL
 194         select SUPPORT_TPL
 195         select ARCH_P1021
 196         imply CMD_EEPROM
 197         imply CMD_SATA
 198
 199 config TARGET_P1024RDB
 200         bool "Support P1024RDB"
 201         select SUPPORT_SPL
 202         select SUPPORT_TPL
 203         select ARCH_P1024
 204         imply CMD_EEPROM
 205         imply CMD_SATA
 206
 207 config TARGET_P1025RDB
 208         bool "Support P1025RDB"
 209         select SUPPORT_SPL
 210         select SUPPORT_TPL
 211         select ARCH_P1025
 212         imply CMD_EEPROM
 213         imply CMD_SATA
 214
 215 config TARGET_P2020RDB
 216         bool "Support P2020RDB-PC"
 217         select SUPPORT_SPL
 218         select SUPPORT_TPL
 219         select ARCH_P2020
 220         imply CMD_EEPROM
 221         imply CMD_SATA
 222
 223 config TARGET_P1_TWR
 224         bool "Support p1_twr"
 225         select ARCH_P1025
 226
 227 config TARGET_P2041RDB
 228         bool "Support P2041RDB"
 229         select ARCH_P2041
 230         select BOARD_LATE_INIT if CHAIN_OF_TRUST
 231         select PHYS_64BIT
 232         imply CMD_SATA
 233
 234 config TARGET_QEMU_PPCE500
 235         bool "Support qemu-ppce500"
 236         select ARCH_QEMU_E500
 237         select PHYS_64BIT
 238
 239 config TARGET_T1024QDS
 240         bool "Support T1024QDS"
 241         select ARCH_T1024
 242         select BOARD_LATE_INIT if CHAIN_OF_TRUST
 243         select SUPPORT_SPL
 244         select PHYS_64BIT
 245         imply CMD_EEPROM
 246         imply CMD_SATA
 247
 248 config TARGET_T1023RDB
 249         bool "Support T1023RDB"
 250         select ARCH_T1023
 251         select BOARD_LATE_INIT if CHAIN_OF_TRUST
 252         select SUPPORT_SPL
 253         select PHYS_64BIT
 254         imply CMD_EEPROM
 255
 256 config TARGET_T1024RDB
 257         bool "Support T1024RDB"
 258         select ARCH_T1024
 259         select BOARD_LATE_INIT if CHAIN_OF_TRUST
 260         select SUPPORT_SPL
 261         select PHYS_64BIT
 262         imply CMD_EEPROM
 263
 264 config TARGET_T1040QDS
 265         bool "Support T1040QDS"
 266         select ARCH_T1040
 267         select BOARD_LATE_INIT if CHAIN_OF_TRUST
 268         select PHYS_64BIT
 269         imply CMD_EEPROM
 270         imply CMD_SATA
 271
 272 config TARGET_T1040RDB
 273         bool "Support T1040RDB"
 274         select ARCH_T1040
 275         select BOARD_LATE_INIT if CHAIN_OF_TRUST
 276         select SUPPORT_SPL
 277         select PHYS_64BIT
 278         imply CMD_SATA
 279
 280 config TARGET_T1040D4RDB
 281         bool "Support T1040D4RDB"
 282         select ARCH_T1040
 283         select BOARD_LATE_INIT if CHAIN_OF_TRUST
 284         select SUPPORT_SPL
 285         select PHYS_64BIT
 286         imply CMD_SATA
 287
 288 config TARGET_T1042RDB
 289         bool "Support T1042RDB"
 290         select ARCH_T1042
 291         select BOARD_LATE_INIT if CHAIN_OF_TRUST
 292         select SUPPORT_SPL
 293         select PHYS_64BIT
 294         imply CMD_SATA
 295
 296 config TARGET_T1042D4RDB
 297         bool "Support T1042D4RDB"
 298         select ARCH_T1042
 299         select BOARD_LATE_INIT if CHAIN_OF_TRUST
 300         select SUPPORT_SPL
 301         select PHYS_64BIT
 302         imply CMD_SATA
 303
 304 config TARGET_T1042RDB_PI
 305         bool "Support T1042RDB_PI"
 306         select ARCH_T1042
 307         select BOARD_LATE_INIT if CHAIN_OF_TRUST
 308         select SUPPORT_SPL
 309         select PHYS_64BIT
 310         imply CMD_SATA
 311
 312 config TARGET_T2080QDS
 313         bool "Support T2080QDS"
 314         select ARCH_T2080
 315         select BOARD_LATE_INIT if CHAIN_OF_TRUST
 316         select SUPPORT_SPL
 317         select PHYS_64BIT
 318         imply CMD_SATA
 319
 320 config TARGET_T2080RDB
 321         bool "Support T2080RDB"
 322         select ARCH_T2080
 323         select BOARD_LATE_INIT if CHAIN_OF_TRUST
 324         select SUPPORT_SPL
 325         select PHYS_64BIT
 326         imply CMD_SATA
 327
 328 config TARGET_T2081QDS
 329         bool "Support T2081QDS"
 330         select ARCH_T2081
 331         select SUPPORT_SPL
 332         select PHYS_64BIT
 333
 334 config TARGET_T4160QDS
 335         bool "Support T4160QDS"
 336         select ARCH_T4160
 337         select BOARD_LATE_INIT if CHAIN_OF_TRUST
 338         select SUPPORT_SPL
 339         select PHYS_64BIT
 340         imply CMD_SATA
 341
 342 config TARGET_T4160RDB
 343         bool "Support T4160RDB"
 344         select ARCH_T4160
 345         select SUPPORT_SPL
 346         select PHYS_64BIT
 347
 348 config TARGET_T4240QDS
 349         bool "Support T4240QDS"
 350         select ARCH_T4240
 351         select BOARD_LATE_INIT if CHAIN_OF_TRUST
 352         select SUPPORT_SPL
 353         select PHYS_64BIT
 354         imply CMD_SATA
 355
 356 config TARGET_T4240RDB
 357         bool "Support T4240RDB"
 358         select ARCH_T4240
 359         select SUPPORT_SPL
 360         select PHYS_64BIT
 361         imply CMD_SATA
 362
 363 config TARGET_CONTROLCENTERD
 364         bool "Support controlcenterd"
 365         select ARCH_P1022
 366
 367 config TARGET_KMP204X
 368         bool "Support kmp204x"
 369         select ARCH_P2041
 370         select PHYS_64BIT
 371         imply CMD_CRAMFS
 372         imply FS_CRAMFS
 373
 374 config TARGET_XPEDITE520X
 375         bool "Support xpedite520x"
 376         select ARCH_MPC8548
 377
 378 config TARGET_XPEDITE537X
 379         bool "Support xpedite537x"
 380         select ARCH_MPC8572
 381 # Use DDR3 controller with DDR2 DIMMs on this board
 382         select SYS_FSL_DDRC_GEN3
 383
 384 config TARGET_XPEDITE550X
 385         bool "Support xpedite550x"
 386         select ARCH_P2020
 387
 388 config TARGET_UCP1020
 389         bool "Support uCP1020"
 390         select ARCH_P1020
 391         imply CMD_SATA
 392
 393 config TARGET_CYRUS_P5020
 394         bool "Support Varisys Cyrus P5020"
 395         select ARCH_P5020
 396         select PHYS_64BIT
 397
 398 config TARGET_CYRUS_P5040
 399          bool "Support Varisys Cyrus P5040"
 400         select ARCH_P5040
 401         select PHYS_64BIT
 402
 403 endchoice
 404
 405 config ARCH_B4420
 406         bool
 407         select E500MC
 408         select E6500
 409         select FSL_LAW
 410         select SYS_FSL_DDR_VER_47
 411         select SYS_FSL_ERRATUM_A004477
 412         select SYS_FSL_ERRATUM_A005871
 413         select SYS_FSL_ERRATUM_A006379
 414         select SYS_FSL_ERRATUM_A006384
 415         select SYS_FSL_ERRATUM_A006475
 416         select SYS_FSL_ERRATUM_A006593
 417         select SYS_FSL_ERRATUM_A007075
 418         select SYS_FSL_ERRATUM_A007186
 419         select SYS_FSL_ERRATUM_A007212
 420         select SYS_FSL_ERRATUM_A009942
 421         select SYS_FSL_HAS_DDR3
 422         select SYS_FSL_HAS_SEC
 423         select SYS_FSL_QORIQ_CHASSIS2
 424         select SYS_FSL_SEC_BE
 425         select SYS_FSL_SEC_COMPAT_4
 426         select SYS_PPC64
 427         select FSL_IFC
 428         imply CMD_EEPROM
 429         imply CMD_NAND
 430
 431 config ARCH_B4860
 432         bool
 433         select E500MC
 434         select E6500
 435         select FSL_LAW
 436         select SYS_FSL_DDR_VER_47
 437         select SYS_FSL_ERRATUM_A004477
 438         select SYS_FSL_ERRATUM_A005871
 439         select SYS_FSL_ERRATUM_A006379
 440         select SYS_FSL_ERRATUM_A006384
 441         select SYS_FSL_ERRATUM_A006475
 442         select SYS_FSL_ERRATUM_A006593
 443         select SYS_FSL_ERRATUM_A007075
 444         select SYS_FSL_ERRATUM_A007186
 445         select SYS_FSL_ERRATUM_A007212
 446         select SYS_FSL_ERRATUM_A007907
 447         select SYS_FSL_ERRATUM_A009942
 448         select SYS_FSL_HAS_DDR3
 449         select SYS_FSL_HAS_SEC
 450         select SYS_FSL_QORIQ_CHASSIS2
 451         select SYS_FSL_SEC_BE
 452         select SYS_FSL_SEC_COMPAT_4
 453         select SYS_PPC64
 454         select FSL_IFC
 455         imply CMD_EEPROM
 456         imply CMD_NAND
 457
 458 config ARCH_BSC9131
 459         bool
 460         select FSL_LAW
 461         select SYS_FSL_DDR_VER_44
 462         select SYS_FSL_ERRATUM_A004477
 463         select SYS_FSL_ERRATUM_A005125
 464         select SYS_FSL_ERRATUM_ESDHC111
 465         select SYS_FSL_HAS_DDR3
 466         select SYS_FSL_HAS_SEC
 467         select SYS_FSL_SEC_BE
 468         select SYS_FSL_SEC_COMPAT_4
 469         select FSL_IFC
 470         imply CMD_EEPROM
 471         imply CMD_NAND
 472
 473 config ARCH_BSC9132
 474         bool
 475         select FSL_LAW
 476         select SYS_FSL_DDR_VER_46
 477         select SYS_FSL_ERRATUM_A004477
 478         select SYS_FSL_ERRATUM_A005125
 479         select SYS_FSL_ERRATUM_A005434
 480         select SYS_FSL_ERRATUM_ESDHC111
 481         select SYS_FSL_ERRATUM_I2C_A004447
 482         select SYS_FSL_ERRATUM_IFC_A002769
 483         select SYS_FSL_HAS_DDR3
 484         select SYS_FSL_HAS_SEC
 485         select SYS_FSL_SEC_BE
 486         select SYS_FSL_SEC_COMPAT_4
 487         select SYS_PPC_E500_USE_DEBUG_TLB
 488         select FSL_IFC
 489         imply CMD_EEPROM
 490         imply CMD_MTDPARTS
 491         imply CMD_NAND
 492         imply CMD_PCI
 493
 494 config ARCH_C29X
 495         bool
 496         select FSL_LAW
 497         select SYS_FSL_DDR_VER_46
 498         select SYS_FSL_ERRATUM_A005125
 499         select SYS_FSL_ERRATUM_ESDHC111
 500         select SYS_FSL_HAS_DDR3
 501         select SYS_FSL_HAS_SEC
 502         select SYS_FSL_SEC_BE
 503         select SYS_FSL_SEC_COMPAT_6
 504         select SYS_PPC_E500_USE_DEBUG_TLB
 505         select FSL_IFC
 506         imply CMD_NAND
 507         imply CMD_PCI
 508
 509 config ARCH_MPC8536
 510         bool
 511         select FSL_LAW
 512         select SYS_FSL_ERRATUM_A004508
 513         select SYS_FSL_ERRATUM_A005125
 514         select SYS_FSL_HAS_DDR2
 515         select SYS_FSL_HAS_DDR3
 516         select SYS_FSL_HAS_SEC
 517         select SYS_FSL_SEC_BE
 518         select SYS_FSL_SEC_COMPAT_2
 519         select SYS_PPC_E500_USE_DEBUG_TLB
 520         select FSL_ELBC
 521         imply CMD_NAND
 522         imply CMD_SATA
 523
 524 config ARCH_MPC8540
 525         bool
 526         select FSL_LAW
 527         select SYS_FSL_HAS_DDR1
 528
 529 config ARCH_MPC8541
 530         bool
 531         select FSL_LAW
 532         select SYS_FSL_HAS_DDR1
 533         select SYS_FSL_HAS_SEC
 534         select SYS_FSL_SEC_BE
 535         select SYS_FSL_SEC_COMPAT_2
 536
 537 config ARCH_MPC8544
 538         bool
 539         select FSL_LAW
 540         select SYS_FSL_ERRATUM_A005125
 541         select SYS_FSL_HAS_DDR2
 542         select SYS_FSL_HAS_SEC
 543         select SYS_FSL_SEC_BE
 544         select SYS_FSL_SEC_COMPAT_2
 545         select SYS_PPC_E500_USE_DEBUG_TLB
 546         select FSL_ELBC
 547
 548 config ARCH_MPC8548
 549         bool
 550         select FSL_LAW
 551         select SYS_FSL_ERRATUM_A005125
 552         select SYS_FSL_ERRATUM_NMG_DDR120
 553         select SYS_FSL_ERRATUM_NMG_LBC103
 554         select SYS_FSL_ERRATUM_NMG_ETSEC129
 555         select SYS_FSL_ERRATUM_I2C_A004447
 556         select SYS_FSL_HAS_DDR2
 557         select SYS_FSL_HAS_DDR1
 558         select SYS_FSL_HAS_SEC
 559         select SYS_FSL_SEC_BE
 560         select SYS_FSL_SEC_COMPAT_2
 561         select SYS_PPC_E500_USE_DEBUG_TLB
 562         imply ENV_IS_IN_FLASH
 563
 564 config ARCH_MPC8555
 565         bool
 566         select FSL_LAW
 567         select SYS_FSL_HAS_DDR1
 568         select SYS_FSL_HAS_SEC
 569         select SYS_FSL_SEC_BE
 570         select SYS_FSL_SEC_COMPAT_2
 571
 572 config ARCH_MPC8560
 573         bool
 574         select FSL_LAW
 575         select SYS_FSL_HAS_DDR1
 576
 577 config ARCH_MPC8568
 578         bool
 579         select FSL_LAW
 580         select SYS_FSL_HAS_DDR2
 581         select SYS_FSL_HAS_SEC
 582         select SYS_FSL_SEC_BE
 583         select SYS_FSL_SEC_COMPAT_2
 584
 585 config ARCH_MPC8569
 586         bool
 587         select FSL_LAW
 588         select SYS_FSL_ERRATUM_A004508
 589         select SYS_FSL_ERRATUM_A005125
 590         select SYS_FSL_HAS_DDR3
 591         select SYS_FSL_HAS_SEC
 592         select SYS_FSL_SEC_BE
 593         select SYS_FSL_SEC_COMPAT_2
 594         select FSL_ELBC
 595         imply CMD_NAND
 596
 597 config ARCH_MPC8572
 598         bool
 599         select FSL_LAW
 600         select SYS_FSL_ERRATUM_A004508
 601         select SYS_FSL_ERRATUM_A005125
 602         select SYS_FSL_ERRATUM_DDR_115
 603         select SYS_FSL_ERRATUM_DDR111_DDR134
 604         select SYS_FSL_HAS_DDR2
 605         select SYS_FSL_HAS_DDR3
 606         select SYS_FSL_HAS_SEC
 607         select SYS_FSL_SEC_BE
 608         select SYS_FSL_SEC_COMPAT_2
 609         select SYS_PPC_E500_USE_DEBUG_TLB
 610         select FSL_ELBC
 611         imply CMD_NAND
 612         imply ENV_IS_IN_FLASH
 613
 614 config ARCH_P1010
 615         bool
 616         select FSL_LAW
 617         select SYS_FSL_ERRATUM_A004477
 618         select SYS_FSL_ERRATUM_A004508
 619         select SYS_FSL_ERRATUM_A005125
 620         select SYS_FSL_ERRATUM_A006261
 621         select SYS_FSL_ERRATUM_A007075
 622         select SYS_FSL_ERRATUM_ESDHC111
 623         select SYS_FSL_ERRATUM_I2C_A004447
 624         select SYS_FSL_ERRATUM_IFC_A002769
 625         select SYS_FSL_ERRATUM_P1010_A003549
 626         select SYS_FSL_ERRATUM_SEC_A003571
 627         select SYS_FSL_ERRATUM_IFC_A003399
 628         select SYS_FSL_HAS_DDR3
 629         select SYS_FSL_HAS_SEC
 630         select SYS_FSL_SEC_BE
 631         select SYS_FSL_SEC_COMPAT_4
 632         select SYS_PPC_E500_USE_DEBUG_TLB
 633         select FSL_IFC
 634         imply CMD_EEPROM
 635         imply CMD_MTDPARTS
 636         imply CMD_NAND
 637         imply CMD_SATA
 638         imply CMD_PCI
 639
 640 config ARCH_P1011
 641         bool
 642         select FSL_LAW
 643         select SYS_FSL_ERRATUM_A004508
 644         select SYS_FSL_ERRATUM_A005125
 645         select SYS_FSL_ERRATUM_ELBC_A001
 646         select SYS_FSL_ERRATUM_ESDHC111
 647         select SYS_FSL_HAS_DDR3
 648         select SYS_FSL_HAS_SEC
 649         select SYS_FSL_SEC_BE
 650         select SYS_FSL_SEC_COMPAT_2
 651         select SYS_PPC_E500_USE_DEBUG_TLB
 652         select FSL_ELBC
 653
 654 config ARCH_P1020
 655         bool
 656         select FSL_LAW
 657         select SYS_FSL_ERRATUM_A004508
 658         select SYS_FSL_ERRATUM_A005125
 659         select SYS_FSL_ERRATUM_ELBC_A001
 660         select SYS_FSL_ERRATUM_ESDHC111
 661         select SYS_FSL_HAS_DDR3
 662         select SYS_FSL_HAS_SEC
 663         select SYS_FSL_SEC_BE
 664         select SYS_FSL_SEC_COMPAT_2
 665         select SYS_PPC_E500_USE_DEBUG_TLB
 666         select FSL_ELBC
 667         imply CMD_NAND
 668         imply CMD_SATA
 669         imply CMD_PCI
 670
 671 config ARCH_P1021
 672         bool
 673         select FSL_LAW
 674         select SYS_FSL_ERRATUM_A004508
 675         select SYS_FSL_ERRATUM_A005125
 676         select SYS_FSL_ERRATUM_ELBC_A001
 677         select SYS_FSL_ERRATUM_ESDHC111
 678         select SYS_FSL_HAS_DDR3
 679         select SYS_FSL_HAS_SEC
 680         select SYS_FSL_SEC_BE
 681         select SYS_FSL_SEC_COMPAT_2
 682         select SYS_PPC_E500_USE_DEBUG_TLB
 683         select FSL_ELBC
 684         imply CMD_NAND
 685         imply CMD_SATA
 686
 687 config ARCH_P1022
 688         bool
 689         select FSL_LAW
 690         select SYS_FSL_ERRATUM_A004477
 691         select SYS_FSL_ERRATUM_A004508
 692         select SYS_FSL_ERRATUM_A005125
 693         select SYS_FSL_ERRATUM_ELBC_A001
 694         select SYS_FSL_ERRATUM_ESDHC111
 695         select SYS_FSL_ERRATUM_SATA_A001
 696         select SYS_FSL_HAS_DDR3
 697         select SYS_FSL_HAS_SEC
 698         select SYS_FSL_SEC_BE
 699         select SYS_FSL_SEC_COMPAT_2
 700         select SYS_PPC_E500_USE_DEBUG_TLB
 701         select FSL_ELBC
 702
 703 config ARCH_P1023
 704         bool
 705         select FSL_LAW
 706         select SYS_FSL_ERRATUM_A004508
 707         select SYS_FSL_ERRATUM_A005125
 708         select SYS_FSL_ERRATUM_I2C_A004447
 709         select SYS_FSL_HAS_DDR3
 710         select SYS_FSL_HAS_SEC
 711         select SYS_FSL_SEC_BE
 712         select SYS_FSL_SEC_COMPAT_4
 713         select FSL_ELBC
 714
 715 config ARCH_P1024
 716         bool
 717         select FSL_LAW
 718         select SYS_FSL_ERRATUM_A004508
 719         select SYS_FSL_ERRATUM_A005125
 720         select SYS_FSL_ERRATUM_ELBC_A001
 721         select SYS_FSL_ERRATUM_ESDHC111
 722         select SYS_FSL_HAS_DDR3
 723         select SYS_FSL_HAS_SEC
 724         select SYS_FSL_SEC_BE
 725         select SYS_FSL_SEC_COMPAT_2
 726         select SYS_PPC_E500_USE_DEBUG_TLB
 727         select FSL_ELBC
 728         imply CMD_EEPROM
 729         imply CMD_NAND
 730         imply CMD_SATA
 731         imply CMD_PCI
 732
 733 config ARCH_P1025
 734         bool
 735         select FSL_LAW
 736         select SYS_FSL_ERRATUM_A004508
 737         select SYS_FSL_ERRATUM_A005125
 738         select SYS_FSL_ERRATUM_ELBC_A001
 739         select SYS_FSL_ERRATUM_ESDHC111
 740         select SYS_FSL_HAS_DDR3
 741         select SYS_FSL_HAS_SEC
 742         select SYS_FSL_SEC_BE
 743         select SYS_FSL_SEC_COMPAT_2
 744         select SYS_PPC_E500_USE_DEBUG_TLB
 745         select FSL_ELBC
 746         imply CMD_SATA
 747
 748 config ARCH_P2020
 749         bool
 750         select FSL_LAW
 751         select SYS_FSL_ERRATUM_A004477
 752         select SYS_FSL_ERRATUM_A004508
 753         select SYS_FSL_ERRATUM_A005125
 754         select SYS_FSL_ERRATUM_ESDHC111
 755         select SYS_FSL_ERRATUM_ESDHC_A001
 756         select SYS_FSL_HAS_DDR3
 757         select SYS_FSL_HAS_SEC
 758         select SYS_FSL_SEC_BE
 759         select SYS_FSL_SEC_COMPAT_2
 760         select SYS_PPC_E500_USE_DEBUG_TLB
 761         select FSL_ELBC
 762         imply CMD_EEPROM
 763         imply CMD_NAND
 764
 765 config ARCH_P2041
 766         bool
 767         select E500MC
 768         select FSL_LAW
 769         select SYS_FSL_ERRATUM_A004510
 770         select SYS_FSL_ERRATUM_A004849
 771         select SYS_FSL_ERRATUM_A006261
 772         select SYS_FSL_ERRATUM_CPU_A003999
 773         select SYS_FSL_ERRATUM_DDR_A003
 774         select SYS_FSL_ERRATUM_DDR_A003474
 775         select SYS_FSL_ERRATUM_ESDHC111
 776         select SYS_FSL_ERRATUM_I2C_A004447
 777         select SYS_FSL_ERRATUM_NMG_CPU_A011
 778         select SYS_FSL_ERRATUM_SRIO_A004034
 779         select SYS_FSL_ERRATUM_USB14
 780         select SYS_FSL_HAS_DDR3
 781         select SYS_FSL_HAS_SEC
 782         select SYS_FSL_QORIQ_CHASSIS1
 783         select SYS_FSL_SEC_BE
 784         select SYS_FSL_SEC_COMPAT_4
 785         select FSL_ELBC
 786         imply CMD_NAND
 787
 788 config ARCH_P3041
 789         bool
 790         select E500MC
 791         select FSL_LAW
 792         select SYS_FSL_DDR_VER_44
 793         select SYS_FSL_ERRATUM_A004510
 794         select SYS_FSL_ERRATUM_A004849
 795         select SYS_FSL_ERRATUM_A005812
 796         select SYS_FSL_ERRATUM_A006261
 797         select SYS_FSL_ERRATUM_CPU_A003999
 798         select SYS_FSL_ERRATUM_DDR_A003
 799         select SYS_FSL_ERRATUM_DDR_A003474
 800         select SYS_FSL_ERRATUM_ESDHC111
 801         select SYS_FSL_ERRATUM_I2C_A004447
 802         select SYS_FSL_ERRATUM_NMG_CPU_A011
 803         select SYS_FSL_ERRATUM_SRIO_A004034
 804         select SYS_FSL_ERRATUM_USB14
 805         select SYS_FSL_HAS_DDR3
 806         select SYS_FSL_HAS_SEC
 807         select SYS_FSL_QORIQ_CHASSIS1
 808         select SYS_FSL_SEC_BE
 809         select SYS_FSL_SEC_COMPAT_4
 810         select FSL_ELBC
 811         imply CMD_NAND
 812         imply CMD_SATA
 813
 814 config ARCH_P4080
 815         bool
 816         select E500MC
 817         select FSL_LAW
 818         select SYS_FSL_DDR_VER_44
 819         select SYS_FSL_ERRATUM_A004510
 820         select SYS_FSL_ERRATUM_A004580
 821         select SYS_FSL_ERRATUM_A004849
 822         select SYS_FSL_ERRATUM_A005812
 823         select SYS_FSL_ERRATUM_A007075
 824         select SYS_FSL_ERRATUM_CPC_A002
 825         select SYS_FSL_ERRATUM_CPC_A003
 826         select SYS_FSL_ERRATUM_CPU_A003999
 827         select SYS_FSL_ERRATUM_DDR_A003
 828         select SYS_FSL_ERRATUM_DDR_A003474
 829         select SYS_FSL_ERRATUM_ELBC_A001
 830         select SYS_FSL_ERRATUM_ESDHC111
 831         select SYS_FSL_ERRATUM_ESDHC13
 832         select SYS_FSL_ERRATUM_ESDHC135
 833         select SYS_FSL_ERRATUM_I2C_A004447
 834         select SYS_FSL_ERRATUM_NMG_CPU_A011
 835         select SYS_FSL_ERRATUM_SRIO_A004034
 836         select SYS_P4080_ERRATUM_CPU22
 837         select SYS_P4080_ERRATUM_PCIE_A003
 838         select SYS_P4080_ERRATUM_SERDES8
 839         select SYS_P4080_ERRATUM_SERDES9
 840         select SYS_P4080_ERRATUM_SERDES_A001
 841         select SYS_P4080_ERRATUM_SERDES_A005
 842         select SYS_FSL_HAS_DDR3
 843         select SYS_FSL_HAS_SEC
 844         select SYS_FSL_QORIQ_CHASSIS1
 845         select SYS_FSL_SEC_BE
 846         select SYS_FSL_SEC_COMPAT_4
 847         select FSL_ELBC
 848         imply CMD_SATA
 849
 850 config ARCH_P5020
 851         bool
 852         select E500MC
 853         select FSL_LAW
 854         select SYS_FSL_DDR_VER_44
 855         select SYS_FSL_ERRATUM_A004510
 856         select SYS_FSL_ERRATUM_A006261
 857         select SYS_FSL_ERRATUM_DDR_A003
 858         select SYS_FSL_ERRATUM_DDR_A003474
 859         select SYS_FSL_ERRATUM_ESDHC111
 860         select SYS_FSL_ERRATUM_I2C_A004447
 861         select SYS_FSL_ERRATUM_SRIO_A004034
 862         select SYS_FSL_ERRATUM_USB14
 863         select SYS_FSL_HAS_DDR3
 864         select SYS_FSL_HAS_SEC
 865         select SYS_FSL_QORIQ_CHASSIS1
 866         select SYS_FSL_SEC_BE
 867         select SYS_FSL_SEC_COMPAT_4
 868         select SYS_PPC64
 869         select FSL_ELBC
 870         imply CMD_SATA
 871
 872 config ARCH_P5040
 873         bool
 874         select E500MC
 875         select FSL_LAW
 876         select SYS_FSL_DDR_VER_44
 877         select SYS_FSL_ERRATUM_A004510
 878         select SYS_FSL_ERRATUM_A004699
 879         select SYS_FSL_ERRATUM_A005812
 880         select SYS_FSL_ERRATUM_A006261
 881         select SYS_FSL_ERRATUM_DDR_A003
 882         select SYS_FSL_ERRATUM_DDR_A003474
 883         select SYS_FSL_ERRATUM_ESDHC111
 884         select SYS_FSL_ERRATUM_USB14
 885         select SYS_FSL_HAS_DDR3
 886         select SYS_FSL_HAS_SEC
 887         select SYS_FSL_QORIQ_CHASSIS1
 888         select SYS_FSL_SEC_BE
 889         select SYS_FSL_SEC_COMPAT_4
 890         select SYS_PPC64
 891         select FSL_ELBC
 892         imply CMD_SATA
 893
 894 config ARCH_QEMU_E500
 895         bool
 896
 897 config ARCH_T1023
 898         bool
 899         select E500MC
 900         select FSL_LAW
 901         select SYS_FSL_DDR_VER_50
 902         select SYS_FSL_ERRATUM_A008378
 903         select SYS_FSL_ERRATUM_A009663
 904         select SYS_FSL_ERRATUM_A009942
 905         select SYS_FSL_ERRATUM_ESDHC111
 906         select SYS_FSL_HAS_DDR3
 907         select SYS_FSL_HAS_DDR4
 908         select SYS_FSL_HAS_SEC
 909         select SYS_FSL_QORIQ_CHASSIS2
 910         select SYS_FSL_SEC_BE
 911         select SYS_FSL_SEC_COMPAT_5
 912         select FSL_IFC
 913         imply CMD_EEPROM
 914         imply CMD_NAND
 915
 916 config ARCH_T1024
 917         bool
 918         select E500MC
 919         select FSL_LAW
 920         select SYS_FSL_DDR_VER_50
 921         select SYS_FSL_ERRATUM_A008378
 922         select SYS_FSL_ERRATUM_A009663
 923         select SYS_FSL_ERRATUM_A009942
 924         select SYS_FSL_ERRATUM_ESDHC111
 925         select SYS_FSL_HAS_DDR3
 926         select SYS_FSL_HAS_DDR4
 927         select SYS_FSL_HAS_SEC
 928         select SYS_FSL_QORIQ_CHASSIS2
 929         select SYS_FSL_SEC_BE
 930         select SYS_FSL_SEC_COMPAT_5
 931         select FSL_IFC
 932         imply CMD_EEPROM
 933         imply CMD_NAND
 934         imply CMD_MTDPARTS
 935
 936 config ARCH_T1040
 937         bool
 938         select E500MC
 939         select FSL_LAW
 940         select SYS_FSL_DDR_VER_50
 941         select SYS_FSL_ERRATUM_A008044
 942         select SYS_FSL_ERRATUM_A008378
 943         select SYS_FSL_ERRATUM_A009663
 944         select SYS_FSL_ERRATUM_A009942
 945         select SYS_FSL_ERRATUM_ESDHC111
 946         select SYS_FSL_HAS_DDR3
 947         select SYS_FSL_HAS_DDR4
 948         select SYS_FSL_HAS_SEC
 949         select SYS_FSL_QORIQ_CHASSIS2
 950         select SYS_FSL_SEC_BE
 951         select SYS_FSL_SEC_COMPAT_5
 952         select FSL_IFC
 953         imply CMD_MTDPARTS
 954         imply CMD_NAND
 955         imply CMD_SATA
 956
 957 config ARCH_T1042
 958         bool
 959         select E500MC
 960         select FSL_LAW
 961         select SYS_FSL_DDR_VER_50
 962         select SYS_FSL_ERRATUM_A008044
 963         select SYS_FSL_ERRATUM_A008378
 964         select SYS_FSL_ERRATUM_A009663
 965         select SYS_FSL_ERRATUM_A009942
 966         select SYS_FSL_ERRATUM_ESDHC111
 967         select SYS_FSL_HAS_DDR3
 968         select SYS_FSL_HAS_DDR4
 969         select SYS_FSL_HAS_SEC
 970         select SYS_FSL_QORIQ_CHASSIS2
 971         select SYS_FSL_SEC_BE
 972         select SYS_FSL_SEC_COMPAT_5
 973         select FSL_IFC
 974         imply CMD_MTDPARTS
 975         imply CMD_NAND
 976         imply CMD_SATA
 977
 978 config ARCH_T2080
 979         bool
 980         select E500MC
 981         select E6500
 982         select FSL_LAW
 983         select SYS_FSL_DDR_VER_47
 984         select SYS_FSL_ERRATUM_A006379
 985         select SYS_FSL_ERRATUM_A006593
 986         select SYS_FSL_ERRATUM_A007186
 987         select SYS_FSL_ERRATUM_A007212
 988         select SYS_FSL_ERRATUM_A007815
 989         select SYS_FSL_ERRATUM_A007907
 990         select SYS_FSL_ERRATUM_A009942
 991         select SYS_FSL_ERRATUM_ESDHC111
 992         select SYS_FSL_HAS_DDR3
 993         select SYS_FSL_HAS_SEC
 994         select SYS_FSL_QORIQ_CHASSIS2
 995         select SYS_FSL_SEC_BE
 996         select SYS_FSL_SEC_COMPAT_4
 997         select SYS_PPC64
 998         select FSL_IFC
 999         imply CMD_SATA
1000         imply CMD_NAND
1001
1002 config ARCH_T2081
1003         bool
1004         select E500MC
1005         select E6500
1006         select FSL_LAW
1007         select SYS_FSL_DDR_VER_47
1008         select SYS_FSL_ERRATUM_A006379
1009         select SYS_FSL_ERRATUM_A006593
1010         select SYS_FSL_ERRATUM_A007186
1011         select SYS_FSL_ERRATUM_A007212
1012         select SYS_FSL_ERRATUM_A009942
1013         select SYS_FSL_ERRATUM_ESDHC111
1014         select SYS_FSL_HAS_DDR3
1015         select SYS_FSL_HAS_SEC
1016         select SYS_FSL_QORIQ_CHASSIS2
1017         select SYS_FSL_SEC_BE
1018         select SYS_FSL_SEC_COMPAT_4
1019         select SYS_PPC64
1020         select FSL_IFC
1021         imply CMD_NAND
1022
1023 config ARCH_T4160
1024         bool
1025         select E500MC
1026         select E6500
1027         select FSL_LAW
1028         select SYS_FSL_DDR_VER_47
1029         select SYS_FSL_ERRATUM_A004468
1030         select SYS_FSL_ERRATUM_A005871
1031         select SYS_FSL_ERRATUM_A006379
1032         select SYS_FSL_ERRATUM_A006593
1033         select SYS_FSL_ERRATUM_A007186
1034         select SYS_FSL_ERRATUM_A007798
1035         select SYS_FSL_ERRATUM_A009942
1036         select SYS_FSL_HAS_DDR3
1037         select SYS_FSL_HAS_SEC
1038         select SYS_FSL_QORIQ_CHASSIS2
1039         select SYS_FSL_SEC_BE
1040         select SYS_FSL_SEC_COMPAT_4
1041         select SYS_PPC64
1042         select FSL_IFC
1043         imply CMD_SATA
1044         imply CMD_NAND
1045
1046 config ARCH_T4240
1047         bool
1048         select E500MC
1049         select E6500
1050         select FSL_LAW
1051         select SYS_FSL_DDR_VER_47
1052         select SYS_FSL_ERRATUM_A004468
1053         select SYS_FSL_ERRATUM_A005871
1054         select SYS_FSL_ERRATUM_A006261
1055         select SYS_FSL_ERRATUM_A006379
1056         select SYS_FSL_ERRATUM_A006593
1057         select SYS_FSL_ERRATUM_A007186
1058         select SYS_FSL_ERRATUM_A007798
1059         select SYS_FSL_ERRATUM_A007815
1060         select SYS_FSL_ERRATUM_A007907
1061         select SYS_FSL_ERRATUM_A009942
1062         select SYS_FSL_HAS_DDR3
1063         select SYS_FSL_HAS_SEC
1064         select SYS_FSL_QORIQ_CHASSIS2
1065         select SYS_FSL_SEC_BE
1066         select SYS_FSL_SEC_COMPAT_4
1067         select SYS_PPC64
1068         select FSL_IFC
1069         imply CMD_SATA
1070         imply CMD_NAND
1071
1072 config BOOKE
1073         bool
1074         default y
1075
1076 config E500
1077         bool
1078         default y
1079         help
1080                 Enable PowerPC E500 cores, including e500v1, e500v2, e500mc
1081
1082 config E500MC
1083         bool
1084         imply CMD_PCI
1085         help
1086                 Enble PowerPC E500MC core
1087
1088 config E6500
1089         bool
1090         help
1091                 Enable PowerPC E6500 core
1092
1093 config FSL_LAW
1094         bool
1095         help
1096                 Use Freescale common code for Local Access Window
1097
1098 config SECURE_BOOT
1099         bool    "Secure Boot"
1100         help
1101                 Enable Freescale Secure Boot feature. Normally selected
1102                 by defconfig. If unsure, do not change.
1103
1104 config MAX_CPUS
1105         int "Maximum number of CPUs permitted for MPC85xx"
1106         default 12 if ARCH_T4240
1107         default 8 if ARCH_P4080 || \
1108                      ARCH_T4160
1109         default 4 if ARCH_B4860 || \
1110                      ARCH_P2041 || \
1111                      ARCH_P3041 || \
1112                      ARCH_P5040 || \
1113                      ARCH_T1040 || \
1114                      ARCH_T1042 || \
1115                      ARCH_T2080 || \
1116                      ARCH_T2081
1117         default 2 if ARCH_B4420 || \
1118                      ARCH_BSC9132 || \
1119                      ARCH_MPC8572 || \
1120                      ARCH_P1020 || \
1121                      ARCH_P1021 || \
1122                      ARCH_P1022 || \
1123                      ARCH_P1023 || \
1124                      ARCH_P1024 || \
1125                      ARCH_P1025 || \
1126                      ARCH_P2020 || \
1127                      ARCH_P5020 || \
1128                      ARCH_T1023 || \
1129                      ARCH_T1024
1130         default 1
1131         help
1132           Set this number to the maximum number of possible CPUs in the SoC.
1133           SoCs may have multiple clusters with each cluster may have multiple
1134           ports. If some ports are reserved but higher ports are used for
1135           cores, count the reserved ports. This will allocate enough memory
1136           in spin table to properly handle all cores.
1137
1138 config SYS_CCSRBAR_DEFAULT
1139         hex "Default CCSRBAR address"
1140         default 0xff700000 if   ARCH_BSC9131    || \
1141                                 ARCH_BSC9132    || \
1142                                 ARCH_C29X       || \
1143                                 ARCH_MPC8536    || \
1144                                 ARCH_MPC8540    || \
1145                                 ARCH_MPC8541    || \
1146                                 ARCH_MPC8544    || \
1147                                 ARCH_MPC8548    || \
1148                                 ARCH_MPC8555    || \
1149                                 ARCH_MPC8560    || \
1150                                 ARCH_MPC8568    || \
1151                                 ARCH_MPC8569    || \
1152                                 ARCH_MPC8572    || \
1153                                 ARCH_P1010      || \
1154                                 ARCH_P1011      || \
1155                                 ARCH_P1020      || \
1156                                 ARCH_P1021      || \
1157                                 ARCH_P1022      || \
1158                                 ARCH_P1024      || \
1159                                 ARCH_P1025      || \
1160                                 ARCH_P2020
1161         default 0xff600000 if   ARCH_P1023
1162         default 0xfe000000 if   ARCH_B4420      || \
1163                                 ARCH_B4860      || \
1164                                 ARCH_P2041      || \
1165                                 ARCH_P3041      || \
1166                                 ARCH_P4080      || \
1167                                 ARCH_P5020      || \
1168                                 ARCH_P5040      || \
1169                                 ARCH_T1023      || \
1170                                 ARCH_T1024      || \
1171                                 ARCH_T1040      || \
1172                                 ARCH_T1042      || \
1173                                 ARCH_T2080      || \
1174                                 ARCH_T2081      || \
1175                                 ARCH_T4160      || \
1176                                 ARCH_T4240
1177         default 0xe0000000 if ARCH_QEMU_E500
1178         help
1179                 Default value of CCSRBAR comes from power-on-reset. It
1180                 is fixed on each SoC. Some SoCs can have different value
1181                 if changed by pre-boot regime. The value here must match
1182                 the current value in SoC. If not sure, do not change.
1183
1184 config SYS_FSL_ERRATUM_A004468
1185         bool
1186
1187 config SYS_FSL_ERRATUM_A004477
1188         bool
1189
1190 config SYS_FSL_ERRATUM_A004508
1191         bool
1192
1193 config SYS_FSL_ERRATUM_A004580
1194         bool
1195
1196 config SYS_FSL_ERRATUM_A004699
1197         bool
1198
1199 config SYS_FSL_ERRATUM_A004849
1200         bool
1201
1202 config SYS_FSL_ERRATUM_A004510
1203         bool
1204
1205 config SYS_FSL_ERRATUM_A004510_SVR_REV
1206         hex
1207         depends on SYS_FSL_ERRATUM_A004510
1208         default 0x20 if ARCH_P4080
1209         default 0x10
1210
1211 config SYS_FSL_ERRATUM_A004510_SVR_REV2
1212         hex
1213         depends on (SYS_FSL_ERRATUM_A004510 && (ARCH_P2041 || ARCH_P3041))
1214         default 0x11
1215
1216 config SYS_FSL_ERRATUM_A005125
1217         bool
1218
1219 config SYS_FSL_ERRATUM_A005434
1220         bool
1221
1222 config SYS_FSL_ERRATUM_A005812
1223         bool
1224
1225 config SYS_FSL_ERRATUM_A005871
1226         bool
1227
1228 config SYS_FSL_ERRATUM_A006261
1229         bool
1230
1231 config SYS_FSL_ERRATUM_A006379
1232         bool
1233
1234 config SYS_FSL_ERRATUM_A006384
1235         bool
1236
1237 config SYS_FSL_ERRATUM_A006475
1238         bool
1239
1240 config SYS_FSL_ERRATUM_A006593
1241         bool
1242
1243 config SYS_FSL_ERRATUM_A007075
1244         bool
1245
1246 config SYS_FSL_ERRATUM_A007186
1247         bool
1248
1249 config SYS_FSL_ERRATUM_A007212
1250         bool
1251
1252 config SYS_FSL_ERRATUM_A007815
1253         bool
1254
1255 config SYS_FSL_ERRATUM_A007798
1256         bool
1257
1258 config SYS_FSL_ERRATUM_A007907
1259         bool
1260
1261 config SYS_FSL_ERRATUM_A008044
1262         bool
1263
1264 config SYS_FSL_ERRATUM_CPC_A002
1265         bool
1266
1267 config SYS_FSL_ERRATUM_CPC_A003
1268         bool
1269
1270 config SYS_FSL_ERRATUM_CPU_A003999
1271         bool
1272
1273 config SYS_FSL_ERRATUM_ELBC_A001
1274         bool
1275
1276 config SYS_FSL_ERRATUM_I2C_A004447
1277         bool
1278
1279 config SYS_FSL_A004447_SVR_REV
1280         hex
1281         depends on SYS_FSL_ERRATUM_I2C_A004447
1282         default 0x00 if ARCH_MPC8548
1283         default 0x10 if ARCH_P1010
1284         default 0x11 if ARCH_P1023 || ARCH_P2041 || ARCH_BSC9132
1285         default 0x20 if ARCH_P3041 || ARCH_P4080 || ARCH_P5020
1286
1287 config SYS_FSL_ERRATUM_IFC_A002769
1288         bool
1289
1290 config SYS_FSL_ERRATUM_IFC_A003399
1291         bool
1292
1293 config SYS_FSL_ERRATUM_NMG_CPU_A011
1294         bool
1295
1296 config SYS_FSL_ERRATUM_NMG_ETSEC129
1297         bool
1298
1299 config SYS_FSL_ERRATUM_NMG_LBC103
1300         bool
1301
1302 config SYS_FSL_ERRATUM_P1010_A003549
1303         bool
1304
1305 config SYS_FSL_ERRATUM_SATA_A001
1306         bool
1307
1308 config SYS_FSL_ERRATUM_SEC_A003571
1309         bool
1310
1311 config SYS_FSL_ERRATUM_SRIO_A004034
1312         bool
1313
1314 config SYS_FSL_ERRATUM_USB14
1315         bool
1316
1317 config SYS_P4080_ERRATUM_CPU22
1318         bool
1319
1320 config SYS_P4080_ERRATUM_PCIE_A003
1321         bool
1322
1323 config SYS_P4080_ERRATUM_SERDES8
1324         bool
1325
1326 config SYS_P4080_ERRATUM_SERDES9
1327         bool
1328
1329 config SYS_P4080_ERRATUM_SERDES_A001
1330         bool
1331
1332 config SYS_P4080_ERRATUM_SERDES_A005
1333         bool
1334
1335 config SYS_FSL_QORIQ_CHASSIS1
1336         bool
1337
1338 config SYS_FSL_QORIQ_CHASSIS2
1339         bool
1340
1341 config SYS_FSL_NUM_LAWS
1342         int "Number of local access windows"
1343         depends on FSL_LAW
1344         default 32 if   ARCH_B4420      || \
1345                         ARCH_B4860      || \
1346                         ARCH_P2041      || \
1347                         ARCH_P3041      || \
1348                         ARCH_P4080      || \
1349                         ARCH_P5020      || \
1350                         ARCH_P5040      || \
1351                         ARCH_T2080      || \
1352                         ARCH_T2081      || \
1353                         ARCH_T4160      || \
1354                         ARCH_T4240
1355         default 16 if   ARCH_T1023      || \
1356                         ARCH_T1024      || \
1357                         ARCH_T1040      || \
1358                         ARCH_T1042
1359         default 12 if   ARCH_BSC9131    || \
1360                         ARCH_BSC9132    || \
1361                         ARCH_C29X       || \
1362                         ARCH_MPC8536    || \
1363                         ARCH_MPC8572    || \
1364                         ARCH_P1010      || \
1365                         ARCH_P1011      || \
1366                         ARCH_P1020      || \
1367                         ARCH_P1021      || \
1368                         ARCH_P1022      || \
1369                         ARCH_P1023      || \
1370                         ARCH_P1024      || \
1371                         ARCH_P1025      || \
1372                         ARCH_P2020
1373         default 10 if   ARCH_MPC8544    || \
1374                         ARCH_MPC8548    || \
1375                         ARCH_MPC8568    || \
1376                         ARCH_MPC8569
1377         default 8 if    ARCH_MPC8540    || \
1378                         ARCH_MPC8541    || \
1379                         ARCH_MPC8555    || \
1380                         ARCH_MPC8560
1381         help
1382                 Number of local access windows. This is fixed per SoC.
1383                 If not sure, do not change.
1384
1385 config SYS_FSL_THREADS_PER_CORE
1386         int
1387         default 2 if E6500
1388         default 1
1389
1390 config SYS_NUM_TLBCAMS
1391         int "Number of TLB CAM entries"
1392         default 64 if E500MC
1393         default 16
1394         help
1395                 Number of TLB CAM entries for Book-E chips. 64 for E500MC,
1396                 16 for other E500 SoCs.
1397
1398 config SYS_PPC64
1399         bool
1400
1401 config SYS_PPC_E500_USE_DEBUG_TLB
1402         bool
1403
1404 config FSL_IFC
1405         bool
1406
1407 config FSL_ELBC
1408         bool
1409
1410 config SYS_PPC_E500_DEBUG_TLB
1411         int "Temporary TLB entry for external debugger"
1412         depends on SYS_PPC_E500_USE_DEBUG_TLB
1413         default 0 if    ARCH_MPC8544 || ARCH_MPC8548
1414         default 1 if    ARCH_MPC8536
1415         default 2 if    ARCH_MPC8572    || \
1416                         ARCH_P1011      || \
1417                         ARCH_P1020      || \
1418                         ARCH_P1021      || \
1419                         ARCH_P1022      || \
1420                         ARCH_P1024      || \
1421                         ARCH_P1025      || \
1422                         ARCH_P2020
1423         default 3 if    ARCH_P1010      || \
1424                         ARCH_BSC9132    || \
1425                         ARCH_C29X
1426         help
1427                 Select a temporary TLB entry to be used during boot to work
1428                 around limitations in e500v1 and e500v2 external debugger
1429                 support. This reduces the portions of the boot code where
1430                 breakpoints and single stepping do not work. The value of this
1431                 symbol should be set to the TLB1 entry to be used for this
1432                 purpose. If unsure, do not change.
1433
1434 config SYS_FSL_IFC_CLK_DIV
1435         int "Divider of platform clock"
1436         depends on FSL_IFC
1437         default 2 if    ARCH_B4420      || \
1438                         ARCH_B4860      || \
1439                         ARCH_T1024      || \
1440                         ARCH_T1023      || \
1441                         ARCH_T1040      || \
1442                         ARCH_T1042      || \
1443                         ARCH_T4160      || \
1444                         ARCH_T4240
1445         default 1
1446         help
1447                 Defines divider of platform clock(clock input to
1448                 IFC controller).
1449
1450 config SYS_FSL_LBC_CLK_DIV
1451         int "Divider of platform clock"
1452         depends on FSL_ELBC || ARCH_MPC8540 || \
1453                 ARCH_MPC8548 || ARCH_MPC8541 || \
1454                 ARCH_MPC8555 || ARCH_MPC8560 || \
1455                 ARCH_MPC8568
1456
1457         default 2 if    ARCH_P2041      || \
1458                         ARCH_P3041      || \
1459                         ARCH_P4080      || \
1460                         ARCH_P5020      || \
1461                         ARCH_P5040
1462         default 1
1463
1464         help
1465                 Defines divider of platform clock(clock input to
1466                 eLBC controller).
1467
1468 source "board/freescale/b4860qds/Kconfig"
1469 source "board/freescale/bsc9131rdb/Kconfig"
1470 source "board/freescale/bsc9132qds/Kconfig"
1471 source "board/freescale/c29xpcie/Kconfig"
1472 source "board/freescale/corenet_ds/Kconfig"
1473 source "board/freescale/mpc8536ds/Kconfig"
1474 source "board/freescale/mpc8541cds/Kconfig"
1475 source "board/freescale/mpc8544ds/Kconfig"
1476 source "board/freescale/mpc8548cds/Kconfig"
1477 source "board/freescale/mpc8555cds/Kconfig"
1478 source "board/freescale/mpc8568mds/Kconfig"
1479 source "board/freescale/mpc8569mds/Kconfig"
1480 source "board/freescale/mpc8572ds/Kconfig"
1481 source "board/freescale/p1010rdb/Kconfig"
1482 source "board/freescale/p1022ds/Kconfig"
1483 source "board/freescale/p1023rdb/Kconfig"
1484 source "board/freescale/p1_p2_rdb_pc/Kconfig"
1485 source "board/freescale/p1_twr/Kconfig"
1486 source "board/freescale/p2041rdb/Kconfig"
1487 source "board/freescale/qemu-ppce500/Kconfig"
1488 source "board/freescale/t102xqds/Kconfig"
1489 source "board/freescale/t102xrdb/Kconfig"
1490 source "board/freescale/t1040qds/Kconfig"
1491 source "board/freescale/t104xrdb/Kconfig"
1492 source "board/freescale/t208xqds/Kconfig"
1493 source "board/freescale/t208xrdb/Kconfig"
1494 source "board/freescale/t4qds/Kconfig"
1495 source "board/freescale/t4rdb/Kconfig"
1496 source "board/gdsys/p1022/Kconfig"
1497 source "board/keymile/kmp204x/Kconfig"
1498 source "board/sbc8548/Kconfig"
1499 source "board/socrates/Kconfig"
1500 source "board/varisys/cyrus/Kconfig"
1501 source "board/xes/xpedite520x/Kconfig"
1502 source "board/xes/xpedite537x/Kconfig"
1503 source "board/xes/xpedite550x/Kconfig"
1504 source "board/Arcturus/ucp1020/Kconfig"
1505
1506 endmenu