Merge tag 'omap-for-v3.7-rc5/fixes-signed' of git://git.kernel.org/pub/scm/linux...
[platform/adaptation/renesas_rcar/renesas_kernel.git] / arch / powerpc / boot / dts / pcm030.dts
1 /*
2  * phyCORE-MPC5200B-tiny (pcm030) board Device Tree Source
3  *
4  * Copyright 2006 Pengutronix
5  * Sascha Hauer <s.hauer@pengutronix.de>
6  * Copyright 2007 Pengutronix
7  * Juergen Beisert <j.beisert@pengutronix.de>
8  *
9  * This program is free software; you can redistribute  it and/or modify it
10  * under  the terms of  the GNU General  Public License as published by the
11  * Free Software Foundation;  either version 2 of the  License, or (at your
12  * option) any later version.
13  */
14
15 /include/ "mpc5200b.dtsi"
16
17 / {
18         model = "phytec,pcm030";
19         compatible = "phytec,pcm030";
20
21         soc5200@f0000000 {
22                 timer@600 {             // General Purpose Timer
23                         fsl,has-wdt;
24                 };
25
26                 gpt2: timer@620 {       // General Purpose Timer in GPIO mode
27                         compatible = "fsl,mpc5200b-gpt-gpio","fsl,mpc5200-gpt-gpio";
28                         gpio-controller;
29                         #gpio-cells = <2>;
30                 };
31
32                 gpt3: timer@630 {       // General Purpose Timer in GPIO mode
33                         compatible = "fsl,mpc5200b-gpt-gpio","fsl,mpc5200-gpt-gpio";
34                         gpio-controller;
35                         #gpio-cells = <2>;
36                 };
37
38                 gpt4: timer@640 {       // General Purpose Timer in GPIO mode
39                         compatible = "fsl,mpc5200b-gpt-gpio","fsl,mpc5200-gpt-gpio";
40                         gpio-controller;
41                         #gpio-cells = <2>;
42                 };
43
44                 gpt5: timer@650 {       // General Purpose Timer in GPIO mode
45                         compatible = "fsl,mpc5200b-gpt-gpio","fsl,mpc5200-gpt-gpio";
46                         gpio-controller;
47                         #gpio-cells = <2>;
48                 };
49
50                 gpt6: timer@660 {       // General Purpose Timer in GPIO mode
51                         compatible = "fsl,mpc5200b-gpt-gpio","fsl,mpc5200-gpt-gpio";
52                         gpio-controller;
53                         #gpio-cells = <2>;
54                 };
55
56                 gpt7: timer@670 {       // General Purpose Timer in GPIO mode
57                         compatible = "fsl,mpc5200b-gpt-gpio","fsl,mpc5200-gpt-gpio";
58                         gpio-controller;
59                         #gpio-cells = <2>;
60                 };
61
62                 psc@2000 { /* PSC1 in ac97 mode */
63                         compatible = "mpc5200b-psc-ac97","fsl,mpc5200b-psc-ac97";
64                         cell-index = <0>;
65                 };
66
67                 /* PSC2 port is used by CAN1/2 */
68                 psc@2200 {
69                         status = "disabled";
70                 };
71
72                 psc@2400 { /* PSC3 in UART mode */
73                         compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
74                 };
75
76                 /* PSC4 is ??? */
77                 psc@2600 {
78                         status = "disabled";
79                 };
80
81                 /* PSC5 is ??? */
82                 psc@2800 {
83                         status = "disabled";
84                 };
85
86                 psc@2c00 { /* PSC6 in UART mode */
87                         compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
88                 };
89
90                 ethernet@3000 {
91                         phy-handle = <&phy0>;
92                 };
93
94                 mdio@3000 {
95                         phy0: ethernet-phy@0 {
96                                 reg = <0>;
97                         };
98                 };
99
100                 i2c@3d40 {
101                         rtc@51 {
102                                 compatible = "nxp,pcf8563";
103                                 reg = <0x51>;
104                         };
105                         eeprom@52 {
106                                 compatible = "catalyst,24c32";
107                                 reg = <0x52>;
108                                 pagesize = <32>;
109                         };
110                 };
111
112                 sram@8000 {
113                         compatible = "fsl,mpc5200b-sram","fsl,mpc5200-sram";
114                         reg = <0x8000 0x4000>;
115                 };
116         };
117
118         pci@f0000d00 {
119                 interrupt-map-mask = <0xf800 0 0 7>;
120                 interrupt-map = <0xc000 0 0 1 &mpc5200_pic 0 0 3 // 1st slot
121                                  0xc000 0 0 2 &mpc5200_pic 1 1 3
122                                  0xc000 0 0 3 &mpc5200_pic 1 2 3
123                                  0xc000 0 0 4 &mpc5200_pic 1 3 3
124
125                                  0xc800 0 0 1 &mpc5200_pic 1 1 3 // 2nd slot
126                                  0xc800 0 0 2 &mpc5200_pic 1 2 3
127                                  0xc800 0 0 3 &mpc5200_pic 1 3 3
128                                  0xc800 0 0 4 &mpc5200_pic 0 0 3>;
129                 ranges = <0x42000000 0 0x80000000 0x80000000 0 0x20000000
130                           0x02000000 0 0xa0000000 0xa0000000 0 0x10000000
131                           0x01000000 0 0x00000000 0xb0000000 0 0x01000000>;
132         };
133
134         localbus {
135                 status = "disabled";
136         };
137 };