2 * P5040 Silicon/SoC Device Tree Source (post include)
4 * Copyright 2012 Freescale Semiconductor Inc.
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36 compatible = "fsl,p5040-elbc", "fsl,elbc", "simple-bus";
37 interrupts = <25 2 0 0>;
42 /* controller at 0x200000 */
44 compatible = "fsl,p5040-pcie", "fsl,qoriq-pcie-v2.4";
48 bus-range = <0x0 0xff>;
49 clock-frequency = <33333333>;
50 interrupts = <16 2 1 15>;
53 #interrupt-cells = <1>;
57 interrupts = <16 2 1 15>;
58 interrupt-map-mask = <0xf800 0 0 7>;
61 0000 0 0 1 &mpic 40 1 0 0
62 0000 0 0 2 &mpic 1 1 0 0
63 0000 0 0 3 &mpic 2 1 0 0
64 0000 0 0 4 &mpic 3 1 0 0
69 /* controller at 0x201000 */
71 compatible = "fsl,p5040-pcie", "fsl,qoriq-pcie-v2.4";
76 clock-frequency = <33333333>;
77 interrupts = <16 2 1 14>;
80 #interrupt-cells = <1>;
84 interrupts = <16 2 1 14>;
85 interrupt-map-mask = <0xf800 0 0 7>;
88 0000 0 0 1 &mpic 41 1 0 0
89 0000 0 0 2 &mpic 5 1 0 0
90 0000 0 0 3 &mpic 6 1 0 0
91 0000 0 0 4 &mpic 7 1 0 0
96 /* controller at 0x202000 */
98 compatible = "fsl,p5040-pcie", "fsl,qoriq-pcie-v2.4";
101 #address-cells = <3>;
102 bus-range = <0x0 0xff>;
103 clock-frequency = <33333333>;
104 interrupts = <16 2 1 13>;
107 #interrupt-cells = <1>;
109 #address-cells = <3>;
111 interrupts = <16 2 1 13>;
112 interrupt-map-mask = <0xf800 0 0 7>;
115 0000 0 0 1 &mpic 42 1 0 0
116 0000 0 0 2 &mpic 9 1 0 0
117 0000 0 0 3 &mpic 10 1 0 0
118 0000 0 0 4 &mpic 11 1 0 0
124 #address-cells = <1>;
126 compatible = "fsl,dcsr", "simple-bus";
129 compatible = "fsl,dcsr-epu";
130 interrupts = <52 2 0 0
136 compatible = "fsl,dcsr-npc";
137 reg = <0x1000 0x1000 0x1000000 0x8000>;
140 compatible = "fsl,dcsr-nxc";
141 reg = <0x2000 0x1000>;
144 compatible = "fsl,dcsr-corenet";
145 reg = <0x8000 0x1000 0xB0000 0x1000>;
148 compatible = "fsl,p5040-dcsr-dpaa", "fsl,dcsr-dpaa";
149 reg = <0x9000 0x1000>;
152 compatible = "fsl,p5040-dcsr-ocn", "fsl,dcsr-ocn";
153 reg = <0x11000 0x1000>;
156 compatible = "fsl,dcsr-ddr";
157 dev-handle = <&ddr1>;
158 reg = <0x12000 0x1000>;
161 compatible = "fsl,dcsr-ddr";
162 dev-handle = <&ddr2>;
163 reg = <0x13000 0x1000>;
166 compatible = "fsl,p5040-dcsr-nal", "fsl,dcsr-nal";
167 reg = <0x18000 0x1000>;
170 compatible = "fsl,p5040-dcsr-rcpm", "fsl,dcsr-rcpm";
171 reg = <0x22000 0x1000>;
173 dcsr-cpu-sb-proxy@40000 {
174 compatible = "fsl,dcsr-e5500-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
175 cpu-handle = <&cpu0>;
176 reg = <0x40000 0x1000>;
178 dcsr-cpu-sb-proxy@41000 {
179 compatible = "fsl,dcsr-e5500-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
180 cpu-handle = <&cpu1>;
181 reg = <0x41000 0x1000>;
183 dcsr-cpu-sb-proxy@42000 {
184 compatible = "fsl,dcsr-e5500-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
185 cpu-handle = <&cpu2>;
186 reg = <0x42000 0x1000>;
188 dcsr-cpu-sb-proxy@43000 {
189 compatible = "fsl,dcsr-e5500-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
190 cpu-handle = <&cpu3>;
191 reg = <0x43000 0x1000>;
196 #address-cells = <1>;
199 compatible = "simple-bus";
202 compatible = "fsl,soc-sram-error";
203 interrupts = <16 2 1 29>;
207 compatible = "fsl,corenet-law";
212 ddr1: memory-controller@8000 {
213 compatible = "fsl,qoriq-memory-controller-v4.5", "fsl,qoriq-memory-controller";
214 reg = <0x8000 0x1000>;
215 interrupts = <16 2 1 23>;
218 ddr2: memory-controller@9000 {
219 compatible = "fsl,qoriq-memory-controller-v4.5","fsl,qoriq-memory-controller";
220 reg = <0x9000 0x1000>;
221 interrupts = <16 2 1 22>;
224 cpc: l3-cache-controller@10000 {
225 compatible = "fsl,p5040-l3-cache-controller", "fsl,p4080-l3-cache-controller", "cache";
226 reg = <0x10000 0x1000
228 interrupts = <16 2 1 27
233 compatible = "fsl,corenet-cf";
234 reg = <0x18000 0x1000>;
235 interrupts = <16 2 1 31>;
236 fsl,ccf-num-csdids = <32>;
237 fsl,ccf-num-snoopids = <32>;
241 compatible = "fsl,pamu-v1.0", "fsl,pamu";
242 reg = <0x20000 0x5000>;
248 /include/ "qoriq-mpic.dtsi"
250 guts: global-utilities@e0000 {
251 compatible = "fsl,p5040-device-config", "fsl,qoriq-device-config-1.0";
252 reg = <0xe0000 0xe00>;
255 fsl,liodn-bits = <12>;
258 pins: global-utilities@e0e00 {
259 compatible = "fsl,p5040-pin-control", "fsl,qoriq-pin-control-1.0";
260 reg = <0xe0e00 0x200>;
264 clockgen: global-utilities@e1000 {
265 compatible = "fsl,p5040-clockgen", "fsl,qoriq-clockgen-1.0";
266 reg = <0xe1000 0x1000>;
267 clock-frequency = <0>;
270 rcpm: global-utilities@e2000 {
271 compatible = "fsl,p5040-rcpm", "fsl,qoriq-rcpm-1.0";
272 reg = <0xe2000 0x1000>;
277 compatible = "fsl,p5040-sfp", "fsl,qoriq-sfp-1.0";
278 reg = <0xe8000 0x1000>;
281 serdes: serdes@ea000 {
282 compatible = "fsl,p5040-serdes";
283 reg = <0xea000 0x1000>;
286 /include/ "qoriq-dma-0.dtsi"
287 /include/ "qoriq-dma-1.dtsi"
288 /include/ "qoriq-espi-0.dtsi"
290 fsl,espi-num-chipselects = <4>;
293 /include/ "qoriq-esdhc-0.dtsi"
298 /include/ "qoriq-i2c-0.dtsi"
299 /include/ "qoriq-i2c-1.dtsi"
300 /include/ "qoriq-duart-0.dtsi"
301 /include/ "qoriq-duart-1.dtsi"
302 /include/ "qoriq-gpio-0.dtsi"
303 /include/ "qoriq-usb2-mph-0.dtsi"
305 compatible = "fsl-usb2-mph-v1.6", "fsl,mpc85xx-usb2-mph", "fsl-usb2-mph";
310 /include/ "qoriq-usb2-dr-0.dtsi"
312 compatible = "fsl-usb2-dr-v1.6", "fsl,mpc85xx-usb2-dr", "fsl-usb2-dr";
317 /include/ "qoriq-sata2-0.dtsi"
318 /include/ "qoriq-sata2-1.dtsi"
319 /include/ "qoriq-sec5.2-0.dtsi"