1 /* Kernel link layout for various "sections"
3 * Copyright (C) 1999-2003 Matthew Wilcox <willy at parisc-linux.org>
4 * Copyright (C) 2000-2003 Paul Bame <bame at parisc-linux.org>
5 * Copyright (C) 2000 John Marvin <jsm at parisc-linux.org>
6 * Copyright (C) 2000 Michael Ang <mang with subcarrier.org>
7 * Copyright (C) 2002 Randolph Chung <tausq with parisc-linux.org>
8 * Copyright (C) 2003 James Bottomley <jejb with parisc-linux.org>
9 * Copyright (C) 2006 Helge Deller <deller@gmx.de>
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2 of the License, or
15 * (at your option) any later version.
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
26 #include <asm-generic/vmlinux.lds.h>
27 /* needed for the processor specific cache alignment size */
28 #include <asm/cache.h>
30 #include <asm/asm-offsets.h>
32 /* ld script to make hppa Linux kernel */
34 OUTPUT_FORMAT("elf32-hppa-linux")
37 OUTPUT_FORMAT("elf64-hppa-linux")
38 OUTPUT_ARCH(hppa:hppa2.0w)
43 jiffies = jiffies_64 + 4;
49 . = KERNEL_BINARY_TEXT_START;
51 _text = .; /* Text and read-only data */
61 *(.text.do_sigaltstack)
65 *(.lock.text) /* out-of-line lock text */
68 /* End of text section */
74 /* Make sure this is page aligned so
75 * that we can properly leave these
83 __start___ex_table = .;
85 __stop___ex_table = .;
97 /* rarely changed data like cpu maps */
103 . = ALIGN(L1_CACHE_BYTES);
110 . = ALIGN(L1_CACHE_BYTES);
111 .data.cacheline_aligned : {
112 *(.data.cacheline_aligned)
115 /* PA-RISC locks requires 16-byte alignment */
117 .data.lock_aligned : {
118 *(.data.lock_aligned)
121 /* nosave data is really only used for software suspend...it's here
122 * just in case we ever implement it
124 . = ALIGN(PAGE_SIZE);
129 . = ALIGN(PAGE_SIZE);
132 /* End of data section */
137 /* page table entries need to be PAGE_SIZE aligned */
138 . = ALIGN(PAGE_SIZE);
151 /* assembler code expects init_task to be 16k aligned */
163 } PROVIDE (__gp = .);
172 /* reserve space for interrupt stack by aligning __init* to 16k */
190 __initcall_start = .;
194 .con_initcall.init : {
195 __con_initcall_start = .;
196 *(.con_initcall.init)
197 __con_initcall_end = .;
201 /* alternate instruction replacement. This is a mechanism x86 uses
202 * to detect the CPU type and replace generic instruction sequences
203 * with CPU specific ones. We don't currently do this in PA, but
204 * it seems like a good idea...
208 __alt_instructions = .;
210 __alt_instructions_end = .;
212 .altinstr_replacement : {
213 *(.altinstr_replacement)
216 /* .exit.text is discard at runtime, not link time, to deal with references
217 * from .altinstructions and .eh_frame
225 #ifdef CONFIG_BLK_DEV_INITRD
226 . = ALIGN(PAGE_SIZE);
228 __initramfs_start = .;
235 . = ALIGN(PAGE_SIZE);
237 /* freed after init ends here */
240 /* Sections to be discarded */
244 /* temporary hack until binutils is fixed to not emit these
245 * for static binaries
257 .note 0 : { *(.note) }