1 /* SPDX-License-Identifier: GPL-2.0-or-later */
5 * Hand-optimized assembler version of memset for OpenRISC.
6 * Algorithm inspired by several other arch-specific memset routines
9 * Copyright (C) 2015 Olof Kindgren <olof.kindgren@gmail.com>
13 .type memset, @function
19 * r13, r15, r17, r19 used as temp regs
26 /* Truncate c to char */
29 /* Skip word extension if c is 0 */
32 /* Check for at least two whole words (8 bytes) */
35 /* Extend char c to 32-bit word cccc in r13 */
36 l.slli r15, r13, 16 // r13 = 000c, r15 = 0c00
37 l.or r13, r13, r15 // r13 = 0c0c, r15 = 0c00
38 l.slli r15, r13, 8 // r13 = 0c0c, r15 = c0c0
39 l.or r13, r13, r15 // r13 = cccc, r15 = c0c0
41 1: l.addi r19, r3, 0 // Set r19 = src
42 /* Jump to byte copy loop if less than two words */
44 l.or r17, r5, r0 // Set r17 = n
46 /* Mask out two LSBs to check alignment */
49 /* lsb == 00, jump to word copy loop */
52 l.addi r19, r3, 0 // Set r19 = src
54 /* lsb == 01,10 or 11 */
55 l.sb 0(r3), r13 // *src = c
56 l.addi r17, r17, -1 // Decrease n
60 l.addi r19, r3, 1 // src += 1
63 l.sb 1(r3), r13 // *(src+1) = c
64 l.addi r17, r17, -1 // Decrease n
68 l.addi r19, r3, 2 // src += 2
71 l.sb 2(r3), r13 // *(src+2) = c
72 l.addi r17, r17, -1 // Decrease n
73 l.addi r19, r3, 3 // src += 3
76 2: l.sw 0(r19), r13 // *src = cccc
77 l.addi r17, r17, -4 // Decrease n
80 l.addi r19, r19, 4 // Increase src
82 /* When n > 0, copy the remaining bytes, otherwise jump to exit */
87 3: l.addi r17, r17, -1 // Decrease n
88 l.sb 0(r19), r13 // *src = cccc
91 l.addi r19, r19, 1 // Increase src