1 // SPDX-License-Identifier: GPL-2.0+
3 * (C) Copyright 2004, Psyent Corporation <www.psyent.com>
4 * Scott McNutt <smcnutt@psyent.com>
16 #include <asm/cache.h>
17 #include <asm/global_data.h>
18 #include <asm/system.h>
20 DECLARE_GLOBAL_DATA_PTR;
22 #ifdef CONFIG_DISPLAY_CPUINFO
23 int print_cpuinfo(void)
25 printf("CPU: Nios-II\n");
28 #endif /* CONFIG_DISPLAY_CPUINFO */
30 #ifdef CONFIG_ALTERA_SYSID
38 int do_reset(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
41 /* indirect call to go beyond 256MB limitation of toolchain */
42 nios2_callr(gd->arch.reset_addr);
47 * COPY EXCEPTION TRAMPOLINE -- copy the tramp to the
48 * exception address. Define CONFIG_ROM_STUBS to prevent
49 * the copy (e.g. exception in flash or in other
50 * softare/firmware component).
52 #ifndef CONFIG_ROM_STUBS
53 static void copy_exception_trampoline(void)
55 extern int _except_start, _except_end;
56 void *except_target = (void *)gd->arch.exception_addr;
58 if (&_except_start != except_target) {
59 memcpy(except_target, &_except_start,
60 &_except_end - &_except_start);
61 flush_cache(gd->arch.exception_addr,
62 &_except_end - &_except_start);
67 static int nios_cpu_setup(void *ctx, struct event *event)
72 ret = uclass_first_device_err(UCLASS_CPU, &dev);
76 gd->ram_size = CONFIG_SYS_SDRAM_SIZE;
77 #ifndef CONFIG_ROM_STUBS
78 copy_exception_trampoline();
83 EVENT_SPY(EVT_DM_POST_INIT, nios_cpu_setup);
85 static int altera_nios2_get_desc(const struct udevice *dev, char *buf,
88 const char *cpu_name = "Nios-II";
90 if (size < strlen(cpu_name))
92 strcpy(buf, cpu_name);
97 static int altera_nios2_get_info(const struct udevice *dev,
98 struct cpu_info *info)
100 info->cpu_freq = gd->cpu_clk;
101 info->features = (1 << CPU_FEAT_L1_CACHE) |
102 (gd->arch.has_mmu ? (1 << CPU_FEAT_MMU) : 0);
107 static int altera_nios2_get_count(const struct udevice *dev)
112 static int altera_nios2_probe(struct udevice *dev)
114 const void *blob = gd->fdt_blob;
115 int node = dev_of_offset(dev);
117 gd->cpu_clk = fdtdec_get_int(blob, node,
118 "clock-frequency", 0);
119 gd->arch.dcache_line_size = fdtdec_get_int(blob, node,
120 "dcache-line-size", 0);
121 gd->arch.icache_line_size = fdtdec_get_int(blob, node,
122 "icache-line-size", 0);
123 gd->arch.dcache_size = fdtdec_get_int(blob, node,
125 gd->arch.icache_size = fdtdec_get_int(blob, node,
127 gd->arch.reset_addr = fdtdec_get_int(blob, node,
128 "altr,reset-addr", 0);
129 gd->arch.exception_addr = fdtdec_get_int(blob, node,
130 "altr,exception-addr", 0);
131 gd->arch.has_initda = fdtdec_get_int(blob, node,
132 "altr,has-initda", 0);
133 gd->arch.has_mmu = fdtdec_get_int(blob, node,
135 gd->arch.io_region_base = gd->arch.has_mmu ? 0xe0000000 : 0x80000000;
136 gd->arch.mem_region_base = gd->arch.has_mmu ? 0xc0000000 : 0x00000000;
137 gd->arch.physaddr_mask = gd->arch.has_mmu ? 0x1fffffff : 0x7fffffff;
142 static const struct cpu_ops altera_nios2_ops = {
143 .get_desc = altera_nios2_get_desc,
144 .get_info = altera_nios2_get_info,
145 .get_count = altera_nios2_get_count,
148 static const struct udevice_id altera_nios2_ids[] = {
149 { .compatible = "altr,nios2-1.0" },
150 { .compatible = "altr,nios2-1.1" },
154 U_BOOT_DRIVER(altera_nios2) = {
155 .name = "altera_nios2",
157 .of_match = altera_nios2_ids,
158 .probe = altera_nios2_probe,
159 .ops = &altera_nios2_ops,
160 .flags = DM_FLAG_PRE_RELOC,
163 /* This is a dummy function on nios2 */