nds32: Support AG101P timer DM.
[platform/kernel/u-boot.git] / arch / nds32 / dts / ag101p.dts
1 /dts-v1/;
2 / {
3         compatible = "nds32 ag101p";
4         #address-cells = <1>;
5         #size-cells = <1>;
6         interrupt-parent = <&intc>;
7
8         aliases {
9                 uart0 = &serial0;
10         } ;
11
12         chosen {
13                 /* bootargs = "console=ttyS0,38400n8 earlyprintk=uart8250-32bit,0x99600000 debug bootmem_debug memblock=debug loglevel=7"; */
14                 bootargs = "console=ttyS0,38400n8 earlyprintk=uart8250-32bit,0x99600000 debug loglevel=7";
15                 stdout-path = "uart0:38400n8";
16                 tick-timer = &timer0;
17         };
18
19         memory@0 {
20                 device_type = "memory";
21                 reg = <0x00000000 0x40000000>;
22         };
23
24         cpus {
25                 #address-cells = <1>;
26                 #size-cells = <0>;
27                 cpu@0 {
28                         compatible = "andestech,n13";
29                         reg = <0>;
30                         /* FIXME: to fill correct frqeuency */
31                         clock-frequency = <60000000>;
32                 };
33         };
34
35         intc: interrupt-controller {
36                 compatible = "andestech,atnointc010";
37                 #interrupt-cells = <1>;
38                 interrupt-controller;
39         };
40
41         serial0: serial@99600000 {
42                 compatible = "andestech,uart16550", "ns16550a";
43                 reg = <0x99600000 0x1000>;
44                 interrupts = <7 4>;
45                 clock-frequency = <14745600>;
46                 reg-shift = <2>;
47                 no-loopback-test = <1>;
48         };
49
50         timer0: timer@98400000 {
51                 compatible = "andestech,attmr010";
52                 reg = <0x98400000 0x1000>;
53                 interrupts = <19 4>;
54                 clock-frequency = <15000000>;
55         };
56
57 };