2 * Copyright 2003-2011 NetLogic Microsystems, Inc. (NetLogic). All rights
5 * This software is available to you under a choice of one of two
6 * licenses. You may choose to be licensed under the terms of the GNU
7 * General Public License (GPL) Version 2, available from the file
8 * COPYING in the main directory of this source tree, or the NetLogic
11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions
15 * 1. Redistributions of source code must retain the above copyright
16 * notice, this list of conditions and the following disclaimer.
17 * 2. Redistributions in binary form must reproduce the above copyright
18 * notice, this list of conditions and the following disclaimer in
19 * the documentation and/or other materials provided with the
22 * THIS SOFTWARE IS PROVIDED BY NETLOGIC ``AS IS'' AND ANY EXPRESS OR
23 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
24 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
25 * ARE DISCLAIMED. IN NO EVENT SHALL NETLOGIC OR CONTRIBUTORS BE LIABLE
26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
27 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
28 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
29 * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
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32 * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
35 #include <linux/types.h>
36 #include <linux/kernel.h>
38 #include <linux/delay.h>
40 #include <asm/mipsregs.h>
43 #include <asm/netlogic/common.h>
44 #include <asm/netlogic/haldefs.h>
45 #include <asm/netlogic/xlp-hal/iomap.h>
46 #include <asm/netlogic/xlp-hal/xlp.h>
47 #include <asm/netlogic/xlp-hal/pic.h>
48 #include <asm/netlogic/xlp-hal/sys.h>
50 /* Main initialization */
51 void nlm_node_init(int node)
53 struct nlm_soc_info *nodep;
55 nodep = nlm_get_node(node);
56 nodep->sysbase = nlm_get_sys_regbase(node);
57 nodep->picbase = nlm_get_pic_regbase(node);
58 nodep->ebase = read_c0_ebase() & (~((1 << 12) - 1));
59 spin_lock_init(&nodep->piclock);
62 int nlm_irq_to_irt(int irq)
69 devoff = XLP_IO_UART0_OFFSET(0);
72 devoff = XLP_IO_UART1_OFFSET(0);
75 devoff = XLP_IO_USB_EHCI0_OFFSET(0);
78 devoff = XLP_IO_USB_EHCI1_OFFSET(0);
81 devoff = XLP_IO_USB_OHCI0_OFFSET(0);
84 devoff = XLP_IO_USB_OHCI1_OFFSET(0);
87 devoff = XLP_IO_USB_OHCI2_OFFSET(0);
90 devoff = XLP_IO_USB_OHCI3_OFFSET(0);
93 devoff = XLP_IO_SD_OFFSET(0);
96 devoff = XLP_IO_I2C0_OFFSET(0);
99 devoff = XLP_IO_I2C1_OFFSET(0);
107 pcibase = nlm_pcicfg_base(devoff);
108 irt = nlm_read_reg(pcibase, XLP_PCI_IRTINFO_REG) & 0xffff;
109 /* HW bug, I2C 1 irt entry is off by one */
110 if (irq == PIC_I2C_1_IRQ)
112 } else if (irq >= PIC_PCIE_LINK_0_IRQ && irq <= PIC_PCIE_LINK_3_IRQ) {
113 /* HW bug, PCI IRT entries are bad on early silicon, fix */
114 irt = PIC_IRT_PCIE_LINK_INDEX(irq - PIC_PCIE_LINK_0_IRQ);
121 unsigned int nlm_get_core_frequency(int node, int core)
123 unsigned int pll_divf, pll_divr, dfs_div, ext_div;
124 unsigned int rstval, dfsval, denom;
125 uint64_t num, sysbase;
127 sysbase = nlm_get_node(node)->sysbase;
128 rstval = nlm_read_sys_reg(sysbase, SYS_POWER_ON_RESET_CFG);
129 dfsval = nlm_read_sys_reg(sysbase, SYS_CORE_DFS_DIV_VALUE);
130 pll_divf = ((rstval >> 10) & 0x7f) + 1;
131 pll_divr = ((rstval >> 8) & 0x3) + 1;
132 ext_div = ((rstval >> 30) & 0x3) + 1;
133 dfs_div = ((dfsval >> (core * 4)) & 0xf) + 1;
135 num = 800000000ULL * pll_divf;
136 denom = 3 * pll_divr * ext_div * dfs_div;
138 return (unsigned int)num;
141 unsigned int nlm_get_cpu_frequency(void)
143 return nlm_get_core_frequency(0, 0);