1 /* SPDX-License-Identifier: GPL-2.0 */
3 * Copyright (C) 2020 Stefan Roese <sr@denx.de>
7 #include <asm-offsets.h>
8 #include <asm/cacheops.h>
9 #include <asm/regdef.h>
10 #include <asm/mipsregs.h>
11 #include <asm/addrspace.h>
21 LEAF(mips_mach_early_init)
29 /* Get the actual address that we are running at */
31 dsubu t3, ra, a7 /* t3 now has reloc offset */
34 daddu t0, t1, t3 /* t0 now has actual address of _start */
36 /* Calculate end address of copy loop */
38 daddiu t2, t2, 0x4000 /* Increase size to include appended DTB */
40 ins t2, zero, 0, 7 /* Round up to cache line for memcpy */
42 /* Copy ourself to the L2 cache from flash, 32 bytes at a time */
60 * Return to start.S now running from TEXT_BASE, which points
61 * to DRAM address space, which effectively is L2 cache now.
62 * This speeds up the init process extremely, especially the
65 dsubu s0, s0, t3 /* Fixup return address with reloc offset */
66 jr.hb s0 /* Jump back with hazard barrier */
69 END(mips_mach_early_init)