1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (C) 2020 Stefan Roese <sr@denx.de>
9 #include <asm/global_data.h>
10 #include <linux/compat.h>
11 #include <display_options.h>
13 DECLARE_GLOBAL_DATA_PTR;
15 #define UBOOT_RAM_SIZE_MAX 0x10000000ULL
19 if (IS_ENABLED(CONFIG_RAM_OCTEON)) {
24 ret = uclass_get_device(UCLASS_RAM, 0, &dev);
26 debug("DRAM init failed: %d\n", ret);
30 ret = ram_get_info(dev, &ram);
32 debug("Cannot get DRAM size: %d\n", ret);
36 gd->ram_size = min_t(size_t, ram.size, UBOOT_RAM_SIZE_MAX);
37 debug("SDRAM base=%lx, size=%lx\n",
38 (unsigned long)ram.base, (unsigned long)ram.size);
41 * No DDR init yet -> run in L2 cache
43 gd->ram_size = (4 << 20);
44 gd->bd->bi_dram[0].size = gd->ram_size;
45 gd->bd->bi_dram[1].size = 0;
51 void board_add_ram_info(int use_default)
53 if (IS_ENABLED(CONFIG_RAM_OCTEON)) {
58 ret = uclass_get_device(UCLASS_RAM, 0, &dev);
60 debug("DRAM init failed: %d\n", ret);
64 ret = ram_get_info(dev, &ram);
66 debug("Cannot get DRAM size: %d\n", ret);
71 print_size(ram.size, " total)");
75 ulong board_get_usable_ram_top(ulong total_size)
77 if (IS_ENABLED(CONFIG_RAM_OCTEON)) {
78 /* Map a maximum of 256MiB - return not size but address */
79 return CONFIG_SYS_SDRAM_BASE + min(gd->ram_size,