1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (C) 2020 Stefan Roese <sr@denx.de>
14 #include <linux/compat.h>
15 #include <linux/ctype.h>
16 #include <linux/delay.h>
19 #include <mach/cvmx-coremask.h>
20 #include <mach/cvmx-bootinfo.h>
21 #include <mach/cvmx-bootmem.h>
22 #include <mach/cvmx-regs.h>
23 #include <mach/cvmx-fuse.h>
24 #include <mach/octeon-model.h>
25 #include <mach/octeon-feature.h>
26 #include <mach/bootoct_cmd.h>
28 DECLARE_GLOBAL_DATA_PTR;
30 /* ToDo: Revisit these settings */
31 #define OCTEON_RESERVED_LOW_MEM_SIZE (512 * 1024)
32 #define OCTEON_RESERVED_LOW_BOOT_MEM_SIZE (1024 * 1024)
33 #define BOOTLOADER_BOOTMEM_DESC_SPACE (1024 * 1024)
35 /* Default stack and heap sizes, in bytes */
36 #define DEFAULT_STACK_SIZE (1 * 1024 * 1024)
37 #define DEFAULT_HEAP_SIZE (3 * 1024 * 1024)
40 * NOTE: This must duplicate octeon_boot_descriptor_t in the toolchain
41 * octeon-app-init.h file.
44 /* If set, core should do app-wide init, only one core per app will have
47 BOOT_FLAG_INIT_CORE = 1,
48 OCTEON_BL_FLAG_DEBUG = 1 << 1,
49 OCTEON_BL_FLAG_NO_MAGIC = 1 << 2,
50 /* If set, use uart1 for console */
51 OCTEON_BL_FLAG_CONSOLE_UART1 = 1 << 3,
52 OCTEON_BL_FLAG_CONSOLE_PCI = 1 << 4, /* If set, use PCI console */
53 /* Call exit on break on serial port */
54 OCTEON_BL_FLAG_BREAK = 1 << 5,
56 * Be sure to update OCTEON_APP_INIT_H_VERSION when new fields are added
57 * and to conditionalize the new flag's usage based on the version.
59 } octeon_boot_descriptor_flag;
62 * NOTE: This must duplicate octeon_boot_descriptor_t in the toolchain
63 * octeon-app-init.h file.
65 #ifndef OCTEON_CURRENT_DESC_VERSION
66 # define OCTEON_CURRENT_DESC_VERSION 7
69 * NOTE: This must duplicate octeon_boot_descriptor_t in the toolchain
70 * octeon-app-init.h file.
72 /* Version 7 changes: Change names of deprecated fields */
73 #ifndef OCTEON_ARGV_MAX_ARGS
74 # define OCTEON_ARGV_MAX_ARGS 64
78 * NOTE: This must duplicate octeon_boot_descriptor_t in the toolchain
79 * octeon-app-init.h file.
81 #ifndef OCTEON_SERIAL_LEN
82 # define OCTEON_SERIAL_LEN 20
86 * Bootloader structure used to pass info to Octeon executive startup code.
87 * NOTE: all fields are deprecated except for:
97 * * debugger_flags_base_addr
99 * All other fields have been moved to the cvmx_descriptor, and the new
100 * fields should be added there. They are left as placeholders in this
101 * structure for binary compatibility.
103 * NOTE: This structure must match what is in the toolchain octeon-app-init.h
106 struct octeon_boot_descriptor {
107 /* Start of block referenced by assembly code - do not change! */
115 /* End of block referenced by assembly code - do not change! */
119 u32 argc; /* argc for main() */
120 u32 argv[OCTEON_ARGV_MAX_ARGS]; /* argv for main() */
121 u32 flags; /* Flags for application */
122 u32 core_mask; /* Coremask running this image */
123 u32 dram_size; /* DEPRECATED, DRAM size in megabyes. Used up to SDK 1.8.1 */
124 u32 phy_mem_desc_addr;
125 u32 debugger_flags_base_addr; /* used to pass flags from app to debugger. */
126 u32 eclock_hz; /* CPU clock speed, in hz. */
135 char deprecated2[OCTEON_SERIAL_LEN];
138 u64 cvmx_desc_vaddr; /* Address of cvmx descriptor */
141 static struct octeon_boot_descriptor boot_desc[CVMX_MIPS_MAX_CORES];
142 static struct cvmx_bootinfo cvmx_bootinfo_array[CVMX_MIPS_MAX_CORES];
145 * Programs the boot bus moveable region
146 * @param base base address to place the boot bus moveable region
148 * @param region_num Selects which region, 0 or 1 for node 0,
150 * @param enable Set true to enable, false to disable
151 * @param data Pointer to data to put in the region, up to
153 * @param num_words Number of data dwords (up to 32)
155 * @return 0 for success, -1 on error
157 static int octeon_set_moveable_region(u32 base, int region_num,
158 bool enable, const u64 *data,
159 unsigned int num_words)
161 int node = region_num >> 1;
164 u8 node_mask = 0x01; /* ToDo: Currently only one node is supported */
166 debug("%s(0x%x, %d, %d, %p, %u)\n", __func__, base, region_num, enable,
169 if (num_words > 32) {
170 printf("%s: Too many words (%d) for region %d\n", __func__,
171 num_words, region_num);
176 printf("%s: Error: base address 0x%x must be 128 byte aligned\n",
181 if (region_num > (node_mask > 1 ? 3 : 1)) {
182 printf("%s: Region number %d out of range\n",
183 __func__, region_num);
187 if (!data && num_words > 0) {
188 printf("%s: Error: NULL data\n", __func__);
194 val = MIO_BOOT_LOC_CFG_EN |
195 FIELD_PREP(MIO_BOOT_LOC_CFG_BASE, base >> 7);
196 debug("%s: Setting MIO_BOOT_LOC_CFG(%d) on node %d to 0x%llx\n",
197 __func__, region_num, node, val);
198 csr_wr(CVMX_MIO_BOOT_LOC_CFGX(region_num & 1), val);
200 val = FIELD_PREP(MIO_BOOT_LOC_ADR_ADR, (region_num ? 0x80 : 0x00) >> 3);
201 debug("%s: Setting MIO_BOOT_LOC_ADR start to 0x%llx\n", __func__, val);
202 csr_wr(CVMX_MIO_BOOT_LOC_ADR, val);
204 for (i = 0; i < num_words; i++) {
205 debug(" 0x%02llx: 0x%016llx\n",
206 csr_rd(CVMX_MIO_BOOT_LOC_ADR), data[i]);
207 csr_wr(CVMX_MIO_BOOT_LOC_DAT, data[i]);
214 * Parse comma separated numbers into an array
216 * @param[out] values values read for each node
217 * @param[in] str string to parse
218 * @param base 0 for auto, otherwise 8, 10 or 16 for the number base
220 * @return number of values read.
222 static int octeon_parse_nodes(u64 values[CVMX_MAX_NODES],
223 const char *str, int base)
229 debug("Parsing node %d: \"%s\"\n", node, str);
230 values[node] = simple_strtoull(str, &sep, base);
231 debug(" node %d: 0x%llx\n", node, values[node]);
233 } while (++node < CVMX_MAX_NODES && *sep == ',');
235 debug("%s: returning %d\n", __func__, node);
240 * Parse command line arguments
242 * @param argc number of arguments
243 * @param[in] argv array of argument strings
244 * @param cmd command type
245 * @param[out] boot_args parsed values
247 * @return number of arguments parsed
249 int octeon_parse_bootopts(int argc, char *const argv[],
250 enum octeon_boot_cmd_type cmd,
251 struct octeon_boot_args *boot_args)
253 u64 node_values[CVMX_MAX_NODES];
257 u8 node_mask = 0x01; /* ToDo: Currently only one node is supported */
259 debug("%s(%d, %p, %d, %p)\n", __func__, argc, argv, cmd, boot_args);
260 memset(boot_args, 0, sizeof(*boot_args));
261 boot_args->stack_size = DEFAULT_STACK_SIZE;
262 boot_args->heap_size = DEFAULT_HEAP_SIZE;
263 boot_args->node_mask = 0;
265 for (arg = 0; arg < argc; arg++) {
266 debug(" argv[%d]: %s\n", arg, argv[arg]);
267 if (cmd == BOOTOCT && !strncmp(argv[arg], "stack=", 6)) {
268 boot_args->stack_size = simple_strtoul(argv[arg] + 6,
270 } else if (cmd == BOOTOCT && !strncmp(argv[arg], "heap=", 5)) {
271 boot_args->heap_size = simple_strtoul(argv[arg] + 5,
273 } else if (!strncmp(argv[arg], "debug", 5)) {
274 puts("setting debug flag!\n");
275 boot_args->boot_flags |= OCTEON_BL_FLAG_DEBUG;
276 } else if (cmd == BOOTOCT && !strncmp(argv[arg], "break", 5)) {
277 puts("setting break flag!\n");
278 boot_args->boot_flags |= OCTEON_BL_FLAG_BREAK;
279 } else if (!strncmp(argv[arg], "forceboot", 9)) {
280 boot_args->forceboot = true;
281 } else if (!strncmp(argv[arg], "nodemask=", 9)) {
282 boot_args->node_mask = simple_strtoul(argv[arg] + 9,
284 } else if (!strncmp(argv[arg], "numcores=", 9)) {
285 memset(node_values, 0, sizeof(node_values));
286 num_values = octeon_parse_nodes(node_values,
288 for (j = 0; j < num_values; j++)
289 boot_args->num_cores[j] = node_values[j];
290 boot_args->num_cores_set = true;
291 } else if (!strncmp(argv[arg], "skipcores=", 10)) {
292 memset(node_values, 0, sizeof(node_values));
293 num_values = octeon_parse_nodes(node_values,
295 for (j = 0; j < num_values; j++)
296 boot_args->num_skipped[j] = node_values[j];
297 boot_args->num_skipped_set = true;
298 } else if (!strncmp(argv[arg], "console_uart=", 13)) {
299 boot_args->console_uart = simple_strtoul(argv[arg] + 13,
301 if (boot_args->console_uart == 1) {
302 boot_args->boot_flags |=
303 OCTEON_BL_FLAG_CONSOLE_UART1;
304 } else if (!boot_args->console_uart) {
305 boot_args->boot_flags &=
306 ~OCTEON_BL_FLAG_CONSOLE_UART1;
308 } else if (!strncmp(argv[arg], "coremask=", 9)) {
309 memset(node_values, 0, sizeof(node_values));
310 num_values = octeon_parse_nodes(node_values,
312 for (j = 0; j < num_values; j++)
313 cvmx_coremask_set64_node(&boot_args->coremask,
315 boot_args->coremask_set = true;
316 } else if (cmd == BOOTOCTLINUX &&
317 !strncmp(argv[arg], "namedblock=", 11)) {
318 boot_args->named_block = argv[arg] + 11;
319 } else if (!strncmp(argv[arg], "endbootargs", 11)) {
320 boot_args->endbootargs = 1;
322 if (argc >= arg && cmd != BOOTOCTLINUX)
323 boot_args->app_name = argv[arg];
326 debug(" Unknown argument \"%s\"\n", argv[arg]);
330 if (boot_args->coremask_set && boot_args->num_cores_set) {
331 puts("Warning: both coremask and numcores are set, using coremask.\n");
332 } else if (!boot_args->coremask_set && !boot_args->num_cores_set) {
333 cvmx_coremask_set_core(&boot_args->coremask, 0);
334 boot_args->coremask_set = true;
335 } else if ((!boot_args->coremask_set) && boot_args->num_cores_set) {
336 cvmx_coremask_for_each_node(node, node_mask)
337 cvmx_coremask_set64_node(&boot_args->coremask, node,
338 ((1ull << boot_args->num_cores[node]) - 1) <<
339 boot_args->num_skipped[node]);
340 boot_args->coremask_set = true;
343 /* Update the node mask based on the coremask or the number of cores */
344 for (j = 0; j < CVMX_MAX_NODES; j++) {
345 if (cvmx_coremask_get64_node(&boot_args->coremask, j))
346 boot_args->node_mask |= 1 << j;
349 debug("%s: return %d\n", __func__, arg);
353 int do_bootoctlinux(struct cmd_tbl *cmdtp, int flag, int argc,
356 typedef void __noreturn (*kernel_entry_t)(int, ulong, ulong, ulong);
357 kernel_entry_t kernel;
358 struct octeon_boot_args boot_args;
361 u64 addr = 0; /* Address of the ELF image */
367 struct cvmx_coremask core_mask;
368 struct cvmx_coremask coremask_to_run;
369 struct cvmx_coremask avail_coremask;
377 cvmx_coremask_clear_all(&core_mask);
378 cvmx_coremask_clear_all(&coremask_to_run);
380 if (argc >= 2 && (isxdigit(argv[1][0]) && (isxdigit(argv[1][1]) ||
383 argv[1][1] == '\0'))) {
384 addr = simple_strtoul(argv[1], NULL, 16);
386 addr = CONFIG_SYS_LOAD_ADDR;
390 addr = CONFIG_SYS_LOAD_ADDR;
392 debug("%s: arg start: %d\n", __func__, arg_start);
393 arg_count = octeon_parse_bootopts(argc - arg_start, argv + arg_start,
394 BOOTOCTLINUX, &boot_args);
399 " stack size: 0x%x\n"
401 " boot flags: 0x%x\n"
403 " coremask set: %s\n"
404 " num cores set: %s\n"
405 " num skipped set: %s\n"
406 " endbootargs: %s\n",
408 boot_args.named_block ? boot_args.named_block : "none",
410 boot_args.stack_size,
412 boot_args.boot_flags,
413 boot_args.forceboot ? "true" : "false",
414 boot_args.coremask_set ? "true" : "false",
415 boot_args.num_cores_set ? "true" : "false",
416 boot_args.num_skipped_set ? "true" : "false",
417 boot_args.endbootargs ? "true" : "false");
418 debug(" num cores: ");
419 for (i = 0; i < CVMX_MAX_NODES; i++)
420 debug("%s%d", i > 0 ? ", " : "", boot_args.num_cores[i]);
421 debug("\n num skipped: ");
422 for (i = 0; i < CVMX_MAX_NODES; i++) {
423 debug("%s%d", i > 0 ? ", " : "", boot_args.num_skipped[i]);
424 debug("\n coremask:\n");
425 cvmx_coremask_dprint(&boot_args.coremask);
428 if (boot_args.endbootargs) {
429 debug("endbootargs set, adjusting argc from %d to %d, arg_count: %d, arg_start: %d\n",
430 argc, argc - (arg_count + arg_start), arg_count,
432 argc -= (arg_count + arg_start);
433 argv += (arg_count + arg_start);
437 * numcores specification overrides a coremask on the same command line
439 cvmx_coremask_copy(&core_mask, &boot_args.coremask);
442 * Remove cores from coremask based on environment variable stored in
445 if (validate_coremask(&core_mask) != 0) {
446 puts("Invalid coremask.\n");
448 } else if (cvmx_coremask_is_empty(&core_mask)) {
449 puts("Coremask is empty after coremask_override mask. Nothing to do.\n");
453 if (cvmx_coremask_intersects(&core_mask, &coremask_to_run)) {
454 puts("ERROR: Can't load code on core twice! Provided coremask:\n");
455 cvmx_coremask_print(&core_mask);
456 puts("overlaps previously loaded coremask:\n");
457 cvmx_coremask_print(&coremask_to_run);
461 debug("Setting up boot descriptor block with core mask:\n");
462 cvmx_coremask_dprint(&core_mask);
465 * Add coremask to global mask of cores that have been set up and are
468 cvmx_coremask_or(&coremask_to_run, &coremask_to_run, &core_mask);
471 * Load kernel ELF image, or try binary if ELF is not detected.
472 * This way the much smaller vmlinux.bin can also be started but
473 * has to be loaded at the correct address (ep as parameter).
475 if (!valid_elf_image(addr))
476 printf("Booting binary image instead (vmlinux.bin)...\n");
478 addr = load_elf_image_shdr(addr);
480 /* Set kernel entry point */
481 kernel = (kernel_entry_t)addr;
483 /* Init bootmem list for Linux kernel booting */
484 if (!cvmx_bootmem_phy_mem_list_init(
485 gd->ram_size, OCTEON_RESERVED_LOW_MEM_SIZE,
486 (void *)CKSEG0ADDR(BOOTLOADER_BOOTMEM_DESC_SPACE))) {
487 printf("FATAL: Error initializing free memory list\n");
491 first_core = cvmx_coremask_get_first_core(&coremask_to_run);
493 cvmx_coremask_for_each_core(core, &coremask_to_run) {
494 debug("%s: Activating core %d\n", __func__, core);
496 cvmx_bootinfo_array[core].core_mask =
497 cvmx_coremask_get32(&coremask_to_run);
498 cvmx_coremask_copy(&cvmx_bootinfo_array[core].ext_core_mask,
501 if (core == first_core)
502 cvmx_bootinfo_array[core].flags |= BOOT_FLAG_INIT_CORE;
504 cvmx_bootinfo_array[core].dram_size = gd->ram_size /
507 cvmx_bootinfo_array[core].dclock_hz = gd->mem_clk * 1000000;
508 cvmx_bootinfo_array[core].eclock_hz = gd->cpu_clk;
510 cvmx_bootinfo_array[core].led_display_base_addr = 0;
511 cvmx_bootinfo_array[core].phy_mem_desc_addr =
512 ((u32)(u64)__cvmx_bootmem_internal_get_desc_ptr()) &
515 cvmx_bootinfo_array[core].major_version = CVMX_BOOTINFO_MAJ_VER;
516 cvmx_bootinfo_array[core].minor_version = CVMX_BOOTINFO_MIN_VER;
517 cvmx_bootinfo_array[core].fdt_addr = virt_to_phys(gd->fdt_blob);
519 boot_desc[core].dram_size = gd->ram_size / (1024 * 1024);
520 boot_desc[core].cvmx_desc_vaddr =
521 virt_to_phys(&cvmx_bootinfo_array[core]);
523 boot_desc[core].desc_version = OCTEON_CURRENT_DESC_VERSION;
524 boot_desc[core].desc_size = sizeof(boot_desc[0]);
526 boot_desc[core].flags = cvmx_bootinfo_array[core].flags;
527 boot_desc[core].eclock_hz = cvmx_bootinfo_array[core].eclock_hz;
529 boot_desc[core].argc = argc;
530 for (i = 0; i < argc; i++)
531 boot_desc[core].argv[i] = (u32)virt_to_phys(argv[i]);
537 arg2 = 0x1; /* Core 0 sets init core for Linux */
538 arg3 = XKPHYS | virt_to_phys(&boot_desc[core]);
540 debug("## Transferring control to Linux (at address %p) ...\n", kernel);
543 * Flush cache before jumping to application. Let's flush the
544 * whole SDRAM area, since we don't know the size of the image
547 flush_cache(gd->ram_base, gd->ram_top - gd->ram_base);
549 /* Take all cores out of reset */
550 csr_wr(CVMX_CIU_PP_RST, 0);
553 /* Wait a short while for the other cores... */
556 /* Install boot code into moveable bus for NMI (other cores) */
557 nmi_code = (const u64 *)nmi_bootvector;
558 num_dwords = (((u64)&nmi_handler_para[0] - (u64)nmi_code) + 7) / 8;
560 ret = octeon_set_moveable_region(0x1fc00000, 0, true, nmi_code,
563 printf("Error installing NMI handler for SMP core startup\n");
567 /* Write NMI handler parameters for Linux kernel booting */
568 nmi_handler_para[0] = (u64)kernel;
569 nmi_handler_para[1] = arg0;
570 nmi_handler_para[2] = arg1;
571 nmi_handler_para[3] = 0; /* Don't set init core for secondary cores */
572 nmi_handler_para[4] = arg3;
575 /* Wait a short while for the other cores... */
579 * Cores have already been taken out of reset to conserve power.
580 * We need to send a NMI to get the cores out of their wait loop
582 octeon_get_available_coremask(&avail_coremask);
583 debug("Available coremask:\n");
584 cvmx_coremask_dprint(&avail_coremask);
585 debug("Starting coremask:\n");
586 cvmx_coremask_dprint(&coremask_to_run);
587 debug("Sending NMIs to other cores\n");
588 if (octeon_has_feature(OCTEON_FEATURE_CIU3)) {
592 cvmx_coremask_for_each_node(node, node_mask) {
593 avail_cm = cvmx_coremask_get64_node(&avail_coremask,
597 debug("Sending NMI to node %d, coremask=0x%llx, CIU3_NMI=0x%llx\n",
599 (node > 0 ? -1ull : -2ull) & avail_cm);
600 csr_wr(CVMX_CIU3_NMI,
601 (node > 0 ? -1ull : -2ull) & avail_cm);
606 -2ull & cvmx_coremask_get64(&avail_coremask));
608 debug("Done sending NMIs\n");
610 /* Wait a short while for the other cores... */
614 * pass address parameter as argv[0] (aka command name),
615 * and all remaining args
617 * a1 = argv (32 bit physical addresses, not pointers)
619 * a3 = boot descriptor address
620 * a4/t0 = entry point (only used by assembly stub)
622 kernel(arg0, arg1, arg2, arg3);
627 U_BOOT_CMD(bootoctlinux, 32, 0, do_bootoctlinux,
628 "Boot from a linux ELF image in memory",
629 "elf_address [coremask=mask_to_run | numcores=core_cnt_to_run] "
630 "[forceboot] [skipcores=core_cnt_to_skip] [namedblock=name] [endbootargs] [app_args ...]\n"
631 "elf_address - address of ELF image to load. If 0, default load address\n"
633 "coremask - mask of cores to run on. Anded with coremask_override\n"
634 " environment variable to ensure only working cores are used\n"
635 "numcores - number of cores to run on. Runs on specified number of cores,\n"
636 " taking into account the coremask_override.\n"
637 "skipcores - only meaningful with numcores. Skips this many cores\n"
638 " (starting from 0) when loading the numcores cores.\n"
639 " For example, setting skipcores to 1 will skip core 0\n"
640 " and load the application starting at the next available core.\n"
641 "forceboot - if set, boots application even if core 0 is not in mask\n"
642 "namedblock - specifies a named block to load the kernel\n"
643 "endbootargs - if set, bootloader does not process any further arguments and\n"
644 " only passes the arguments that follow to the kernel.\n"
645 " If not set, the kernel gets the entire commnad line as\n"
646 " arguments.\n" "\n");