2 # Loongson Processors' Support
5 cflags-$(CONFIG_CPU_LOONGSON2EF) += -Wa,--trap
6 cflags-$(CONFIG_CPU_LOONGSON2E) += -march=loongson2e
7 cflags-$(CONFIG_CPU_LOONGSON2F) += -march=loongson2f
9 # Some versions of binutils, not currently mainline as of 2019/02/04, support
10 # an -mfix-loongson3-llsc flag which emits a sync prior to each ll instruction
11 # to work around a CPU bug (see __SYNC_loongson3_war in asm/sync.h for a
14 # We disable this in order to prevent the assembler meddling with the
15 # instruction that labels refer to, ie. if we label an ll instruction:
19 # ...then with the assembler fix applied the label may actually point at a sync
20 # instruction inserted by the assembler, and if we were using the label in an
21 # exception table the table would no longer contain the address of the ll
24 # Avoid this by explicitly disabling that assembler behaviour. If upstream
25 # binutils does not merge support for the flag then we can revisit & remove
26 # this later - for now it ensures vendor toolchains don't cause problems.
28 cflags-$(CONFIG_CPU_LOONGSON2EF) += $(call as-option,-Wa$(comma)-mno-fix-loongson3-llsc,)
30 # Enable the workarounds for Loongson2f
31 ifdef CONFIG_CPU_LOONGSON2F_WORKAROUNDS
32 cflags-$(CONFIG_CPU_NOP_WORKAROUNDS) += -Wa,-mfix-loongson2f-nop
33 cflags-$(CONFIG_CPU_JUMP_WORKAROUNDS) += -Wa,-mfix-loongson2f-jump
36 # Some -march= flags enable MMI instructions, and GCC complains about that
37 # support being enabled alongside -msoft-float. Thus explicitly disable MMI.
38 cflags-y += $(call cc-option,-mno-loongson-mmi)
41 # Loongson Machines' Support
44 cflags-$(CONFIG_MACH_LOONGSON2EF) += -I$(srctree)/arch/mips/include/asm/mach-loongson2ef
45 cflags-$(CONFIG_CC_HAS_MNO_BRANCH_LIKELY) += -mno-branch-likely
46 load-$(CONFIG_LEMOTE_FULOONG2E) += 0xffffffff80100000
47 load-$(CONFIG_LEMOTE_MACH2F) += 0xffffffff80200000