1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (C) 1994 - 1999, 2000, 01, 06 Ralf Baechle
4 * Copyright (C) 1995, 1996 Paul M. Antoine
5 * Copyright (C) 1998 Ulf Carlsson
6 * Copyright (C) 1999 Silicon Graphics, Inc.
7 * Kevin D. Kissell, kevink@mips.com and Carsten Langgaard, carstenl@mips.com
8 * Copyright (C) 2002, 2003, 2004, 2005, 2007 Maciej W. Rozycki
9 * Copyright (C) 2000, 2001, 2012 MIPS Technologies, Inc. All rights reserved.
10 * Copyright (C) 2014, Imagination Technologies Ltd.
17 #include <asm/mipsregs.h>
18 #include <asm/addrspace.h>
19 #include <asm/system.h>
21 DECLARE_GLOBAL_DATA_PTR;
23 static unsigned long saved_ebase;
25 static void show_regs(const struct pt_regs *regs)
27 const int field = 2 * sizeof(unsigned long);
28 unsigned int cause = regs->cp0_cause;
33 * Saved main processor registers
35 for (i = 0; i < 32; ) {
39 printf(" %0*lx", field, 0UL);
40 else if (i == 26 || i == 27)
41 printf(" %*s", field, "");
43 printf(" %0*lx", field, regs->regs[i]);
50 printf("Hi : %0*lx\n", field, regs->hi);
51 printf("Lo : %0*lx\n", field, regs->lo);
56 printf("epc : %0*lx (text %0*lx)\n", field, regs->cp0_epc,
57 field, regs->cp0_epc - gd->reloc_off);
58 printf("ra : %0*lx (text %0*lx)\n", field, regs->regs[31],
59 field, regs->regs[31] - gd->reloc_off);
61 printf("Status: %08x\n", (uint32_t) regs->cp0_status);
63 exccode = (cause & CAUSEF_EXCCODE) >> CAUSEB_EXCCODE;
64 printf("Cause : %08x (ExcCode %02x)\n", cause, exccode);
66 if (1 <= exccode && exccode <= 5)
67 printf("BadVA : %0*lx\n", field, regs->cp0_badvaddr);
69 printf("PrId : %08x\n", read_c0_prid());
72 void do_reserved(const struct pt_regs *regs)
79 void do_ejtag_debug(const struct pt_regs *regs)
81 const int field = 2 * sizeof(unsigned long);
85 depc = read_c0_depc();
86 debug = read_c0_debug();
88 printf("SDBBP EJTAG debug exception: c0_depc = %0*lx, DEBUG = %08x\n",
92 static void set_handler(unsigned long offset, void *addr, unsigned long size)
94 unsigned long ebase = gd->irq_sp;
96 memcpy((void *)(ebase + offset), addr, size);
97 flush_cache(ebase + offset, size);
100 void trap_init(ulong reloc_addr)
102 unsigned long ebase = gd->irq_sp;
104 set_handler(0x180, &except_vec3_generic, 0x80);
105 set_handler(0x280, &except_vec_ejtag_debug, 0x80);
107 saved_ebase = read_c0_ebase() & 0xfffff000;
109 write_c0_ebase(ebase);
110 clear_c0_status(ST0_BEV);
111 execution_hazard_barrier();
114 void trap_restore(void)
116 set_c0_status(ST0_BEV);
117 execution_hazard_barrier();
119 #ifdef CONFIG_OVERRIDE_EXCEPTION_VECTOR_BASE
120 write_c0_ebase(CONFIG_NEW_EXCEPTION_VECTOR_BASE & 0xfffff000);
122 write_c0_ebase(saved_ebase);
125 clear_c0_status(ST0_BEV);
126 execution_hazard_barrier();