1 /* SPDX-License-Identifier: GPL-2.0 */
2 #include <asm/asm-offsets.h>
3 #include <asm/thread_info.h>
5 #define PAGE_SIZE _PAGE_SIZE
8 * Put .bss..swapper_pg_dir as the first thing in .bss. This will
9 * ensure that it has .bss alignment (64K).
11 #define BSS_FIRST_SECTIONS *(.bss..swapper_pg_dir)
13 /* Cavium Octeon should not have a separate PT_NOTE Program Header. */
14 #ifndef CONFIG_CAVIUM_OCTEON_SOC
18 #include <asm-generic/vmlinux.lds.h>
25 text PT_LOAD FLAGS(7); /* RWX */
26 #ifndef CONFIG_CAVIUM_OCTEON_SOC
27 note PT_NOTE FLAGS(4); /* R__ */
28 #endif /* CAVIUM_OCTEON_SOC */
32 #ifdef CONFIG_CPU_LITTLE_ENDIAN
35 jiffies = jiffies_64 + 4;
43 #ifdef CONFIG_BOOT_ELF64
44 /* Read-only sections, merged into text segment: */
45 /* . = 0xc000000000000000; */
47 /* This is the value for an Origin kernel, taken from an IRIX kernel. */
48 /* . = 0xc00000000001c000; */
50 /* Set the vaddr for the text segment to a value
51 * >= 0xa800 0000 0001 9000 if no symmon is going to configured
52 * >= 0xa800 0000 0030 0000 otherwise
55 /* . = 0xa800000000300000; */
56 . = 0xffffffff80300000;
58 . = LINKER_LOAD_ADDRESS;
60 _text = .; /* Text and read-only data */
72 *(.got) /* Global offset table */
74 _etext = .; /* End of text section */
78 /* Exception table for data bus errors */
80 __start___dbe_table = .;
82 __stop___dbe_table = .;
85 _sdata = .; /* Start of data section */
90 . = . + DATAOFFSET; /* for CONFIG_MAPPED_KERNEL */
92 INIT_TASK_DATA(THREAD_SIZE)
94 PAGE_ALIGNED_DATA(PAGE_SIZE)
95 CACHELINE_ALIGNED_DATA(1 << CONFIG_MIPS_L1_CACHE_SHIFT)
96 READ_MOSTLY_DATA(1 << CONFIG_MIPS_L1_CACHE_SHIFT)
108 /* We want the small data sections together, so single-instruction offsets
109 can access them all, and initialized data all before uninitialized, so
110 we can shorten the on-disk segment size. */
114 _edata = .; /* End of data section */
116 /* will be freed after init */
117 . = ALIGN(PAGE_SIZE); /* Init code and data */
119 INIT_TEXT_SECTION(PAGE_SIZE)
120 INIT_DATA_SECTION(16)
123 .mips.machines.init : AT(ADDR(.mips.machines.init) - LOAD_OFFSET) {
124 __mips_machines_start = .;
125 KEEP(*(.mips.machines.init))
126 __mips_machines_end = .;
129 /* .exit.text is discarded at runtime, not link time, to deal with
130 * references from .rodata
139 PERCPU_SECTION(1 << CONFIG_MIPS_L1_CACHE_SHIFT)
142 .rel.dyn : ALIGN(8) {
147 #ifdef CONFIG_MIPS_ELF_APPENDED_DTB
149 .appended_dtb : AT(ADDR(.appended_dtb) - LOAD_OFFSET) {
151 KEEP(*(.appended_dtb))
155 #ifdef CONFIG_RELOCATABLE
159 _relocation_start = .;
161 * Space for relocation table
162 * This needs to be filled so that the
163 * relocs tool can overwrite the content.
164 * An invalid value is left at the start of the
165 * section to abort relocation if the table
166 * has not been filled in.
170 . += CONFIG_RELOCATION_TABLE_SIZE - 4;
175 #ifdef CONFIG_MIPS_RAW_APPENDED_DTB
182 /* leave space for appended DTB */
186 * Align to 64K in attempt to eliminate holes before the
187 * .bss..swapper_pg_dir section at the start of .bss. This
188 * also satisfies PAGE_SIZE alignment as the largest page size
193 /* freed after init ends here */
196 * Force .bss to 64K alignment so that .bss..swapper_pg_dir
197 * gets that alignment. .sbss should be empty, so there will be
198 * no holes after __init_end. */
199 BSS_SECTION(0, 0x10000, 8)
203 /* These mark the ABI of the kernel for debuggers. */
205 KEEP(*(.mdebug.abi32))
208 KEEP(*(.mdebug.abi64))
211 /* This is the MIPS specific mdebug section. */
220 /* These must appear regardless of . */
230 /* Sections to be discarded */
233 /* ABI crap starts here */