arch/mips/kernel/smp.c

   1 /*
   2  * This program is free software; you can redistribute it and/or
   3  * modify it under the terms of the GNU General Public License
   4  * as published by the Free Software Foundation; either version 2
   5  * of the License, or (at your option) any later version.
   6  *
   7  * This program is distributed in the hope that it will be useful,
   8  * but WITHOUT ANY WARRANTY; without even the implied warranty of
   9  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  10  * GNU General Public License for more details.
  11  *
  12  * You should have received a copy of the GNU General Public License
  13  * along with this program; if not, write to the Free Software
  14  * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.
  15  *
  16  * Copyright (C) 2000, 2001 Kanoj Sarcar
  17  * Copyright (C) 2000, 2001 Ralf Baechle
  18  * Copyright (C) 2000, 2001 Silicon Graphics, Inc.
  19  * Copyright (C) 2000, 2001, 2003 Broadcom Corporation
  20  */
  21 #include <linux/cache.h>
  22 #include <linux/delay.h>
  23 #include <linux/init.h>
  24 #include <linux/interrupt.h>
  25 #include <linux/smp.h>
  26 #include <linux/spinlock.h>
  27 #include <linux/threads.h>
  28 #include <linux/module.h>
  29 #include <linux/time.h>
  30 #include <linux/timex.h>
  31 #include <linux/sched.h>
  32 #include <linux/cpumask.h>
  33 #include <linux/cpu.h>
  34 #include <linux/err.h>
  35 #include <linux/ftrace.h>
  36 #include <linux/irqdomain.h>
  37 #include <linux/of.h>
  38 #include <linux/of_irq.h>
  39
  40 #include <linux/atomic.h>
  41 #include <asm/cpu.h>
  42 #include <asm/processor.h>
  43 #include <asm/idle.h>
  44 #include <asm/r4k-timer.h>
  45 #include <asm/mips-cpc.h>
  46 #include <asm/mmu_context.h>
  47 #include <asm/time.h>
  48 #include <asm/setup.h>
  49 #include <asm/maar.h>
  50
  51 cpumask_t cpu_callin_map;               /* Bitmask of started secondaries */
  52
  53 int __cpu_number_map[NR_CPUS];          /* Map physical to logical */
  54 EXPORT_SYMBOL(__cpu_number_map);
  55
  56 int __cpu_logical_map[NR_CPUS];         /* Map logical to physical */
  57 EXPORT_SYMBOL(__cpu_logical_map);
  58
  59 /* Number of TCs (or siblings in Intel speak) per CPU core */
  60 int smp_num_siblings = 1;
  61 EXPORT_SYMBOL(smp_num_siblings);
  62
  63 /* representing the TCs (or siblings in Intel speak) of each logical CPU */
  64 cpumask_t cpu_sibling_map[NR_CPUS] __read_mostly;
  65 EXPORT_SYMBOL(cpu_sibling_map);
  66
  67 /* representing the core map of multi-core chips of each logical CPU */
  68 cpumask_t cpu_core_map[NR_CPUS] __read_mostly;
  69 EXPORT_SYMBOL(cpu_core_map);
  70
  71 /*
  72  * A logcal cpu mask containing only one VPE per core to
  73  * reduce the number of IPIs on large MT systems.
  74  */
  75 cpumask_t cpu_foreign_map[NR_CPUS] __read_mostly;
  76 EXPORT_SYMBOL(cpu_foreign_map);
  77
  78 /* representing cpus for which sibling maps can be computed */
  79 static cpumask_t cpu_sibling_setup_map;
  80
  81 /* representing cpus for which core maps can be computed */
  82 static cpumask_t cpu_core_setup_map;
  83
  84 cpumask_t cpu_coherent_mask;
  85
  86 #ifdef CONFIG_GENERIC_IRQ_IPI
  87 static struct irq_desc *call_desc;
  88 static struct irq_desc *sched_desc;
  89 #endif
  90
  91 static inline void set_cpu_sibling_map(int cpu)
  92 {
  93         int i;
  94
  95         cpumask_set_cpu(cpu, &cpu_sibling_setup_map);
  96
  97         if (smp_num_siblings > 1) {
  98                 for_each_cpu(i, &cpu_sibling_setup_map) {
  99                         if (cpu_data[cpu].package == cpu_data[i].package &&
 100                                     cpu_data[cpu].core == cpu_data[i].core) {
 101                                 cpumask_set_cpu(i, &cpu_sibling_map[cpu]);
 102                                 cpumask_set_cpu(cpu, &cpu_sibling_map[i]);
 103                         }
 104                 }
 105         } else
 106                 cpumask_set_cpu(cpu, &cpu_sibling_map[cpu]);
 107 }
 108
 109 static inline void set_cpu_core_map(int cpu)
 110 {
 111         int i;
 112
 113         cpumask_set_cpu(cpu, &cpu_core_setup_map);
 114
 115         for_each_cpu(i, &cpu_core_setup_map) {
 116                 if (cpu_data[cpu].package == cpu_data[i].package) {
 117                         cpumask_set_cpu(i, &cpu_core_map[cpu]);
 118                         cpumask_set_cpu(cpu, &cpu_core_map[i]);
 119                 }
 120         }
 121 }
 122
 123 /*
 124  * Calculate a new cpu_foreign_map mask whenever a
 125  * new cpu appears or disappears.
 126  */
 127 void calculate_cpu_foreign_map(void)
 128 {
 129         int i, k, core_present;
 130         cpumask_t temp_foreign_map;
 131
 132         /* Re-calculate the mask */
 133         cpumask_clear(&temp_foreign_map);
 134         for_each_online_cpu(i) {
 135                 core_present = 0;
 136                 for_each_cpu(k, &temp_foreign_map)
 137                         if (cpu_data[i].package == cpu_data[k].package &&
 138                             cpu_data[i].core == cpu_data[k].core)
 139                                 core_present = 1;
 140                 if (!core_present)
 141                         cpumask_set_cpu(i, &temp_foreign_map);
 142         }
 143
 144         for_each_online_cpu(i)
 145                 cpumask_andnot(&cpu_foreign_map[i],
 146                                &temp_foreign_map, &cpu_sibling_map[i]);
 147 }
 148
 149 struct plat_smp_ops *mp_ops;
 150 EXPORT_SYMBOL(mp_ops);
 151
 152 void register_smp_ops(struct plat_smp_ops *ops)
 153 {
 154         if (mp_ops)
 155                 printk(KERN_WARNING "Overriding previously set SMP ops\n");
 156
 157         mp_ops = ops;
 158 }
 159
 160 #ifdef CONFIG_GENERIC_IRQ_IPI
 161 void mips_smp_send_ipi_single(int cpu, unsigned int action)
 162 {
 163         mips_smp_send_ipi_mask(cpumask_of(cpu), action);
 164 }
 165
 166 void mips_smp_send_ipi_mask(const struct cpumask *mask, unsigned int action)
 167 {
 168         unsigned long flags;
 169         unsigned int core;
 170         int cpu;
 171
 172         local_irq_save(flags);
 173
 174         switch (action) {
 175         case SMP_CALL_FUNCTION:
 176                 __ipi_send_mask(call_desc, mask);
 177                 break;
 178
 179         case SMP_RESCHEDULE_YOURSELF:
 180                 __ipi_send_mask(sched_desc, mask);
 181                 break;
 182
 183         default:
 184                 BUG();
 185         }
 186
 187         if (mips_cpc_present()) {
 188                 for_each_cpu(cpu, mask) {
 189                         core = cpu_data[cpu].core;
 190
 191                         if (core == current_cpu_data.core)
 192                                 continue;
 193
 194                         while (!cpumask_test_cpu(cpu, &cpu_coherent_mask)) {
 195                                 mips_cpc_lock_other(core);
 196                                 write_cpc_co_cmd(CPC_Cx_CMD_PWRUP);
 197                                 mips_cpc_unlock_other();
 198                         }
 199                 }
 200         }
 201
 202         local_irq_restore(flags);
 203 }
 204
 205
 206 static irqreturn_t ipi_resched_interrupt(int irq, void *dev_id)
 207 {
 208         scheduler_ipi();
 209
 210         return IRQ_HANDLED;
 211 }
 212
 213 static irqreturn_t ipi_call_interrupt(int irq, void *dev_id)
 214 {
 215         generic_smp_call_function_interrupt();
 216
 217         return IRQ_HANDLED;
 218 }
 219
 220 static struct irqaction irq_resched = {
 221         .handler        = ipi_resched_interrupt,
 222         .flags          = IRQF_PERCPU,
 223         .name           = "IPI resched"
 224 };
 225
 226 static struct irqaction irq_call = {
 227         .handler        = ipi_call_interrupt,
 228         .flags          = IRQF_PERCPU,
 229         .name           = "IPI call"
 230 };
 231
 232 static __init void smp_ipi_init_one(unsigned int virq,
 233                                     struct irqaction *action)
 234 {
 235         int ret;
 236
 237         irq_set_handler(virq, handle_percpu_irq);
 238         ret = setup_irq(virq, action);
 239         BUG_ON(ret);
 240 }
 241
 242 static int __init mips_smp_ipi_init(void)
 243 {
 244         unsigned int call_virq, sched_virq;
 245         struct irq_domain *ipidomain;
 246         struct device_node *node;
 247
 248         node = of_irq_find_parent(of_root);
 249         ipidomain = irq_find_matching_host(node, DOMAIN_BUS_IPI);
 250
 251         /*
 252          * Some platforms have half DT setup. So if we found irq node but
 253          * didn't find an ipidomain, try to search for one that is not in the
 254          * DT.
 255          */
 256         if (node && !ipidomain)
 257                 ipidomain = irq_find_matching_host(NULL, DOMAIN_BUS_IPI);
 258
 259         /*
 260          * There are systems which only use IPI domains some of the time,
 261          * depending upon configuration we don't know until runtime. An
 262          * example is Malta where we may compile in support for GIC & the
 263          * MT ASE, but run on a system which has multiple VPEs in a single
 264          * core and doesn't include a GIC. Until all IPI implementations
 265          * have been converted to use IPI domains the best we can do here
 266          * is to return & hope some other code sets up the IPIs.
 267          */
 268         if (!ipidomain)
 269                 return 0;
 270
 271         call_virq = irq_reserve_ipi(ipidomain, cpu_possible_mask);
 272         BUG_ON(!call_virq);
 273
 274         sched_virq = irq_reserve_ipi(ipidomain, cpu_possible_mask);
 275         BUG_ON(!sched_virq);
 276
 277         if (irq_domain_is_ipi_per_cpu(ipidomain)) {
 278                 int cpu;
 279
 280                 for_each_cpu(cpu, cpu_possible_mask) {
 281                         smp_ipi_init_one(call_virq + cpu, &irq_call);
 282                         smp_ipi_init_one(sched_virq + cpu, &irq_resched);
 283                 }
 284         } else {
 285                 smp_ipi_init_one(call_virq, &irq_call);
 286                 smp_ipi_init_one(sched_virq, &irq_resched);
 287         }
 288
 289         call_desc = irq_to_desc(call_virq);
 290         sched_desc = irq_to_desc(sched_virq);
 291
 292         return 0;
 293 }
 294 early_initcall(mips_smp_ipi_init);
 295 #endif
 296
 297 /*
 298  * First C code run on the secondary CPUs after being started up by
 299  * the master.
 300  */
 301 asmlinkage void start_secondary(void)
 302 {
 303         unsigned int cpu;
 304
 305         cpu_probe();
 306         per_cpu_trap_init(false);
 307         mips_clockevent_init();
 308         mp_ops->init_secondary();
 309         cpu_report();
 310         maar_init();
 311
 312         /*
 313          * XXX parity protection should be folded in here when it's converted
 314          * to an option instead of something based on .cputype
 315          */
 316
 317         calibrate_delay();
 318         preempt_disable();
 319         cpu = smp_processor_id();
 320         cpu_data[cpu].udelay_val = loops_per_jiffy;
 321
 322         cpumask_set_cpu(cpu, &cpu_coherent_mask);
 323         notify_cpu_starting(cpu);
 324
 325         set_cpu_online(cpu, true);
 326
 327         set_cpu_sibling_map(cpu);
 328         set_cpu_core_map(cpu);
 329
 330         calculate_cpu_foreign_map();
 331
 332         cpumask_set_cpu(cpu, &cpu_callin_map);
 333
 334         synchronise_count_slave(cpu);
 335
 336         /*
 337          * irq will be enabled in ->smp_finish(), enabling it too early
 338          * is dangerous.
 339          */
 340         WARN_ON_ONCE(!irqs_disabled());
 341         mp_ops->smp_finish();
 342
 343         cpu_startup_entry(CPUHP_AP_ONLINE_IDLE);
 344 }
 345
 346 static void stop_this_cpu(void *dummy)
 347 {
 348         /*
 349          * Remove this CPU:
 350          */
 351
 352         set_cpu_online(smp_processor_id(), false);
 353         calculate_cpu_foreign_map();
 354         local_irq_disable();
 355         while (1);
 356 }
 357
 358 void smp_send_stop(void)
 359 {
 360         smp_call_function(stop_this_cpu, NULL, 0);
 361 }
 362
 363 void __init smp_cpus_done(unsigned int max_cpus)
 364 {
 365 }
 366
 367 /* called from main before smp_init() */
 368 void __init smp_prepare_cpus(unsigned int max_cpus)
 369 {
 370         init_new_context(current, &init_mm);
 371         current_thread_info()->cpu = 0;
 372         mp_ops->prepare_cpus(max_cpus);
 373         set_cpu_sibling_map(0);
 374         set_cpu_core_map(0);
 375         calculate_cpu_foreign_map();
 376 #ifndef CONFIG_HOTPLUG_CPU
 377         init_cpu_present(cpu_possible_mask);
 378 #endif
 379         cpumask_copy(&cpu_coherent_mask, cpu_possible_mask);
 380 }
 381
 382 /* preload SMP state for boot cpu */
 383 void smp_prepare_boot_cpu(void)
 384 {
 385         set_cpu_possible(0, true);
 386         set_cpu_online(0, true);
 387         cpumask_set_cpu(0, &cpu_callin_map);
 388 }
 389
 390 int __cpu_up(unsigned int cpu, struct task_struct *tidle)
 391 {
 392         mp_ops->boot_secondary(cpu, tidle);
 393
 394         /*
 395          * Trust is futile.  We should really have timeouts ...
 396          */
 397         while (!cpumask_test_cpu(cpu, &cpu_callin_map)) {
 398                 udelay(100);
 399                 schedule();
 400         }
 401
 402         synchronise_count_master(cpu);
 403         return 0;
 404 }
 405
 406 /* Not really SMP stuff ... */
 407 int setup_profiling_timer(unsigned int multiplier)
 408 {
 409         return 0;
 410 }
 411
 412 static void flush_tlb_all_ipi(void *info)
 413 {
 414         local_flush_tlb_all();
 415 }
 416
 417 void flush_tlb_all(void)
 418 {
 419         on_each_cpu(flush_tlb_all_ipi, NULL, 1);
 420 }
 421
 422 static void flush_tlb_mm_ipi(void *mm)
 423 {
 424         local_flush_tlb_mm((struct mm_struct *)mm);
 425 }
 426
 427 /*
 428  * Special Variant of smp_call_function for use by TLB functions:
 429  *
 430  *  o No return value
 431  *  o collapses to normal function call on UP kernels
 432  *  o collapses to normal function call on systems with a single shared
 433  *    primary cache.
 434  */
 435 static inline void smp_on_other_tlbs(void (*func) (void *info), void *info)
 436 {
 437         smp_call_function(func, info, 1);
 438 }
 439
 440 static inline void smp_on_each_tlb(void (*func) (void *info), void *info)
 441 {
 442         preempt_disable();
 443
 444         smp_on_other_tlbs(func, info);
 445         func(info);
 446
 447         preempt_enable();
 448 }
 449
 450 /*
 451  * The following tlb flush calls are invoked when old translations are
 452  * being torn down, or pte attributes are changing. For single threaded
 453  * address spaces, a new context is obtained on the current cpu, and tlb
 454  * context on other cpus are invalidated to force a new context allocation
 455  * at switch_mm time, should the mm ever be used on other cpus. For
 456  * multithreaded address spaces, intercpu interrupts have to be sent.
 457  * Another case where intercpu interrupts are required is when the target
 458  * mm might be active on another cpu (eg debuggers doing the flushes on
 459  * behalf of debugees, kswapd stealing pages from another process etc).
 460  * Kanoj 07/00.
 461  */
 462
 463 void flush_tlb_mm(struct mm_struct *mm)
 464 {
 465         preempt_disable();
 466
 467         if ((atomic_read(&mm->mm_users) != 1) || (current->mm != mm)) {
 468                 smp_on_other_tlbs(flush_tlb_mm_ipi, mm);
 469         } else {
 470                 unsigned int cpu;
 471
 472                 for_each_online_cpu(cpu) {
 473                         if (cpu != smp_processor_id() && cpu_context(cpu, mm))
 474                                 cpu_context(cpu, mm) = 0;
 475                 }
 476         }
 477         local_flush_tlb_mm(mm);
 478
 479         preempt_enable();
 480 }
 481
 482 struct flush_tlb_data {
 483         struct vm_area_struct *vma;
 484         unsigned long addr1;
 485         unsigned long addr2;
 486 };
 487
 488 static void flush_tlb_range_ipi(void *info)
 489 {
 490         struct flush_tlb_data *fd = info;
 491
 492         local_flush_tlb_range(fd->vma, fd->addr1, fd->addr2);
 493 }
 494
 495 void flush_tlb_range(struct vm_area_struct *vma, unsigned long start, unsigned long end)
 496 {
 497         struct mm_struct *mm = vma->vm_mm;
 498
 499         preempt_disable();
 500         if ((atomic_read(&mm->mm_users) != 1) || (current->mm != mm)) {
 501                 struct flush_tlb_data fd = {
 502                         .vma = vma,
 503                         .addr1 = start,
 504                         .addr2 = end,
 505                 };
 506
 507                 smp_on_other_tlbs(flush_tlb_range_ipi, &fd);
 508         } else {
 509                 unsigned int cpu;
 510                 int exec = vma->vm_flags & VM_EXEC;
 511
 512                 for_each_online_cpu(cpu) {
 513                         /*
 514                          * flush_cache_range() will only fully flush icache if
 515                          * the VMA is executable, otherwise we must invalidate
 516                          * ASID without it appearing to has_valid_asid() as if
 517                          * mm has been completely unused by that CPU.
 518                          */
 519                         if (cpu != smp_processor_id() && cpu_context(cpu, mm))
 520                                 cpu_context(cpu, mm) = !exec;
 521                 }
 522         }
 523         local_flush_tlb_range(vma, start, end);
 524         preempt_enable();
 525 }
 526
 527 static void flush_tlb_kernel_range_ipi(void *info)
 528 {
 529         struct flush_tlb_data *fd = info;
 530
 531         local_flush_tlb_kernel_range(fd->addr1, fd->addr2);
 532 }
 533
 534 void flush_tlb_kernel_range(unsigned long start, unsigned long end)
 535 {
 536         struct flush_tlb_data fd = {
 537                 .addr1 = start,
 538                 .addr2 = end,
 539         };
 540
 541         on_each_cpu(flush_tlb_kernel_range_ipi, &fd, 1);
 542 }
 543
 544 static void flush_tlb_page_ipi(void *info)
 545 {
 546         struct flush_tlb_data *fd = info;
 547
 548         local_flush_tlb_page(fd->vma, fd->addr1);
 549 }
 550
 551 void flush_tlb_page(struct vm_area_struct *vma, unsigned long page)
 552 {
 553         preempt_disable();
 554         if ((atomic_read(&vma->vm_mm->mm_users) != 1) || (current->mm != vma->vm_mm)) {
 555                 struct flush_tlb_data fd = {
 556                         .vma = vma,
 557                         .addr1 = page,
 558                 };
 559
 560                 smp_on_other_tlbs(flush_tlb_page_ipi, &fd);
 561         } else {
 562                 unsigned int cpu;
 563
 564                 for_each_online_cpu(cpu) {
 565                         /*
 566                          * flush_cache_page() only does partial flushes, so
 567                          * invalidate ASID without it appearing to
 568                          * has_valid_asid() as if mm has been completely unused
 569                          * by that CPU.
 570                          */
 571                         if (cpu != smp_processor_id() && cpu_context(cpu, vma->vm_mm))
 572                                 cpu_context(cpu, vma->vm_mm) = 1;
 573                 }
 574         }
 575         local_flush_tlb_page(vma, page);
 576         preempt_enable();
 577 }
 578
 579 static void flush_tlb_one_ipi(void *info)
 580 {
 581         unsigned long vaddr = (unsigned long) info;
 582
 583         local_flush_tlb_one(vaddr);
 584 }
 585
 586 void flush_tlb_one(unsigned long vaddr)
 587 {
 588         smp_on_each_tlb(flush_tlb_one_ipi, (void *) vaddr);
 589 }
 590
 591 EXPORT_SYMBOL(flush_tlb_page);
 592 EXPORT_SYMBOL(flush_tlb_one);
 593
 594 #if defined(CONFIG_KEXEC)
 595 void (*dump_ipi_function_ptr)(void *) = NULL;
 596 void dump_send_ipi(void (*dump_ipi_callback)(void *))
 597 {
 598         int i;
 599         int cpu = smp_processor_id();
 600
 601         dump_ipi_function_ptr = dump_ipi_callback;
 602         smp_mb();
 603         for_each_online_cpu(i)
 604                 if (i != cpu)
 605                         mp_ops->send_ipi_single(i, SMP_DUMP);
 606
 607 }
 608 EXPORT_SYMBOL(dump_send_ipi);
 609 #endif
 610
 611 #ifdef CONFIG_GENERIC_CLOCKEVENTS_BROADCAST
 612
 613 static DEFINE_PER_CPU(atomic_t, tick_broadcast_count);
 614 static DEFINE_PER_CPU(struct call_single_data, tick_broadcast_csd);
 615
 616 void tick_broadcast(const struct cpumask *mask)
 617 {
 618         atomic_t *count;
 619         struct call_single_data *csd;
 620         int cpu;
 621
 622         for_each_cpu(cpu, mask) {
 623                 count = &per_cpu(tick_broadcast_count, cpu);
 624                 csd = &per_cpu(tick_broadcast_csd, cpu);
 625
 626                 if (atomic_inc_return(count) == 1)
 627                         smp_call_function_single_async(cpu, csd);
 628         }
 629 }
 630
 631 static void tick_broadcast_callee(void *info)
 632 {
 633         int cpu = smp_processor_id();
 634         tick_receive_broadcast();
 635         atomic_set(&per_cpu(tick_broadcast_count, cpu), 0);
 636 }
 637
 638 static int __init tick_broadcast_init(void)
 639 {
 640         struct call_single_data *csd;
 641         int cpu;
 642
 643         for (cpu = 0; cpu < NR_CPUS; cpu++) {
 644                 csd = &per_cpu(tick_broadcast_csd, cpu);
 645                 csd->func = tick_broadcast_callee;
 646         }
 647
 648         return 0;
 649 }
 650 early_initcall(tick_broadcast_init);
 651
 652 #endif /* CONFIG_GENERIC_CLOCKEVENTS_BROADCAST */