2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
6 * Copyright (C) 1992 Ross Biro
7 * Copyright (C) Linus Torvalds
8 * Copyright (C) 1994, 95, 96, 97, 98, 2000 Ralf Baechle
9 * Copyright (C) 1996 David S. Miller
10 * Kevin D. Kissell, kevink@mips.com and Carsten Langgaard, carstenl@mips.com
11 * Copyright (C) 1999 MIPS Technologies, Inc.
12 * Copyright (C) 2000 Ulf Carlsson
14 * At this time Linux/MIPS64 only supports syscall tracing, even for 32-bit
17 #include <linux/compiler.h>
18 #include <linux/context_tracking.h>
19 #include <linux/elf.h>
20 #include <linux/kernel.h>
21 #include <linux/sched.h>
22 #include <linux/sched/task_stack.h>
24 #include <linux/errno.h>
25 #include <linux/ptrace.h>
26 #include <linux/regset.h>
27 #include <linux/smp.h>
28 #include <linux/security.h>
29 #include <linux/stddef.h>
30 #include <linux/tracehook.h>
31 #include <linux/audit.h>
32 #include <linux/seccomp.h>
33 #include <linux/ftrace.h>
35 #include <asm/byteorder.h>
37 #include <asm/cpu-info.h>
40 #include <asm/mipsregs.h>
41 #include <asm/mipsmtregs.h>
42 #include <asm/pgtable.h>
44 #include <asm/syscall.h>
45 #include <linux/uaccess.h>
46 #include <asm/bootinfo.h>
49 #define CREATE_TRACE_POINTS
50 #include <trace/events/syscalls.h>
52 static void init_fp_ctx(struct task_struct *target)
54 /* If FP has been used then the target already has context */
55 if (tsk_used_math(target))
58 /* Begin with data registers set to all 1s... */
59 memset(&target->thread.fpu.fpr, ~0, sizeof(target->thread.fpu.fpr));
61 /* FCSR has been preset by `mips_set_personality_nan'. */
64 * Record that the target has "used" math, such that the context
65 * just initialised, and any modifications made by the caller,
68 set_stopped_child_used_math(target);
72 * Called by kernel/ptrace.c when detaching..
74 * Make sure single step bits etc are not set.
76 void ptrace_disable(struct task_struct *child)
78 /* Don't load the watchpoint registers for the ex-child. */
79 clear_tsk_thread_flag(child, TIF_LOAD_WATCH);
83 * Poke at FCSR according to its mask. Set the Cause bits even
84 * if a corresponding Enable bit is set. This will be noticed at
85 * the time the thread is switched to and SIGFPE thrown accordingly.
87 static void ptrace_setfcr31(struct task_struct *child, u32 value)
92 fcr31 = child->thread.fpu.fcr31;
93 mask = boot_cpu_data.fpu_msk31;
94 child->thread.fpu.fcr31 = (value & ~mask) | (fcr31 & mask);
98 * Read a general register set. We always use the 64-bit format, even
99 * for 32-bit kernels and for 32-bit processes on a 64-bit kernel.
100 * Registers are sign extended to fill the available space.
102 int ptrace_getregs(struct task_struct *child, struct user_pt_regs __user *data)
104 struct pt_regs *regs;
107 if (!access_ok(VERIFY_WRITE, data, 38 * 8))
110 regs = task_pt_regs(child);
112 for (i = 0; i < 32; i++)
113 __put_user((long)regs->regs[i], (__s64 __user *)&data->regs[i]);
114 __put_user((long)regs->lo, (__s64 __user *)&data->lo);
115 __put_user((long)regs->hi, (__s64 __user *)&data->hi);
116 __put_user((long)regs->cp0_epc, (__s64 __user *)&data->cp0_epc);
117 __put_user((long)regs->cp0_badvaddr, (__s64 __user *)&data->cp0_badvaddr);
118 __put_user((long)regs->cp0_status, (__s64 __user *)&data->cp0_status);
119 __put_user((long)regs->cp0_cause, (__s64 __user *)&data->cp0_cause);
125 * Write a general register set. As for PTRACE_GETREGS, we always use
126 * the 64-bit format. On a 32-bit kernel only the lower order half
127 * (according to endianness) will be used.
129 int ptrace_setregs(struct task_struct *child, struct user_pt_regs __user *data)
131 struct pt_regs *regs;
134 if (!access_ok(VERIFY_READ, data, 38 * 8))
137 regs = task_pt_regs(child);
139 for (i = 0; i < 32; i++)
140 __get_user(regs->regs[i], (__s64 __user *)&data->regs[i]);
141 __get_user(regs->lo, (__s64 __user *)&data->lo);
142 __get_user(regs->hi, (__s64 __user *)&data->hi);
143 __get_user(regs->cp0_epc, (__s64 __user *)&data->cp0_epc);
145 /* badvaddr, status, and cause may not be written. */
150 int ptrace_getfpregs(struct task_struct *child, __u32 __user *data)
154 if (!access_ok(VERIFY_WRITE, data, 33 * 8))
157 if (tsk_used_math(child)) {
158 union fpureg *fregs = get_fpu_regs(child);
159 for (i = 0; i < 32; i++)
160 __put_user(get_fpr64(&fregs[i], 0),
161 i + (__u64 __user *)data);
163 for (i = 0; i < 32; i++)
164 __put_user((__u64) -1, i + (__u64 __user *) data);
167 __put_user(child->thread.fpu.fcr31, data + 64);
168 __put_user(boot_cpu_data.fpu_id, data + 65);
173 int ptrace_setfpregs(struct task_struct *child, __u32 __user *data)
180 if (!access_ok(VERIFY_READ, data, 33 * 8))
184 fregs = get_fpu_regs(child);
186 for (i = 0; i < 32; i++) {
187 __get_user(fpr_val, i + (__u64 __user *)data);
188 set_fpr64(&fregs[i], 0, fpr_val);
191 __get_user(value, data + 64);
192 ptrace_setfcr31(child, value);
194 /* FIR may not be written. */
199 int ptrace_get_watch_regs(struct task_struct *child,
200 struct pt_watch_regs __user *addr)
202 enum pt_watch_style style;
205 if (!cpu_has_watch || boot_cpu_data.watch_reg_use_cnt == 0)
207 if (!access_ok(VERIFY_WRITE, addr, sizeof(struct pt_watch_regs)))
211 style = pt_watch_style_mips32;
212 #define WATCH_STYLE mips32
214 style = pt_watch_style_mips64;
215 #define WATCH_STYLE mips64
218 __put_user(style, &addr->style);
219 __put_user(boot_cpu_data.watch_reg_use_cnt,
220 &addr->WATCH_STYLE.num_valid);
221 for (i = 0; i < boot_cpu_data.watch_reg_use_cnt; i++) {
222 __put_user(child->thread.watch.mips3264.watchlo[i],
223 &addr->WATCH_STYLE.watchlo[i]);
224 __put_user(child->thread.watch.mips3264.watchhi[i] &
225 (MIPS_WATCHHI_MASK | MIPS_WATCHHI_IRW),
226 &addr->WATCH_STYLE.watchhi[i]);
227 __put_user(boot_cpu_data.watch_reg_masks[i],
228 &addr->WATCH_STYLE.watch_masks[i]);
231 __put_user(0, &addr->WATCH_STYLE.watchlo[i]);
232 __put_user(0, &addr->WATCH_STYLE.watchhi[i]);
233 __put_user(0, &addr->WATCH_STYLE.watch_masks[i]);
239 int ptrace_set_watch_regs(struct task_struct *child,
240 struct pt_watch_regs __user *addr)
243 int watch_active = 0;
244 unsigned long lt[NUM_WATCH_REGS];
245 u16 ht[NUM_WATCH_REGS];
247 if (!cpu_has_watch || boot_cpu_data.watch_reg_use_cnt == 0)
249 if (!access_ok(VERIFY_READ, addr, sizeof(struct pt_watch_regs)))
251 /* Check the values. */
252 for (i = 0; i < boot_cpu_data.watch_reg_use_cnt; i++) {
253 __get_user(lt[i], &addr->WATCH_STYLE.watchlo[i]);
255 if (lt[i] & __UA_LIMIT)
258 if (test_tsk_thread_flag(child, TIF_32BIT_ADDR)) {
259 if (lt[i] & 0xffffffff80000000UL)
262 if (lt[i] & __UA_LIMIT)
266 __get_user(ht[i], &addr->WATCH_STYLE.watchhi[i]);
267 if (ht[i] & ~MIPS_WATCHHI_MASK)
271 for (i = 0; i < boot_cpu_data.watch_reg_use_cnt; i++) {
272 if (lt[i] & MIPS_WATCHLO_IRW)
274 child->thread.watch.mips3264.watchlo[i] = lt[i];
276 child->thread.watch.mips3264.watchhi[i] = ht[i];
280 set_tsk_thread_flag(child, TIF_LOAD_WATCH);
282 clear_tsk_thread_flag(child, TIF_LOAD_WATCH);
287 /* regset get/set implementations */
289 #if defined(CONFIG_32BIT) || defined(CONFIG_MIPS32_O32)
291 static int gpr32_get(struct task_struct *target,
292 const struct user_regset *regset,
293 unsigned int pos, unsigned int count,
294 void *kbuf, void __user *ubuf)
296 struct pt_regs *regs = task_pt_regs(target);
297 u32 uregs[ELF_NGREG] = {};
299 mips_dump_regs32(uregs, regs);
300 return user_regset_copyout(&pos, &count, &kbuf, &ubuf, uregs, 0,
304 static int gpr32_set(struct task_struct *target,
305 const struct user_regset *regset,
306 unsigned int pos, unsigned int count,
307 const void *kbuf, const void __user *ubuf)
309 struct pt_regs *regs = task_pt_regs(target);
310 u32 uregs[ELF_NGREG];
311 unsigned start, num_regs, i;
314 start = pos / sizeof(u32);
315 num_regs = count / sizeof(u32);
317 if (start + num_regs > ELF_NGREG)
320 err = user_regset_copyin(&pos, &count, &kbuf, &ubuf, uregs, 0,
325 for (i = start; i < num_regs; i++) {
327 * Cast all values to signed here so that if this is a 64-bit
328 * kernel, the supplied 32-bit values will be sign extended.
331 case MIPS32_EF_R1 ... MIPS32_EF_R25:
332 /* k0/k1 are ignored. */
333 case MIPS32_EF_R28 ... MIPS32_EF_R31:
334 regs->regs[i - MIPS32_EF_R0] = (s32)uregs[i];
337 regs->lo = (s32)uregs[i];
340 regs->hi = (s32)uregs[i];
342 case MIPS32_EF_CP0_EPC:
343 regs->cp0_epc = (s32)uregs[i];
351 #endif /* CONFIG_32BIT || CONFIG_MIPS32_O32 */
355 static int gpr64_get(struct task_struct *target,
356 const struct user_regset *regset,
357 unsigned int pos, unsigned int count,
358 void *kbuf, void __user *ubuf)
360 struct pt_regs *regs = task_pt_regs(target);
361 u64 uregs[ELF_NGREG] = {};
363 mips_dump_regs64(uregs, regs);
364 return user_regset_copyout(&pos, &count, &kbuf, &ubuf, uregs, 0,
368 static int gpr64_set(struct task_struct *target,
369 const struct user_regset *regset,
370 unsigned int pos, unsigned int count,
371 const void *kbuf, const void __user *ubuf)
373 struct pt_regs *regs = task_pt_regs(target);
374 u64 uregs[ELF_NGREG];
375 unsigned start, num_regs, i;
378 start = pos / sizeof(u64);
379 num_regs = count / sizeof(u64);
381 if (start + num_regs > ELF_NGREG)
384 err = user_regset_copyin(&pos, &count, &kbuf, &ubuf, uregs, 0,
389 for (i = start; i < num_regs; i++) {
391 case MIPS64_EF_R1 ... MIPS64_EF_R25:
392 /* k0/k1 are ignored. */
393 case MIPS64_EF_R28 ... MIPS64_EF_R31:
394 regs->regs[i - MIPS64_EF_R0] = uregs[i];
402 case MIPS64_EF_CP0_EPC:
403 regs->cp0_epc = uregs[i];
411 #endif /* CONFIG_64BIT */
413 static int fpr_get(struct task_struct *target,
414 const struct user_regset *regset,
415 unsigned int pos, unsigned int count,
416 void *kbuf, void __user *ubuf)
424 if (sizeof(target->thread.fpu.fpr[i]) == sizeof(elf_fpreg_t))
425 return user_regset_copyout(&pos, &count, &kbuf, &ubuf,
427 0, sizeof(elf_fpregset_t));
429 for (i = 0; i < NUM_FPU_REGS; i++) {
430 fpr_val = get_fpr64(&target->thread.fpu.fpr[i], 0);
431 err = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
432 &fpr_val, i * sizeof(elf_fpreg_t),
433 (i + 1) * sizeof(elf_fpreg_t));
441 static int fpr_set(struct task_struct *target,
442 const struct user_regset *regset,
443 unsigned int pos, unsigned int count,
444 const void *kbuf, const void __user *ubuf)
454 if (sizeof(target->thread.fpu.fpr[i]) == sizeof(elf_fpreg_t))
455 return user_regset_copyin(&pos, &count, &kbuf, &ubuf,
457 0, sizeof(elf_fpregset_t));
459 BUILD_BUG_ON(sizeof(fpr_val) != sizeof(elf_fpreg_t));
460 for (i = 0; i < NUM_FPU_REGS && count >= sizeof(elf_fpreg_t); i++) {
461 err = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
462 &fpr_val, i * sizeof(elf_fpreg_t),
463 (i + 1) * sizeof(elf_fpreg_t));
466 set_fpr64(&target->thread.fpu.fpr[i], 0, fpr_val);
477 struct pt_regs_offset {
482 #define REG_OFFSET_NAME(reg, r) { \
484 .offset = offsetof(struct pt_regs, r) \
487 #define REG_OFFSET_END { \
492 static const struct pt_regs_offset regoffset_table[] = {
493 REG_OFFSET_NAME(r0, regs[0]),
494 REG_OFFSET_NAME(r1, regs[1]),
495 REG_OFFSET_NAME(r2, regs[2]),
496 REG_OFFSET_NAME(r3, regs[3]),
497 REG_OFFSET_NAME(r4, regs[4]),
498 REG_OFFSET_NAME(r5, regs[5]),
499 REG_OFFSET_NAME(r6, regs[6]),
500 REG_OFFSET_NAME(r7, regs[7]),
501 REG_OFFSET_NAME(r8, regs[8]),
502 REG_OFFSET_NAME(r9, regs[9]),
503 REG_OFFSET_NAME(r10, regs[10]),
504 REG_OFFSET_NAME(r11, regs[11]),
505 REG_OFFSET_NAME(r12, regs[12]),
506 REG_OFFSET_NAME(r13, regs[13]),
507 REG_OFFSET_NAME(r14, regs[14]),
508 REG_OFFSET_NAME(r15, regs[15]),
509 REG_OFFSET_NAME(r16, regs[16]),
510 REG_OFFSET_NAME(r17, regs[17]),
511 REG_OFFSET_NAME(r18, regs[18]),
512 REG_OFFSET_NAME(r19, regs[19]),
513 REG_OFFSET_NAME(r20, regs[20]),
514 REG_OFFSET_NAME(r21, regs[21]),
515 REG_OFFSET_NAME(r22, regs[22]),
516 REG_OFFSET_NAME(r23, regs[23]),
517 REG_OFFSET_NAME(r24, regs[24]),
518 REG_OFFSET_NAME(r25, regs[25]),
519 REG_OFFSET_NAME(r26, regs[26]),
520 REG_OFFSET_NAME(r27, regs[27]),
521 REG_OFFSET_NAME(r28, regs[28]),
522 REG_OFFSET_NAME(r29, regs[29]),
523 REG_OFFSET_NAME(r30, regs[30]),
524 REG_OFFSET_NAME(r31, regs[31]),
525 REG_OFFSET_NAME(c0_status, cp0_status),
526 REG_OFFSET_NAME(hi, hi),
527 REG_OFFSET_NAME(lo, lo),
528 #ifdef CONFIG_CPU_HAS_SMARTMIPS
529 REG_OFFSET_NAME(acx, acx),
531 REG_OFFSET_NAME(c0_badvaddr, cp0_badvaddr),
532 REG_OFFSET_NAME(c0_cause, cp0_cause),
533 REG_OFFSET_NAME(c0_epc, cp0_epc),
534 #ifdef CONFIG_CPU_CAVIUM_OCTEON
535 REG_OFFSET_NAME(mpl0, mpl[0]),
536 REG_OFFSET_NAME(mpl1, mpl[1]),
537 REG_OFFSET_NAME(mpl2, mpl[2]),
538 REG_OFFSET_NAME(mtp0, mtp[0]),
539 REG_OFFSET_NAME(mtp1, mtp[1]),
540 REG_OFFSET_NAME(mtp2, mtp[2]),
546 * regs_query_register_offset() - query register offset from its name
547 * @name: the name of a register
549 * regs_query_register_offset() returns the offset of a register in struct
550 * pt_regs from its name. If the name is invalid, this returns -EINVAL;
552 int regs_query_register_offset(const char *name)
554 const struct pt_regs_offset *roff;
555 for (roff = regoffset_table; roff->name != NULL; roff++)
556 if (!strcmp(roff->name, name))
561 #if defined(CONFIG_32BIT) || defined(CONFIG_MIPS32_O32)
563 static const struct user_regset mips_regsets[] = {
565 .core_note_type = NT_PRSTATUS,
567 .size = sizeof(unsigned int),
568 .align = sizeof(unsigned int),
573 .core_note_type = NT_PRFPREG,
575 .size = sizeof(elf_fpreg_t),
576 .align = sizeof(elf_fpreg_t),
582 static const struct user_regset_view user_mips_view = {
584 .e_machine = ELF_ARCH,
585 .ei_osabi = ELF_OSABI,
586 .regsets = mips_regsets,
587 .n = ARRAY_SIZE(mips_regsets),
590 #endif /* CONFIG_32BIT || CONFIG_MIPS32_O32 */
594 static const struct user_regset mips64_regsets[] = {
596 .core_note_type = NT_PRSTATUS,
598 .size = sizeof(unsigned long),
599 .align = sizeof(unsigned long),
604 .core_note_type = NT_PRFPREG,
606 .size = sizeof(elf_fpreg_t),
607 .align = sizeof(elf_fpreg_t),
613 static const struct user_regset_view user_mips64_view = {
615 .e_machine = ELF_ARCH,
616 .ei_osabi = ELF_OSABI,
617 .regsets = mips64_regsets,
618 .n = ARRAY_SIZE(mips64_regsets),
621 #endif /* CONFIG_64BIT */
623 const struct user_regset_view *task_user_regset_view(struct task_struct *task)
626 return &user_mips_view;
628 #ifdef CONFIG_MIPS32_O32
629 if (test_tsk_thread_flag(task, TIF_32BIT_REGS))
630 return &user_mips_view;
632 return &user_mips64_view;
636 long arch_ptrace(struct task_struct *child, long request,
637 unsigned long addr, unsigned long data)
640 void __user *addrp = (void __user *) addr;
641 void __user *datavp = (void __user *) data;
642 unsigned long __user *datalp = (void __user *) data;
645 /* when I and D space are separate, these will need to be fixed. */
646 case PTRACE_PEEKTEXT: /* read word at location addr. */
647 case PTRACE_PEEKDATA:
648 ret = generic_ptrace_peekdata(child, addr, data);
651 /* Read the word at location addr in the USER area. */
652 case PTRACE_PEEKUSR: {
653 struct pt_regs *regs;
655 unsigned long tmp = 0;
657 regs = task_pt_regs(child);
658 ret = 0; /* Default return value. */
662 tmp = regs->regs[addr];
664 case FPR_BASE ... FPR_BASE + 31:
665 if (!tsk_used_math(child)) {
666 /* FP not yet used */
670 fregs = get_fpu_regs(child);
673 if (test_thread_flag(TIF_32BIT_FPREGS)) {
675 * The odd registers are actually the high
676 * order bits of the values stored in the even
677 * registers - unless we're using r2k_switch.S.
679 tmp = get_fpr32(&fregs[(addr & ~1) - FPR_BASE],
684 tmp = get_fpr32(&fregs[addr - FPR_BASE], 0);
690 tmp = regs->cp0_cause;
693 tmp = regs->cp0_badvaddr;
701 #ifdef CONFIG_CPU_HAS_SMARTMIPS
707 tmp = child->thread.fpu.fcr31;
710 /* implementation / version register */
711 tmp = boot_cpu_data.fpu_id;
713 case DSP_BASE ... DSP_BASE + 5: {
721 dregs = __get_dsp_regs(child);
722 tmp = (unsigned long) (dregs[addr - DSP_BASE]);
731 tmp = child->thread.dsp.dspcontrol;
738 ret = put_user(tmp, datalp);
742 /* when I and D space are separate, this will have to be fixed. */
743 case PTRACE_POKETEXT: /* write the word at location addr. */
744 case PTRACE_POKEDATA:
745 ret = generic_ptrace_pokedata(child, addr, data);
748 case PTRACE_POKEUSR: {
749 struct pt_regs *regs;
751 regs = task_pt_regs(child);
755 regs->regs[addr] = data;
757 case FPR_BASE ... FPR_BASE + 31: {
758 union fpureg *fregs = get_fpu_regs(child);
762 if (test_thread_flag(TIF_32BIT_FPREGS)) {
764 * The odd registers are actually the high
765 * order bits of the values stored in the even
766 * registers - unless we're using r2k_switch.S.
768 set_fpr32(&fregs[(addr & ~1) - FPR_BASE],
773 set_fpr64(&fregs[addr - FPR_BASE], 0, data);
777 regs->cp0_epc = data;
785 #ifdef CONFIG_CPU_HAS_SMARTMIPS
792 ptrace_setfcr31(child, data);
794 case DSP_BASE ... DSP_BASE + 5: {
802 dregs = __get_dsp_regs(child);
803 dregs[addr - DSP_BASE] = data;
811 child->thread.dsp.dspcontrol = data;
814 /* The rest are not allowed. */
822 ret = ptrace_getregs(child, datavp);
826 ret = ptrace_setregs(child, datavp);
829 case PTRACE_GETFPREGS:
830 ret = ptrace_getfpregs(child, datavp);
833 case PTRACE_SETFPREGS:
834 ret = ptrace_setfpregs(child, datavp);
837 case PTRACE_GET_THREAD_AREA:
838 ret = put_user(task_thread_info(child)->tp_value, datalp);
841 case PTRACE_GET_WATCH_REGS:
842 ret = ptrace_get_watch_regs(child, addrp);
845 case PTRACE_SET_WATCH_REGS:
846 ret = ptrace_set_watch_regs(child, addrp);
850 ret = ptrace_request(child, request, addr, data);
858 * Notification of system call entry/exit
859 * - triggered by current->work.syscall_trace
861 asmlinkage long syscall_trace_enter(struct pt_regs *regs, long syscall)
865 current_thread_info()->syscall = syscall;
867 if (test_thread_flag(TIF_SYSCALL_TRACE) &&
868 tracehook_report_syscall_entry(regs))
871 if (secure_computing(NULL) == -1)
874 if (unlikely(test_thread_flag(TIF_SYSCALL_TRACEPOINT)))
875 trace_sys_enter(regs, regs->regs[2]);
877 audit_syscall_entry(syscall, regs->regs[4], regs->regs[5],
878 regs->regs[6], regs->regs[7]);
883 * Notification of system call entry/exit
884 * - triggered by current->work.syscall_trace
886 asmlinkage void syscall_trace_leave(struct pt_regs *regs)
889 * We may come here right after calling schedule_user()
890 * or do_notify_resume(), in which case we can be in RCU
895 audit_syscall_exit(regs);
897 if (unlikely(test_thread_flag(TIF_SYSCALL_TRACEPOINT)))
898 trace_sys_exit(regs, regs->regs[2]);
900 if (test_thread_flag(TIF_SYSCALL_TRACE))
901 tracehook_report_syscall_exit(regs, 0);