2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
6 * Copyright (C) 1992 Ross Biro
7 * Copyright (C) Linus Torvalds
8 * Copyright (C) 1994, 95, 96, 97, 98, 2000 Ralf Baechle
9 * Copyright (C) 1996 David S. Miller
10 * Kevin D. Kissell, kevink@mips.com and Carsten Langgaard, carstenl@mips.com
11 * Copyright (C) 1999 MIPS Technologies, Inc.
12 * Copyright (C) 2000 Ulf Carlsson
14 * At this time Linux/MIPS64 only supports syscall tracing, even for 32-bit
17 #include <linux/compiler.h>
18 #include <linux/context_tracking.h>
19 #include <linux/elf.h>
20 #include <linux/kernel.h>
21 #include <linux/sched.h>
22 #include <linux/sched/task_stack.h>
24 #include <linux/errno.h>
25 #include <linux/ptrace.h>
26 #include <linux/regset.h>
27 #include <linux/smp.h>
28 #include <linux/security.h>
29 #include <linux/stddef.h>
30 #include <linux/tracehook.h>
31 #include <linux/audit.h>
32 #include <linux/seccomp.h>
33 #include <linux/ftrace.h>
35 #include <asm/byteorder.h>
37 #include <asm/cpu-info.h>
40 #include <asm/mipsregs.h>
41 #include <asm/mipsmtregs.h>
43 #include <asm/processor.h>
44 #include <asm/syscall.h>
45 #include <linux/uaccess.h>
46 #include <asm/bootinfo.h>
49 #define CREATE_TRACE_POINTS
50 #include <trace/events/syscalls.h>
53 * Called by kernel/ptrace.c when detaching..
55 * Make sure single step bits etc are not set.
57 void ptrace_disable(struct task_struct *child)
59 /* Don't load the watchpoint registers for the ex-child. */
60 clear_tsk_thread_flag(child, TIF_LOAD_WATCH);
64 * Read a general register set. We always use the 64-bit format, even
65 * for 32-bit kernels and for 32-bit processes on a 64-bit kernel.
66 * Registers are sign extended to fill the available space.
68 int ptrace_getregs(struct task_struct *child, struct user_pt_regs __user *data)
73 if (!access_ok(data, 38 * 8))
76 regs = task_pt_regs(child);
78 for (i = 0; i < 32; i++)
79 __put_user((long)regs->regs[i], (__s64 __user *)&data->regs[i]);
80 __put_user((long)regs->lo, (__s64 __user *)&data->lo);
81 __put_user((long)regs->hi, (__s64 __user *)&data->hi);
82 __put_user((long)regs->cp0_epc, (__s64 __user *)&data->cp0_epc);
83 __put_user((long)regs->cp0_badvaddr, (__s64 __user *)&data->cp0_badvaddr);
84 __put_user((long)regs->cp0_status, (__s64 __user *)&data->cp0_status);
85 __put_user((long)regs->cp0_cause, (__s64 __user *)&data->cp0_cause);
91 * Write a general register set. As for PTRACE_GETREGS, we always use
92 * the 64-bit format. On a 32-bit kernel only the lower order half
93 * (according to endianness) will be used.
95 int ptrace_setregs(struct task_struct *child, struct user_pt_regs __user *data)
100 if (!access_ok(data, 38 * 8))
103 regs = task_pt_regs(child);
105 for (i = 0; i < 32; i++)
106 __get_user(regs->regs[i], (__s64 __user *)&data->regs[i]);
107 __get_user(regs->lo, (__s64 __user *)&data->lo);
108 __get_user(regs->hi, (__s64 __user *)&data->hi);
109 __get_user(regs->cp0_epc, (__s64 __user *)&data->cp0_epc);
111 /* badvaddr, status, and cause may not be written. */
113 /* System call number may have been changed */
114 mips_syscall_update_nr(child, regs);
119 int ptrace_get_watch_regs(struct task_struct *child,
120 struct pt_watch_regs __user *addr)
122 enum pt_watch_style style;
125 if (!cpu_has_watch || boot_cpu_data.watch_reg_use_cnt == 0)
127 if (!access_ok(addr, sizeof(struct pt_watch_regs)))
131 style = pt_watch_style_mips32;
132 #define WATCH_STYLE mips32
134 style = pt_watch_style_mips64;
135 #define WATCH_STYLE mips64
138 __put_user(style, &addr->style);
139 __put_user(boot_cpu_data.watch_reg_use_cnt,
140 &addr->WATCH_STYLE.num_valid);
141 for (i = 0; i < boot_cpu_data.watch_reg_use_cnt; i++) {
142 __put_user(child->thread.watch.mips3264.watchlo[i],
143 &addr->WATCH_STYLE.watchlo[i]);
144 __put_user(child->thread.watch.mips3264.watchhi[i] &
145 (MIPS_WATCHHI_MASK | MIPS_WATCHHI_IRW),
146 &addr->WATCH_STYLE.watchhi[i]);
147 __put_user(boot_cpu_data.watch_reg_masks[i],
148 &addr->WATCH_STYLE.watch_masks[i]);
151 __put_user(0, &addr->WATCH_STYLE.watchlo[i]);
152 __put_user(0, &addr->WATCH_STYLE.watchhi[i]);
153 __put_user(0, &addr->WATCH_STYLE.watch_masks[i]);
159 int ptrace_set_watch_regs(struct task_struct *child,
160 struct pt_watch_regs __user *addr)
163 int watch_active = 0;
164 unsigned long lt[NUM_WATCH_REGS];
165 u16 ht[NUM_WATCH_REGS];
167 if (!cpu_has_watch || boot_cpu_data.watch_reg_use_cnt == 0)
169 if (!access_ok(addr, sizeof(struct pt_watch_regs)))
171 /* Check the values. */
172 for (i = 0; i < boot_cpu_data.watch_reg_use_cnt; i++) {
173 __get_user(lt[i], &addr->WATCH_STYLE.watchlo[i]);
175 if (lt[i] & __UA_LIMIT)
178 if (test_tsk_thread_flag(child, TIF_32BIT_ADDR)) {
179 if (lt[i] & 0xffffffff80000000UL)
182 if (lt[i] & __UA_LIMIT)
186 __get_user(ht[i], &addr->WATCH_STYLE.watchhi[i]);
187 if (ht[i] & ~MIPS_WATCHHI_MASK)
191 for (i = 0; i < boot_cpu_data.watch_reg_use_cnt; i++) {
192 if (lt[i] & MIPS_WATCHLO_IRW)
194 child->thread.watch.mips3264.watchlo[i] = lt[i];
196 child->thread.watch.mips3264.watchhi[i] = ht[i];
200 set_tsk_thread_flag(child, TIF_LOAD_WATCH);
202 clear_tsk_thread_flag(child, TIF_LOAD_WATCH);
207 /* regset get/set implementations */
209 #if defined(CONFIG_32BIT) || defined(CONFIG_MIPS32_O32)
211 static int gpr32_get(struct task_struct *target,
212 const struct user_regset *regset,
213 unsigned int pos, unsigned int count,
214 void *kbuf, void __user *ubuf)
216 struct pt_regs *regs = task_pt_regs(target);
217 u32 uregs[ELF_NGREG] = {};
219 mips_dump_regs32(uregs, regs);
220 return user_regset_copyout(&pos, &count, &kbuf, &ubuf, uregs, 0,
224 static int gpr32_set(struct task_struct *target,
225 const struct user_regset *regset,
226 unsigned int pos, unsigned int count,
227 const void *kbuf, const void __user *ubuf)
229 struct pt_regs *regs = task_pt_regs(target);
230 u32 uregs[ELF_NGREG];
231 unsigned start, num_regs, i;
234 start = pos / sizeof(u32);
235 num_regs = count / sizeof(u32);
237 if (start + num_regs > ELF_NGREG)
240 err = user_regset_copyin(&pos, &count, &kbuf, &ubuf, uregs, 0,
245 for (i = start; i < num_regs; i++) {
247 * Cast all values to signed here so that if this is a 64-bit
248 * kernel, the supplied 32-bit values will be sign extended.
251 case MIPS32_EF_R1 ... MIPS32_EF_R25:
252 /* k0/k1 are ignored. */
253 case MIPS32_EF_R28 ... MIPS32_EF_R31:
254 regs->regs[i - MIPS32_EF_R0] = (s32)uregs[i];
257 regs->lo = (s32)uregs[i];
260 regs->hi = (s32)uregs[i];
262 case MIPS32_EF_CP0_EPC:
263 regs->cp0_epc = (s32)uregs[i];
268 /* System call number may have been changed */
269 mips_syscall_update_nr(target, regs);
274 #endif /* CONFIG_32BIT || CONFIG_MIPS32_O32 */
278 static int gpr64_get(struct task_struct *target,
279 const struct user_regset *regset,
280 unsigned int pos, unsigned int count,
281 void *kbuf, void __user *ubuf)
283 struct pt_regs *regs = task_pt_regs(target);
284 u64 uregs[ELF_NGREG] = {};
286 mips_dump_regs64(uregs, regs);
287 return user_regset_copyout(&pos, &count, &kbuf, &ubuf, uregs, 0,
291 static int gpr64_set(struct task_struct *target,
292 const struct user_regset *regset,
293 unsigned int pos, unsigned int count,
294 const void *kbuf, const void __user *ubuf)
296 struct pt_regs *regs = task_pt_regs(target);
297 u64 uregs[ELF_NGREG];
298 unsigned start, num_regs, i;
301 start = pos / sizeof(u64);
302 num_regs = count / sizeof(u64);
304 if (start + num_regs > ELF_NGREG)
307 err = user_regset_copyin(&pos, &count, &kbuf, &ubuf, uregs, 0,
312 for (i = start; i < num_regs; i++) {
314 case MIPS64_EF_R1 ... MIPS64_EF_R25:
315 /* k0/k1 are ignored. */
316 case MIPS64_EF_R28 ... MIPS64_EF_R31:
317 regs->regs[i - MIPS64_EF_R0] = uregs[i];
325 case MIPS64_EF_CP0_EPC:
326 regs->cp0_epc = uregs[i];
331 /* System call number may have been changed */
332 mips_syscall_update_nr(target, regs);
337 #endif /* CONFIG_64BIT */
340 #ifdef CONFIG_MIPS_FP_SUPPORT
343 * Poke at FCSR according to its mask. Set the Cause bits even
344 * if a corresponding Enable bit is set. This will be noticed at
345 * the time the thread is switched to and SIGFPE thrown accordingly.
347 static void ptrace_setfcr31(struct task_struct *child, u32 value)
352 fcr31 = child->thread.fpu.fcr31;
353 mask = boot_cpu_data.fpu_msk31;
354 child->thread.fpu.fcr31 = (value & ~mask) | (fcr31 & mask);
357 int ptrace_getfpregs(struct task_struct *child, __u32 __user *data)
361 if (!access_ok(data, 33 * 8))
364 if (tsk_used_math(child)) {
365 union fpureg *fregs = get_fpu_regs(child);
366 for (i = 0; i < 32; i++)
367 __put_user(get_fpr64(&fregs[i], 0),
368 i + (__u64 __user *)data);
370 for (i = 0; i < 32; i++)
371 __put_user((__u64) -1, i + (__u64 __user *) data);
374 __put_user(child->thread.fpu.fcr31, data + 64);
375 __put_user(boot_cpu_data.fpu_id, data + 65);
380 int ptrace_setfpregs(struct task_struct *child, __u32 __user *data)
387 if (!access_ok(data, 33 * 8))
391 fregs = get_fpu_regs(child);
393 for (i = 0; i < 32; i++) {
394 __get_user(fpr_val, i + (__u64 __user *)data);
395 set_fpr64(&fregs[i], 0, fpr_val);
398 __get_user(value, data + 64);
399 ptrace_setfcr31(child, value);
401 /* FIR may not be written. */
407 * Copy the floating-point context to the supplied NT_PRFPREG buffer,
408 * !CONFIG_CPU_HAS_MSA variant. FP context's general register slots
409 * correspond 1:1 to buffer slots. Only general registers are copied.
411 static int fpr_get_fpa(struct task_struct *target,
412 unsigned int *pos, unsigned int *count,
413 void **kbuf, void __user **ubuf)
415 return user_regset_copyout(pos, count, kbuf, ubuf,
417 0, NUM_FPU_REGS * sizeof(elf_fpreg_t));
421 * Copy the floating-point context to the supplied NT_PRFPREG buffer,
422 * CONFIG_CPU_HAS_MSA variant. Only lower 64 bits of FP context's
423 * general register slots are copied to buffer slots. Only general
424 * registers are copied.
426 static int fpr_get_msa(struct task_struct *target,
427 unsigned int *pos, unsigned int *count,
428 void **kbuf, void __user **ubuf)
434 BUILD_BUG_ON(sizeof(fpr_val) != sizeof(elf_fpreg_t));
435 for (i = 0; i < NUM_FPU_REGS; i++) {
436 fpr_val = get_fpr64(&target->thread.fpu.fpr[i], 0);
437 err = user_regset_copyout(pos, count, kbuf, ubuf,
438 &fpr_val, i * sizeof(elf_fpreg_t),
439 (i + 1) * sizeof(elf_fpreg_t));
448 * Copy the floating-point context to the supplied NT_PRFPREG buffer.
449 * Choose the appropriate helper for general registers, and then copy
450 * the FCSR and FIR registers separately.
452 static int fpr_get(struct task_struct *target,
453 const struct user_regset *regset,
454 unsigned int pos, unsigned int count,
455 void *kbuf, void __user *ubuf)
457 const int fcr31_pos = NUM_FPU_REGS * sizeof(elf_fpreg_t);
458 const int fir_pos = fcr31_pos + sizeof(u32);
461 if (sizeof(target->thread.fpu.fpr[0]) == sizeof(elf_fpreg_t))
462 err = fpr_get_fpa(target, &pos, &count, &kbuf, &ubuf);
464 err = fpr_get_msa(target, &pos, &count, &kbuf, &ubuf);
468 err = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
469 &target->thread.fpu.fcr31,
470 fcr31_pos, fcr31_pos + sizeof(u32));
474 err = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
475 &boot_cpu_data.fpu_id,
476 fir_pos, fir_pos + sizeof(u32));
482 * Copy the supplied NT_PRFPREG buffer to the floating-point context,
483 * !CONFIG_CPU_HAS_MSA variant. Buffer slots correspond 1:1 to FP
484 * context's general register slots. Only general registers are copied.
486 static int fpr_set_fpa(struct task_struct *target,
487 unsigned int *pos, unsigned int *count,
488 const void **kbuf, const void __user **ubuf)
490 return user_regset_copyin(pos, count, kbuf, ubuf,
492 0, NUM_FPU_REGS * sizeof(elf_fpreg_t));
496 * Copy the supplied NT_PRFPREG buffer to the floating-point context,
497 * CONFIG_CPU_HAS_MSA variant. Buffer slots are copied to lower 64
498 * bits only of FP context's general register slots. Only general
499 * registers are copied.
501 static int fpr_set_msa(struct task_struct *target,
502 unsigned int *pos, unsigned int *count,
503 const void **kbuf, const void __user **ubuf)
509 BUILD_BUG_ON(sizeof(fpr_val) != sizeof(elf_fpreg_t));
510 for (i = 0; i < NUM_FPU_REGS && *count > 0; i++) {
511 err = user_regset_copyin(pos, count, kbuf, ubuf,
512 &fpr_val, i * sizeof(elf_fpreg_t),
513 (i + 1) * sizeof(elf_fpreg_t));
516 set_fpr64(&target->thread.fpu.fpr[i], 0, fpr_val);
523 * Copy the supplied NT_PRFPREG buffer to the floating-point context.
524 * Choose the appropriate helper for general registers, and then copy
525 * the FCSR register separately. Ignore the incoming FIR register
526 * contents though, as the register is read-only.
528 * We optimize for the case where `count % sizeof(elf_fpreg_t) == 0',
529 * which is supposed to have been guaranteed by the kernel before
530 * calling us, e.g. in `ptrace_regset'. We enforce that requirement,
531 * so that we can safely avoid preinitializing temporaries for
532 * partial register writes.
534 static int fpr_set(struct task_struct *target,
535 const struct user_regset *regset,
536 unsigned int pos, unsigned int count,
537 const void *kbuf, const void __user *ubuf)
539 const int fcr31_pos = NUM_FPU_REGS * sizeof(elf_fpreg_t);
540 const int fir_pos = fcr31_pos + sizeof(u32);
544 BUG_ON(count % sizeof(elf_fpreg_t));
546 if (pos + count > sizeof(elf_fpregset_t))
551 if (sizeof(target->thread.fpu.fpr[0]) == sizeof(elf_fpreg_t))
552 err = fpr_set_fpa(target, &pos, &count, &kbuf, &ubuf);
554 err = fpr_set_msa(target, &pos, &count, &kbuf, &ubuf);
559 err = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
561 fcr31_pos, fcr31_pos + sizeof(u32));
565 ptrace_setfcr31(target, fcr31);
569 err = user_regset_copyin_ignore(&pos, &count, &kbuf, &ubuf,
571 fir_pos + sizeof(u32));
576 /* Copy the FP mode setting to the supplied NT_MIPS_FP_MODE buffer. */
577 static int fp_mode_get(struct task_struct *target,
578 const struct user_regset *regset,
579 unsigned int pos, unsigned int count,
580 void *kbuf, void __user *ubuf)
584 fp_mode = mips_get_process_fp_mode(target);
585 return user_regset_copyout(&pos, &count, &kbuf, &ubuf, &fp_mode, 0,
590 * Copy the supplied NT_MIPS_FP_MODE buffer to the FP mode setting.
592 * We optimize for the case where `count % sizeof(int) == 0', which
593 * is supposed to have been guaranteed by the kernel before calling
594 * us, e.g. in `ptrace_regset'. We enforce that requirement, so
595 * that we can safely avoid preinitializing temporaries for partial
598 static int fp_mode_set(struct task_struct *target,
599 const struct user_regset *regset,
600 unsigned int pos, unsigned int count,
601 const void *kbuf, const void __user *ubuf)
606 BUG_ON(count % sizeof(int));
608 if (pos + count > sizeof(fp_mode))
611 err = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &fp_mode, 0,
617 err = mips_set_process_fp_mode(target, fp_mode);
622 #endif /* CONFIG_MIPS_FP_SUPPORT */
624 #ifdef CONFIG_CPU_HAS_MSA
626 struct msa_control_regs {
633 static int copy_pad_fprs(struct task_struct *target,
634 const struct user_regset *regset,
635 unsigned int *ppos, unsigned int *pcount,
636 void **pkbuf, void __user **pubuf,
637 unsigned int live_sz)
639 int i, j, start, start_pad, err;
640 unsigned long long fill = ~0ull;
641 unsigned int cp_sz, pad_sz;
643 cp_sz = min(regset->size, live_sz);
644 pad_sz = regset->size - cp_sz;
645 WARN_ON(pad_sz % sizeof(fill));
648 for (; i < NUM_FPU_REGS; i++, start += regset->size) {
649 err |= user_regset_copyout(ppos, pcount, pkbuf, pubuf,
650 &target->thread.fpu.fpr[i],
651 start, start + cp_sz);
653 start_pad = start + cp_sz;
654 for (j = 0; j < (pad_sz / sizeof(fill)); j++) {
655 err |= user_regset_copyout(ppos, pcount, pkbuf, pubuf,
657 start_pad + sizeof(fill));
658 start_pad += sizeof(fill);
665 static int msa_get(struct task_struct *target,
666 const struct user_regset *regset,
667 unsigned int pos, unsigned int count,
668 void *kbuf, void __user *ubuf)
670 const unsigned int wr_size = NUM_FPU_REGS * regset->size;
671 const struct msa_control_regs ctrl_regs = {
672 .fir = boot_cpu_data.fpu_id,
673 .fcsr = target->thread.fpu.fcr31,
674 .msair = boot_cpu_data.msa_id,
675 .msacsr = target->thread.fpu.msacsr,
679 if (!tsk_used_math(target)) {
680 /* The task hasn't used FP or MSA, fill with 0xff */
681 err = copy_pad_fprs(target, regset, &pos, &count,
683 } else if (!test_tsk_thread_flag(target, TIF_MSA_CTX_LIVE)) {
684 /* Copy scalar FP context, fill the rest with 0xff */
685 err = copy_pad_fprs(target, regset, &pos, &count,
687 } else if (sizeof(target->thread.fpu.fpr[0]) == regset->size) {
688 /* Trivially copy the vector registers */
689 err = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
690 &target->thread.fpu.fpr,
693 /* Copy as much context as possible, fill the rest with 0xff */
694 err = copy_pad_fprs(target, regset, &pos, &count,
696 sizeof(target->thread.fpu.fpr[0]));
699 err |= user_regset_copyout(&pos, &count, &kbuf, &ubuf,
701 wr_size + sizeof(ctrl_regs));
705 static int msa_set(struct task_struct *target,
706 const struct user_regset *regset,
707 unsigned int pos, unsigned int count,
708 const void *kbuf, const void __user *ubuf)
710 const unsigned int wr_size = NUM_FPU_REGS * regset->size;
711 struct msa_control_regs ctrl_regs;
717 if (sizeof(target->thread.fpu.fpr[0]) == regset->size) {
718 /* Trivially copy the vector registers */
719 err = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
720 &target->thread.fpu.fpr,
723 /* Copy as much context as possible */
724 cp_sz = min_t(unsigned int, regset->size,
725 sizeof(target->thread.fpu.fpr[0]));
728 for (; i < NUM_FPU_REGS; i++, start += regset->size) {
729 err |= user_regset_copyin(&pos, &count, &kbuf, &ubuf,
730 &target->thread.fpu.fpr[i],
731 start, start + cp_sz);
736 err = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &ctrl_regs,
737 wr_size, wr_size + sizeof(ctrl_regs));
739 target->thread.fpu.fcr31 = ctrl_regs.fcsr & ~FPU_CSR_ALL_X;
740 target->thread.fpu.msacsr = ctrl_regs.msacsr & ~MSA_CSR_CAUSEF;
746 #endif /* CONFIG_CPU_HAS_MSA */
748 #if defined(CONFIG_32BIT) || defined(CONFIG_MIPS32_O32)
751 * Copy the DSP context to the supplied 32-bit NT_MIPS_DSP buffer.
753 static int dsp32_get(struct task_struct *target,
754 const struct user_regset *regset,
755 unsigned int pos, unsigned int count,
756 void *kbuf, void __user *ubuf)
758 unsigned int start, num_regs, i;
759 u32 dspregs[NUM_DSP_REGS + 1];
761 BUG_ON(count % sizeof(u32));
766 start = pos / sizeof(u32);
767 num_regs = count / sizeof(u32);
769 if (start + num_regs > NUM_DSP_REGS + 1)
772 for (i = start; i < num_regs; i++)
774 case 0 ... NUM_DSP_REGS - 1:
775 dspregs[i] = target->thread.dsp.dspr[i];
778 dspregs[i] = target->thread.dsp.dspcontrol;
781 return user_regset_copyout(&pos, &count, &kbuf, &ubuf, dspregs, 0,
786 * Copy the supplied 32-bit NT_MIPS_DSP buffer to the DSP context.
788 static int dsp32_set(struct task_struct *target,
789 const struct user_regset *regset,
790 unsigned int pos, unsigned int count,
791 const void *kbuf, const void __user *ubuf)
793 unsigned int start, num_regs, i;
794 u32 dspregs[NUM_DSP_REGS + 1];
797 BUG_ON(count % sizeof(u32));
802 start = pos / sizeof(u32);
803 num_regs = count / sizeof(u32);
805 if (start + num_regs > NUM_DSP_REGS + 1)
808 err = user_regset_copyin(&pos, &count, &kbuf, &ubuf, dspregs, 0,
813 for (i = start; i < num_regs; i++)
815 case 0 ... NUM_DSP_REGS - 1:
816 target->thread.dsp.dspr[i] = (s32)dspregs[i];
819 target->thread.dsp.dspcontrol = (s32)dspregs[i];
826 #endif /* CONFIG_32BIT || CONFIG_MIPS32_O32 */
831 * Copy the DSP context to the supplied 64-bit NT_MIPS_DSP buffer.
833 static int dsp64_get(struct task_struct *target,
834 const struct user_regset *regset,
835 unsigned int pos, unsigned int count,
836 void *kbuf, void __user *ubuf)
838 unsigned int start, num_regs, i;
839 u64 dspregs[NUM_DSP_REGS + 1];
841 BUG_ON(count % sizeof(u64));
846 start = pos / sizeof(u64);
847 num_regs = count / sizeof(u64);
849 if (start + num_regs > NUM_DSP_REGS + 1)
852 for (i = start; i < num_regs; i++)
854 case 0 ... NUM_DSP_REGS - 1:
855 dspregs[i] = target->thread.dsp.dspr[i];
858 dspregs[i] = target->thread.dsp.dspcontrol;
861 return user_regset_copyout(&pos, &count, &kbuf, &ubuf, dspregs, 0,
866 * Copy the supplied 64-bit NT_MIPS_DSP buffer to the DSP context.
868 static int dsp64_set(struct task_struct *target,
869 const struct user_regset *regset,
870 unsigned int pos, unsigned int count,
871 const void *kbuf, const void __user *ubuf)
873 unsigned int start, num_regs, i;
874 u64 dspregs[NUM_DSP_REGS + 1];
877 BUG_ON(count % sizeof(u64));
882 start = pos / sizeof(u64);
883 num_regs = count / sizeof(u64);
885 if (start + num_regs > NUM_DSP_REGS + 1)
888 err = user_regset_copyin(&pos, &count, &kbuf, &ubuf, dspregs, 0,
893 for (i = start; i < num_regs; i++)
895 case 0 ... NUM_DSP_REGS - 1:
896 target->thread.dsp.dspr[i] = dspregs[i];
899 target->thread.dsp.dspcontrol = dspregs[i];
906 #endif /* CONFIG_64BIT */
909 * Determine whether the DSP context is present.
911 static int dsp_active(struct task_struct *target,
912 const struct user_regset *regset)
914 return cpu_has_dsp ? NUM_DSP_REGS + 1 : -ENODEV;
920 #ifdef CONFIG_MIPS_FP_SUPPORT
924 #ifdef CONFIG_CPU_HAS_MSA
929 struct pt_regs_offset {
934 #define REG_OFFSET_NAME(reg, r) { \
936 .offset = offsetof(struct pt_regs, r) \
939 #define REG_OFFSET_END { \
944 static const struct pt_regs_offset regoffset_table[] = {
945 REG_OFFSET_NAME(r0, regs[0]),
946 REG_OFFSET_NAME(r1, regs[1]),
947 REG_OFFSET_NAME(r2, regs[2]),
948 REG_OFFSET_NAME(r3, regs[3]),
949 REG_OFFSET_NAME(r4, regs[4]),
950 REG_OFFSET_NAME(r5, regs[5]),
951 REG_OFFSET_NAME(r6, regs[6]),
952 REG_OFFSET_NAME(r7, regs[7]),
953 REG_OFFSET_NAME(r8, regs[8]),
954 REG_OFFSET_NAME(r9, regs[9]),
955 REG_OFFSET_NAME(r10, regs[10]),
956 REG_OFFSET_NAME(r11, regs[11]),
957 REG_OFFSET_NAME(r12, regs[12]),
958 REG_OFFSET_NAME(r13, regs[13]),
959 REG_OFFSET_NAME(r14, regs[14]),
960 REG_OFFSET_NAME(r15, regs[15]),
961 REG_OFFSET_NAME(r16, regs[16]),
962 REG_OFFSET_NAME(r17, regs[17]),
963 REG_OFFSET_NAME(r18, regs[18]),
964 REG_OFFSET_NAME(r19, regs[19]),
965 REG_OFFSET_NAME(r20, regs[20]),
966 REG_OFFSET_NAME(r21, regs[21]),
967 REG_OFFSET_NAME(r22, regs[22]),
968 REG_OFFSET_NAME(r23, regs[23]),
969 REG_OFFSET_NAME(r24, regs[24]),
970 REG_OFFSET_NAME(r25, regs[25]),
971 REG_OFFSET_NAME(r26, regs[26]),
972 REG_OFFSET_NAME(r27, regs[27]),
973 REG_OFFSET_NAME(r28, regs[28]),
974 REG_OFFSET_NAME(r29, regs[29]),
975 REG_OFFSET_NAME(r30, regs[30]),
976 REG_OFFSET_NAME(r31, regs[31]),
977 REG_OFFSET_NAME(c0_status, cp0_status),
978 REG_OFFSET_NAME(hi, hi),
979 REG_OFFSET_NAME(lo, lo),
980 #ifdef CONFIG_CPU_HAS_SMARTMIPS
981 REG_OFFSET_NAME(acx, acx),
983 REG_OFFSET_NAME(c0_badvaddr, cp0_badvaddr),
984 REG_OFFSET_NAME(c0_cause, cp0_cause),
985 REG_OFFSET_NAME(c0_epc, cp0_epc),
986 #ifdef CONFIG_CPU_CAVIUM_OCTEON
987 REG_OFFSET_NAME(mpl0, mpl[0]),
988 REG_OFFSET_NAME(mpl1, mpl[1]),
989 REG_OFFSET_NAME(mpl2, mpl[2]),
990 REG_OFFSET_NAME(mtp0, mtp[0]),
991 REG_OFFSET_NAME(mtp1, mtp[1]),
992 REG_OFFSET_NAME(mtp2, mtp[2]),
998 * regs_query_register_offset() - query register offset from its name
999 * @name: the name of a register
1001 * regs_query_register_offset() returns the offset of a register in struct
1002 * pt_regs from its name. If the name is invalid, this returns -EINVAL;
1004 int regs_query_register_offset(const char *name)
1006 const struct pt_regs_offset *roff;
1007 for (roff = regoffset_table; roff->name != NULL; roff++)
1008 if (!strcmp(roff->name, name))
1009 return roff->offset;
1013 #if defined(CONFIG_32BIT) || defined(CONFIG_MIPS32_O32)
1015 static const struct user_regset mips_regsets[] = {
1017 .core_note_type = NT_PRSTATUS,
1019 .size = sizeof(unsigned int),
1020 .align = sizeof(unsigned int),
1025 .core_note_type = NT_MIPS_DSP,
1026 .n = NUM_DSP_REGS + 1,
1027 .size = sizeof(u32),
1028 .align = sizeof(u32),
1031 .active = dsp_active,
1033 #ifdef CONFIG_MIPS_FP_SUPPORT
1035 .core_note_type = NT_PRFPREG,
1037 .size = sizeof(elf_fpreg_t),
1038 .align = sizeof(elf_fpreg_t),
1042 [REGSET_FP_MODE] = {
1043 .core_note_type = NT_MIPS_FP_MODE,
1045 .size = sizeof(int),
1046 .align = sizeof(int),
1051 #ifdef CONFIG_CPU_HAS_MSA
1053 .core_note_type = NT_MIPS_MSA,
1054 .n = NUM_FPU_REGS + 1,
1063 static const struct user_regset_view user_mips_view = {
1065 .e_machine = ELF_ARCH,
1066 .ei_osabi = ELF_OSABI,
1067 .regsets = mips_regsets,
1068 .n = ARRAY_SIZE(mips_regsets),
1071 #endif /* CONFIG_32BIT || CONFIG_MIPS32_O32 */
1075 static const struct user_regset mips64_regsets[] = {
1077 .core_note_type = NT_PRSTATUS,
1079 .size = sizeof(unsigned long),
1080 .align = sizeof(unsigned long),
1085 .core_note_type = NT_MIPS_DSP,
1086 .n = NUM_DSP_REGS + 1,
1087 .size = sizeof(u64),
1088 .align = sizeof(u64),
1091 .active = dsp_active,
1093 #ifdef CONFIG_MIPS_FP_SUPPORT
1094 [REGSET_FP_MODE] = {
1095 .core_note_type = NT_MIPS_FP_MODE,
1097 .size = sizeof(int),
1098 .align = sizeof(int),
1103 .core_note_type = NT_PRFPREG,
1105 .size = sizeof(elf_fpreg_t),
1106 .align = sizeof(elf_fpreg_t),
1111 #ifdef CONFIG_CPU_HAS_MSA
1113 .core_note_type = NT_MIPS_MSA,
1114 .n = NUM_FPU_REGS + 1,
1123 static const struct user_regset_view user_mips64_view = {
1125 .e_machine = ELF_ARCH,
1126 .ei_osabi = ELF_OSABI,
1127 .regsets = mips64_regsets,
1128 .n = ARRAY_SIZE(mips64_regsets),
1131 #ifdef CONFIG_MIPS32_N32
1133 static const struct user_regset_view user_mipsn32_view = {
1135 .e_flags = EF_MIPS_ABI2,
1136 .e_machine = ELF_ARCH,
1137 .ei_osabi = ELF_OSABI,
1138 .regsets = mips64_regsets,
1139 .n = ARRAY_SIZE(mips64_regsets),
1142 #endif /* CONFIG_MIPS32_N32 */
1144 #endif /* CONFIG_64BIT */
1146 const struct user_regset_view *task_user_regset_view(struct task_struct *task)
1149 return &user_mips_view;
1151 #ifdef CONFIG_MIPS32_O32
1152 if (test_tsk_thread_flag(task, TIF_32BIT_REGS))
1153 return &user_mips_view;
1155 #ifdef CONFIG_MIPS32_N32
1156 if (test_tsk_thread_flag(task, TIF_32BIT_ADDR))
1157 return &user_mipsn32_view;
1159 return &user_mips64_view;
1163 long arch_ptrace(struct task_struct *child, long request,
1164 unsigned long addr, unsigned long data)
1167 void __user *addrp = (void __user *) addr;
1168 void __user *datavp = (void __user *) data;
1169 unsigned long __user *datalp = (void __user *) data;
1172 /* when I and D space are separate, these will need to be fixed. */
1173 case PTRACE_PEEKTEXT: /* read word at location addr. */
1174 case PTRACE_PEEKDATA:
1175 ret = generic_ptrace_peekdata(child, addr, data);
1178 /* Read the word at location addr in the USER area. */
1179 case PTRACE_PEEKUSR: {
1180 struct pt_regs *regs;
1181 unsigned long tmp = 0;
1183 regs = task_pt_regs(child);
1184 ret = 0; /* Default return value. */
1188 tmp = regs->regs[addr];
1190 #ifdef CONFIG_MIPS_FP_SUPPORT
1191 case FPR_BASE ... FPR_BASE + 31: {
1192 union fpureg *fregs;
1194 if (!tsk_used_math(child)) {
1195 /* FP not yet used */
1199 fregs = get_fpu_regs(child);
1202 if (test_tsk_thread_flag(child, TIF_32BIT_FPREGS)) {
1204 * The odd registers are actually the high
1205 * order bits of the values stored in the even
1208 tmp = get_fpr32(&fregs[(addr & ~1) - FPR_BASE],
1213 tmp = get_fpr64(&fregs[addr - FPR_BASE], 0);
1217 tmp = child->thread.fpu.fcr31;
1220 /* implementation / version register */
1221 tmp = boot_cpu_data.fpu_id;
1225 tmp = regs->cp0_epc;
1228 tmp = regs->cp0_cause;
1231 tmp = regs->cp0_badvaddr;
1239 #ifdef CONFIG_CPU_HAS_SMARTMIPS
1244 case DSP_BASE ... DSP_BASE + 5: {
1252 dregs = __get_dsp_regs(child);
1253 tmp = dregs[addr - DSP_BASE];
1262 tmp = child->thread.dsp.dspcontrol;
1269 ret = put_user(tmp, datalp);
1273 /* when I and D space are separate, this will have to be fixed. */
1274 case PTRACE_POKETEXT: /* write the word at location addr. */
1275 case PTRACE_POKEDATA:
1276 ret = generic_ptrace_pokedata(child, addr, data);
1279 case PTRACE_POKEUSR: {
1280 struct pt_regs *regs;
1282 regs = task_pt_regs(child);
1286 regs->regs[addr] = data;
1287 /* System call number may have been changed */
1289 mips_syscall_update_nr(child, regs);
1290 else if (addr == 4 &&
1291 mips_syscall_is_indirect(child, regs))
1292 mips_syscall_update_nr(child, regs);
1294 #ifdef CONFIG_MIPS_FP_SUPPORT
1295 case FPR_BASE ... FPR_BASE + 31: {
1296 union fpureg *fregs = get_fpu_regs(child);
1300 if (test_tsk_thread_flag(child, TIF_32BIT_FPREGS)) {
1302 * The odd registers are actually the high
1303 * order bits of the values stored in the even
1306 set_fpr32(&fregs[(addr & ~1) - FPR_BASE],
1311 set_fpr64(&fregs[addr - FPR_BASE], 0, data);
1316 ptrace_setfcr31(child, data);
1320 regs->cp0_epc = data;
1328 #ifdef CONFIG_CPU_HAS_SMARTMIPS
1333 case DSP_BASE ... DSP_BASE + 5: {
1341 dregs = __get_dsp_regs(child);
1342 dregs[addr - DSP_BASE] = data;
1350 child->thread.dsp.dspcontrol = data;
1353 /* The rest are not allowed. */
1360 case PTRACE_GETREGS:
1361 ret = ptrace_getregs(child, datavp);
1364 case PTRACE_SETREGS:
1365 ret = ptrace_setregs(child, datavp);
1368 #ifdef CONFIG_MIPS_FP_SUPPORT
1369 case PTRACE_GETFPREGS:
1370 ret = ptrace_getfpregs(child, datavp);
1373 case PTRACE_SETFPREGS:
1374 ret = ptrace_setfpregs(child, datavp);
1377 case PTRACE_GET_THREAD_AREA:
1378 ret = put_user(task_thread_info(child)->tp_value, datalp);
1381 case PTRACE_GET_WATCH_REGS:
1382 ret = ptrace_get_watch_regs(child, addrp);
1385 case PTRACE_SET_WATCH_REGS:
1386 ret = ptrace_set_watch_regs(child, addrp);
1390 ret = ptrace_request(child, request, addr, data);
1398 * Notification of system call entry/exit
1399 * - triggered by current->work.syscall_trace
1401 asmlinkage long syscall_trace_enter(struct pt_regs *regs, long syscall)
1405 current_thread_info()->syscall = syscall;
1407 if (test_thread_flag(TIF_SYSCALL_TRACE)) {
1408 if (tracehook_report_syscall_entry(regs))
1410 syscall = current_thread_info()->syscall;
1413 #ifdef CONFIG_SECCOMP
1414 if (unlikely(test_thread_flag(TIF_SECCOMP))) {
1416 struct seccomp_data sd;
1417 unsigned long args[6];
1420 sd.arch = syscall_get_arch(current);
1421 syscall_get_arguments(current, regs, args);
1422 for (i = 0; i < 6; i++)
1423 sd.args[i] = args[i];
1424 sd.instruction_pointer = KSTK_EIP(current);
1426 ret = __secure_computing(&sd);
1429 syscall = current_thread_info()->syscall;
1433 if (unlikely(test_thread_flag(TIF_SYSCALL_TRACEPOINT)))
1434 trace_sys_enter(regs, regs->regs[2]);
1436 audit_syscall_entry(syscall, regs->regs[4], regs->regs[5],
1437 regs->regs[6], regs->regs[7]);
1440 * Negative syscall numbers are mistaken for rejected syscalls, but
1441 * won't have had the return value set appropriately, so we do so now.
1444 syscall_set_return_value(current, regs, -ENOSYS, 0);
1449 * Notification of system call entry/exit
1450 * - triggered by current->work.syscall_trace
1452 asmlinkage void syscall_trace_leave(struct pt_regs *regs)
1455 * We may come here right after calling schedule_user()
1456 * or do_notify_resume(), in which case we can be in RCU
1461 audit_syscall_exit(regs);
1463 if (unlikely(test_thread_flag(TIF_SYSCALL_TRACEPOINT)))
1464 trace_sys_exit(regs, regs_return_value(regs));
1466 if (test_thread_flag(TIF_SYSCALL_TRACE))
1467 tracehook_report_syscall_exit(regs, 0);