arch/mips/kernel/process.c

   1 /*
   2  * This file is subject to the terms and conditions of the GNU General Public
   3  * License.  See the file "COPYING" in the main directory of this archive
   4  * for more details.
   5  *
   6  * Copyright (C) 1994 - 1999, 2000 by Ralf Baechle and others.
   7  * Copyright (C) 2005, 2006 by Ralf Baechle (ralf@linux-mips.org)
   8  * Copyright (C) 1999, 2000 Silicon Graphics, Inc.
   9  * Copyright (C) 2004 Thiemo Seufer
  10  * Copyright (C) 2013  Imagination Technologies Ltd.
  11  */
  12 #include <linux/errno.h>
  13 #include <linux/sched.h>
  14 #include <linux/sched/debug.h>
  15 #include <linux/tick.h>
  16 #include <linux/kernel.h>
  17 #include <linux/mm.h>
  18 #include <linux/stddef.h>
  19 #include <linux/unistd.h>
  20 #include <linux/export.h>
  21 #include <linux/ptrace.h>
  22 #include <linux/mman.h>
  23 #include <linux/personality.h>
  24 #include <linux/sys.h>
  25 #include <linux/init.h>
  26 #include <linux/completion.h>
  27 #include <linux/kallsyms.h>
  28 #include <linux/random.h>
  29 #include <linux/prctl.h>
  30
  31 #include <asm/asm.h>
  32 #include <asm/bootinfo.h>
  33 #include <asm/cpu.h>
  34 #include <asm/dsemul.h>
  35 #include <asm/dsp.h>
  36 #include <asm/fpu.h>
  37 #include <asm/irq.h>
  38 #include <asm/msa.h>
  39 #include <asm/pgtable.h>
  40 #include <asm/mipsregs.h>
  41 #include <asm/processor.h>
  42 #include <asm/reg.h>
  43 #include <linux/uaccess.h>
  44 #include <asm/io.h>
  45 #include <asm/elf.h>
  46 #include <asm/isadep.h>
  47 #include <asm/inst.h>
  48 #include <asm/stacktrace.h>
  49 #include <asm/irq_regs.h>
  50
  51 #ifdef CONFIG_HOTPLUG_CPU
  52 void arch_cpu_idle_dead(void)
  53 {
  54         play_dead();
  55 }
  56 #endif
  57
  58 asmlinkage void ret_from_fork(void);
  59 asmlinkage void ret_from_kernel_thread(void);
  60
  61 void start_thread(struct pt_regs * regs, unsigned long pc, unsigned long sp)
  62 {
  63         unsigned long status;
  64
  65         /* New thread loses kernel privileges. */
  66         status = regs->cp0_status & ~(ST0_CU0|ST0_CU1|ST0_FR|KU_MASK);
  67         status |= KU_USER;
  68         regs->cp0_status = status;
  69         lose_fpu(0);
  70         clear_thread_flag(TIF_MSA_CTX_LIVE);
  71         clear_used_math();
  72         atomic_set(&current->thread.bd_emu_frame, BD_EMUFRAME_NONE);
  73         init_dsp();
  74         regs->cp0_epc = pc;
  75         regs->regs[29] = sp;
  76 }
  77
  78 void exit_thread(struct task_struct *tsk)
  79 {
  80         /*
  81          * User threads may have allocated a delay slot emulation frame.
  82          * If so, clean up that allocation.
  83          */
  84         if (!(current->flags & PF_KTHREAD))
  85                 dsemul_thread_cleanup(tsk);
  86 }
  87
  88 int arch_dup_task_struct(struct task_struct *dst, struct task_struct *src)
  89 {
  90         /*
  91          * Save any process state which is live in hardware registers to the
  92          * parent context prior to duplication. This prevents the new child
  93          * state becoming stale if the parent is preempted before copy_thread()
  94          * gets a chance to save the parent's live hardware registers to the
  95          * child context.
  96          */
  97         preempt_disable();
  98
  99         if (is_msa_enabled())
 100                 save_msa(current);
 101         else if (is_fpu_owner())
 102                 _save_fp(current);
 103
 104         save_dsp(current);
 105
 106         preempt_enable();
 107
 108         *dst = *src;
 109         return 0;
 110 }
 111
 112 /*
 113  * Copy architecture-specific thread state
 114  */
 115 int copy_thread(unsigned long clone_flags, unsigned long usp,
 116         unsigned long kthread_arg, struct task_struct *p)
 117 {
 118         struct thread_info *ti = task_thread_info(p);
 119         struct pt_regs *childregs, *regs = current_pt_regs();
 120         unsigned long childksp;
 121         p->set_child_tid = p->clear_child_tid = NULL;
 122
 123         childksp = (unsigned long)task_stack_page(p) + THREAD_SIZE - 32;
 124
 125         /* set up new TSS. */
 126         childregs = (struct pt_regs *) childksp - 1;
 127         /*  Put the stack after the struct pt_regs.  */
 128         childksp = (unsigned long) childregs;
 129         p->thread.cp0_status = read_c0_status() & ~(ST0_CU2|ST0_CU1);
 130         if (unlikely(p->flags & PF_KTHREAD)) {
 131                 /* kernel thread */
 132                 unsigned long status = p->thread.cp0_status;
 133                 memset(childregs, 0, sizeof(struct pt_regs));
 134                 ti->addr_limit = KERNEL_DS;
 135                 p->thread.reg16 = usp; /* fn */
 136                 p->thread.reg17 = kthread_arg;
 137                 p->thread.reg29 = childksp;
 138                 p->thread.reg31 = (unsigned long) ret_from_kernel_thread;
 139 #if defined(CONFIG_CPU_R3000) || defined(CONFIG_CPU_TX39XX)
 140                 status = (status & ~(ST0_KUP | ST0_IEP | ST0_IEC)) |
 141                          ((status & (ST0_KUC | ST0_IEC)) << 2);
 142 #else
 143                 status |= ST0_EXL;
 144 #endif
 145                 childregs->cp0_status = status;
 146                 return 0;
 147         }
 148
 149         /* user thread */
 150         *childregs = *regs;
 151         childregs->regs[7] = 0; /* Clear error flag */
 152         childregs->regs[2] = 0; /* Child gets zero as return value */
 153         if (usp)
 154                 childregs->regs[29] = usp;
 155         ti->addr_limit = USER_DS;
 156
 157         p->thread.reg29 = (unsigned long) childregs;
 158         p->thread.reg31 = (unsigned long) ret_from_fork;
 159
 160         /*
 161          * New tasks lose permission to use the fpu. This accelerates context
 162          * switching for most programs since they don't use the fpu.
 163          */
 164         childregs->cp0_status &= ~(ST0_CU2|ST0_CU1);
 165
 166         clear_tsk_thread_flag(p, TIF_USEDFPU);
 167         clear_tsk_thread_flag(p, TIF_USEDMSA);
 168         clear_tsk_thread_flag(p, TIF_MSA_CTX_LIVE);
 169
 170 #ifdef CONFIG_MIPS_MT_FPAFF
 171         clear_tsk_thread_flag(p, TIF_FPUBOUND);
 172 #endif /* CONFIG_MIPS_MT_FPAFF */
 173
 174         atomic_set(&p->thread.bd_emu_frame, BD_EMUFRAME_NONE);
 175
 176         if (clone_flags & CLONE_SETTLS)
 177                 ti->tp_value = regs->regs[7];
 178
 179         return 0;
 180 }
 181
 182 #ifdef CONFIG_CC_STACKPROTECTOR
 183 #include <linux/stackprotector.h>
 184 unsigned long __stack_chk_guard __read_mostly;
 185 EXPORT_SYMBOL(__stack_chk_guard);
 186 #endif
 187
 188 struct mips_frame_info {
 189         void            *func;
 190         unsigned long   func_size;
 191         int             frame_size;
 192         int             pc_offset;
 193 };
 194
 195 #define J_TARGET(pc,target)     \
 196                 (((unsigned long)(pc) & 0xf0000000) | ((target) << 2))
 197
 198 static inline int is_ra_save_ins(union mips_instruction *ip, int *poff)
 199 {
 200 #ifdef CONFIG_CPU_MICROMIPS
 201         /*
 202          * swsp ra,offset
 203          * swm16 reglist,offset(sp)
 204          * swm32 reglist,offset(sp)
 205          * sw32 ra,offset(sp)
 206          * jradiussp - NOT SUPPORTED
 207          *
 208          * microMIPS is way more fun...
 209          */
 210         if (mm_insn_16bit(ip->halfword[1])) {
 211                 switch (ip->mm16_r5_format.opcode) {
 212                 case mm_swsp16_op:
 213                         if (ip->mm16_r5_format.rt != 31)
 214                                 return 0;
 215
 216                         *poff = ip->mm16_r5_format.simmediate;
 217                         *poff = (*poff << 2) / sizeof(ulong);
 218                         return 1;
 219
 220                 case mm_pool16c_op:
 221                         switch (ip->mm16_m_format.func) {
 222                         case mm_swm16_op:
 223                                 *poff = ip->mm16_m_format.imm;
 224                                 *poff += 1 + ip->mm16_m_format.rlist;
 225                                 *poff = (*poff << 2) / sizeof(ulong);
 226                                 return 1;
 227
 228                         default:
 229                                 return 0;
 230                         }
 231
 232                 default:
 233                         return 0;
 234                 }
 235         }
 236
 237         switch (ip->i_format.opcode) {
 238         case mm_sw32_op:
 239                 if (ip->i_format.rs != 29)
 240                         return 0;
 241                 if (ip->i_format.rt != 31)
 242                         return 0;
 243
 244                 *poff = ip->i_format.simmediate / sizeof(ulong);
 245                 return 1;
 246
 247         case mm_pool32b_op:
 248                 switch (ip->mm_m_format.func) {
 249                 case mm_swm32_func:
 250                         if (ip->mm_m_format.rd < 0x10)
 251                                 return 0;
 252                         if (ip->mm_m_format.base != 29)
 253                                 return 0;
 254
 255                         *poff = ip->mm_m_format.simmediate;
 256                         *poff += (ip->mm_m_format.rd & 0xf) * sizeof(u32);
 257                         *poff /= sizeof(ulong);
 258                         return 1;
 259                 default:
 260                         return 0;
 261                 }
 262
 263         default:
 264                 return 0;
 265         }
 266 #else
 267         /* sw / sd $ra, offset($sp) */
 268         if ((ip->i_format.opcode == sw_op || ip->i_format.opcode == sd_op) &&
 269                 ip->i_format.rs == 29 && ip->i_format.rt == 31) {
 270                 *poff = ip->i_format.simmediate / sizeof(ulong);
 271                 return 1;
 272         }
 273
 274         return 0;
 275 #endif
 276 }
 277
 278 static inline int is_jump_ins(union mips_instruction *ip)
 279 {
 280 #ifdef CONFIG_CPU_MICROMIPS
 281         /*
 282          * jr16,jrc,jalr16,jalr16
 283          * jal
 284          * jalr/jr,jalr.hb/jr.hb,jalrs,jalrs.hb
 285          * jraddiusp - NOT SUPPORTED
 286          *
 287          * microMIPS is kind of more fun...
 288          */
 289         if (mm_insn_16bit(ip->halfword[1])) {
 290                 if ((ip->mm16_r5_format.opcode == mm_pool16c_op &&
 291                     (ip->mm16_r5_format.rt & mm_jr16_op) == mm_jr16_op))
 292                         return 1;
 293                 return 0;
 294         }
 295
 296         if (ip->j_format.opcode == mm_j32_op)
 297                 return 1;
 298         if (ip->j_format.opcode == mm_jal32_op)
 299                 return 1;
 300         if (ip->r_format.opcode != mm_pool32a_op ||
 301                         ip->r_format.func != mm_pool32axf_op)
 302                 return 0;
 303         return ((ip->u_format.uimmediate >> 6) & mm_jalr_op) == mm_jalr_op;
 304 #else
 305         if (ip->j_format.opcode == j_op)
 306                 return 1;
 307         if (ip->j_format.opcode == jal_op)
 308                 return 1;
 309         if (ip->r_format.opcode != spec_op)
 310                 return 0;
 311         return ip->r_format.func == jalr_op || ip->r_format.func == jr_op;
 312 #endif
 313 }
 314
 315 static inline int is_sp_move_ins(union mips_instruction *ip)
 316 {
 317 #ifdef CONFIG_CPU_MICROMIPS
 318         /*
 319          * addiusp -imm
 320          * addius5 sp,-imm
 321          * addiu32 sp,sp,-imm
 322          * jradiussp - NOT SUPPORTED
 323          *
 324          * microMIPS is not more fun...
 325          */
 326         if (mm_insn_16bit(ip->halfword[1])) {
 327                 return (ip->mm16_r3_format.opcode == mm_pool16d_op &&
 328                         ip->mm16_r3_format.simmediate && mm_addiusp_func) ||
 329                        (ip->mm16_r5_format.opcode == mm_pool16d_op &&
 330                         ip->mm16_r5_format.rt == 29);
 331         }
 332
 333         return ip->mm_i_format.opcode == mm_addiu32_op &&
 334                ip->mm_i_format.rt == 29 && ip->mm_i_format.rs == 29;
 335 #else
 336         /* addiu/daddiu sp,sp,-imm */
 337         if (ip->i_format.rs != 29 || ip->i_format.rt != 29)
 338                 return 0;
 339         if (ip->i_format.opcode == addiu_op || ip->i_format.opcode == daddiu_op)
 340                 return 1;
 341 #endif
 342         return 0;
 343 }
 344
 345 static int get_frame_info(struct mips_frame_info *info)
 346 {
 347         bool is_mmips = IS_ENABLED(CONFIG_CPU_MICROMIPS);
 348         union mips_instruction insn, *ip, *ip_end;
 349         const unsigned int max_insns = 128;
 350         unsigned int i;
 351
 352         info->pc_offset = -1;
 353         info->frame_size = 0;
 354
 355         ip = (void *)msk_isa16_mode((ulong)info->func);
 356         if (!ip)
 357                 goto err;
 358
 359         ip_end = (void *)ip + info->func_size;
 360
 361         for (i = 0; i < max_insns && ip < ip_end; i++, ip++) {
 362                 if (is_mmips && mm_insn_16bit(ip->halfword[0])) {
 363                         insn.halfword[0] = 0;
 364                         insn.halfword[1] = ip->halfword[0];
 365                 } else if (is_mmips) {
 366                         insn.halfword[0] = ip->halfword[1];
 367                         insn.halfword[1] = ip->halfword[0];
 368                 } else {
 369                         insn.word = ip->word;
 370                 }
 371
 372                 if (is_jump_ins(&insn))
 373                         break;
 374
 375                 if (!info->frame_size) {
 376                         if (is_sp_move_ins(&insn))
 377                         {
 378 #ifdef CONFIG_CPU_MICROMIPS
 379                                 if (mm_insn_16bit(ip->halfword[0]))
 380                                 {
 381                                         unsigned short tmp;
 382
 383                                         if (ip->halfword[0] & mm_addiusp_func)
 384                                         {
 385                                                 tmp = (((ip->halfword[0] >> 1) & 0x1ff) << 2);
 386                                                 info->frame_size = -(signed short)(tmp | ((tmp & 0x100) ? 0xfe00 : 0));
 387                                         } else {
 388                                                 tmp = (ip->halfword[0] >> 1);
 389                                                 info->frame_size = -(signed short)(tmp & 0xf);
 390                                         }
 391                                         ip = (void *) &ip->halfword[1];
 392                                         ip--;
 393                                 } else
 394 #endif
 395                                 info->frame_size = - ip->i_format.simmediate;
 396                         }
 397                         continue;
 398                 }
 399                 if (info->pc_offset == -1 &&
 400                     is_ra_save_ins(&insn, &info->pc_offset))
 401                         break;
 402         }
 403         if (info->frame_size && info->pc_offset >= 0) /* nested */
 404                 return 0;
 405         if (info->pc_offset < 0) /* leaf */
 406                 return 1;
 407         /* prologue seems bogus... */
 408 err:
 409         return -1;
 410 }
 411
 412 static struct mips_frame_info schedule_mfi __read_mostly;
 413
 414 #ifdef CONFIG_KALLSYMS
 415 static unsigned long get___schedule_addr(void)
 416 {
 417         return kallsyms_lookup_name("__schedule");
 418 }
 419 #else
 420 static unsigned long get___schedule_addr(void)
 421 {
 422         union mips_instruction *ip = (void *)schedule;
 423         int max_insns = 8;
 424         int i;
 425
 426         for (i = 0; i < max_insns; i++, ip++) {
 427                 if (ip->j_format.opcode == j_op)
 428                         return J_TARGET(ip, ip->j_format.target);
 429         }
 430         return 0;
 431 }
 432 #endif
 433
 434 static int __init frame_info_init(void)
 435 {
 436         unsigned long size = 0;
 437 #ifdef CONFIG_KALLSYMS
 438         unsigned long ofs;
 439 #endif
 440         unsigned long addr;
 441
 442         addr = get___schedule_addr();
 443         if (!addr)
 444                 addr = (unsigned long)schedule;
 445
 446 #ifdef CONFIG_KALLSYMS
 447         kallsyms_lookup_size_offset(addr, &size, &ofs);
 448 #endif
 449         schedule_mfi.func = (void *)addr;
 450         schedule_mfi.func_size = size;
 451
 452         get_frame_info(&schedule_mfi);
 453
 454         /*
 455          * Without schedule() frame info, result given by
 456          * thread_saved_pc() and get_wchan() are not reliable.
 457          */
 458         if (schedule_mfi.pc_offset < 0)
 459                 printk("Can't analyze schedule() prologue at %p\n", schedule);
 460
 461         return 0;
 462 }
 463
 464 arch_initcall(frame_info_init);
 465
 466 /*
 467  * Return saved PC of a blocked thread.
 468  */
 469 unsigned long thread_saved_pc(struct task_struct *tsk)
 470 {
 471         struct thread_struct *t = &tsk->thread;
 472
 473         /* New born processes are a special case */
 474         if (t->reg31 == (unsigned long) ret_from_fork)
 475                 return t->reg31;
 476         if (schedule_mfi.pc_offset < 0)
 477                 return 0;
 478         return ((unsigned long *)t->reg29)[schedule_mfi.pc_offset];
 479 }
 480
 481
 482 #ifdef CONFIG_KALLSYMS
 483 /* generic stack unwinding function */
 484 unsigned long notrace unwind_stack_by_address(unsigned long stack_page,
 485                                               unsigned long *sp,
 486                                               unsigned long pc,
 487                                               unsigned long *ra)
 488 {
 489         struct mips_frame_info info;
 490         unsigned long size, ofs;
 491         int leaf;
 492         extern void ret_from_irq(void);
 493         extern void ret_from_exception(void);
 494
 495         if (!stack_page)
 496                 return 0;
 497
 498         /*
 499          * If we reached the bottom of interrupt context,
 500          * return saved pc in pt_regs.
 501          */
 502         if (pc == (unsigned long)ret_from_irq ||
 503             pc == (unsigned long)ret_from_exception) {
 504                 struct pt_regs *regs;
 505                 if (*sp >= stack_page &&
 506                     *sp + sizeof(*regs) <= stack_page + THREAD_SIZE - 32) {
 507                         regs = (struct pt_regs *)*sp;
 508                         pc = regs->cp0_epc;
 509                         if (!user_mode(regs) && __kernel_text_address(pc)) {
 510                                 *sp = regs->regs[29];
 511                                 *ra = regs->regs[31];
 512                                 return pc;
 513                         }
 514                 }
 515                 return 0;
 516         }
 517         if (!kallsyms_lookup_size_offset(pc, &size, &ofs))
 518                 return 0;
 519         /*
 520          * Return ra if an exception occurred at the first instruction
 521          */
 522         if (unlikely(ofs == 0)) {
 523                 pc = *ra;
 524                 *ra = 0;
 525                 return pc;
 526         }
 527
 528         info.func = (void *)(pc - ofs);
 529         info.func_size = ofs;   /* analyze from start to ofs */
 530         leaf = get_frame_info(&info);
 531         if (leaf < 0)
 532                 return 0;
 533
 534         if (*sp < stack_page ||
 535             *sp + info.frame_size > stack_page + THREAD_SIZE - 32)
 536                 return 0;
 537
 538         if (leaf)
 539                 /*
 540                  * For some extreme cases, get_frame_info() can
 541                  * consider wrongly a nested function as a leaf
 542                  * one. In that cases avoid to return always the
 543                  * same value.
 544                  */
 545                 pc = pc != *ra ? *ra : 0;
 546         else
 547                 pc = ((unsigned long *)(*sp))[info.pc_offset];
 548
 549         *sp += info.frame_size;
 550         *ra = 0;
 551         return __kernel_text_address(pc) ? pc : 0;
 552 }
 553 EXPORT_SYMBOL(unwind_stack_by_address);
 554
 555 /* used by show_backtrace() */
 556 unsigned long unwind_stack(struct task_struct *task, unsigned long *sp,
 557                            unsigned long pc, unsigned long *ra)
 558 {
 559         unsigned long stack_page = 0;
 560         int cpu;
 561
 562         for_each_possible_cpu(cpu) {
 563                 if (on_irq_stack(cpu, *sp)) {
 564                         stack_page = (unsigned long)irq_stack[cpu];
 565                         break;
 566                 }
 567         }
 568
 569         if (!stack_page)
 570                 stack_page = (unsigned long)task_stack_page(task);
 571
 572         return unwind_stack_by_address(stack_page, sp, pc, ra);
 573 }
 574 #endif
 575
 576 /*
 577  * get_wchan - a maintenance nightmare^W^Wpain in the ass ...
 578  */
 579 unsigned long get_wchan(struct task_struct *task)
 580 {
 581         unsigned long pc = 0;
 582 #ifdef CONFIG_KALLSYMS
 583         unsigned long sp;
 584         unsigned long ra = 0;
 585 #endif
 586
 587         if (!task || task == current || task->state == TASK_RUNNING)
 588                 goto out;
 589         if (!task_stack_page(task))
 590                 goto out;
 591
 592         pc = thread_saved_pc(task);
 593
 594 #ifdef CONFIG_KALLSYMS
 595         sp = task->thread.reg29 + schedule_mfi.frame_size;
 596
 597         while (in_sched_functions(pc))
 598                 pc = unwind_stack(task, &sp, pc, &ra);
 599 #endif
 600
 601 out:
 602         return pc;
 603 }
 604
 605 /*
 606  * Don't forget that the stack pointer must be aligned on a 8 bytes
 607  * boundary for 32-bits ABI and 16 bytes for 64-bits ABI.
 608  */
 609 unsigned long arch_align_stack(unsigned long sp)
 610 {
 611         if (!(current->personality & ADDR_NO_RANDOMIZE) && randomize_va_space)
 612                 sp -= get_random_int() & ~PAGE_MASK;
 613
 614         return sp & ALMASK;
 615 }
 616
 617 static void arch_dump_stack(void *info)
 618 {
 619         struct pt_regs *regs;
 620
 621         regs = get_irq_regs();
 622
 623         if (regs)
 624                 show_regs(regs);
 625
 626         dump_stack();
 627 }
 628
 629 void arch_trigger_cpumask_backtrace(const cpumask_t *mask, bool exclude_self)
 630 {
 631         long this_cpu = get_cpu();
 632
 633         if (cpumask_test_cpu(this_cpu, mask) && !exclude_self)
 634                 dump_stack();
 635
 636         smp_call_function_many(mask, arch_dump_stack, NULL, 1);
 637
 638         put_cpu();
 639 }
 640
 641 int mips_get_process_fp_mode(struct task_struct *task)
 642 {
 643         int value = 0;
 644
 645         if (!test_tsk_thread_flag(task, TIF_32BIT_FPREGS))
 646                 value |= PR_FP_MODE_FR;
 647         if (test_tsk_thread_flag(task, TIF_HYBRID_FPREGS))
 648                 value |= PR_FP_MODE_FRE;
 649
 650         return value;
 651 }
 652
 653 static void prepare_for_fp_mode_switch(void *info)
 654 {
 655         struct mm_struct *mm = info;
 656
 657         if (current->mm == mm)
 658                 lose_fpu(1);
 659 }
 660
 661 int mips_set_process_fp_mode(struct task_struct *task, unsigned int value)
 662 {
 663         const unsigned int known_bits = PR_FP_MODE_FR | PR_FP_MODE_FRE;
 664         struct task_struct *t;
 665         int max_users;
 666
 667         /* Check the value is valid */
 668         if (value & ~known_bits)
 669                 return -EOPNOTSUPP;
 670
 671         /* Avoid inadvertently triggering emulation */
 672         if ((value & PR_FP_MODE_FR) && raw_cpu_has_fpu &&
 673             !(raw_current_cpu_data.fpu_id & MIPS_FPIR_F64))
 674                 return -EOPNOTSUPP;
 675         if ((value & PR_FP_MODE_FRE) && raw_cpu_has_fpu && !cpu_has_fre)
 676                 return -EOPNOTSUPP;
 677
 678         /* FR = 0 not supported in MIPS R6 */
 679         if (!(value & PR_FP_MODE_FR) && raw_cpu_has_fpu && cpu_has_mips_r6)
 680                 return -EOPNOTSUPP;
 681
 682         /* Proceed with the mode switch */
 683         preempt_disable();
 684
 685         /* Save FP & vector context, then disable FPU & MSA */
 686         if (task->signal == current->signal)
 687                 lose_fpu(1);
 688
 689         /* Prevent any threads from obtaining live FP context */
 690         atomic_set(&task->mm->context.fp_mode_switching, 1);
 691         smp_mb__after_atomic();
 692
 693         /*
 694          * If there are multiple online CPUs then force any which are running
 695          * threads in this process to lose their FPU context, which they can't
 696          * regain until fp_mode_switching is cleared later.
 697          */
 698         if (num_online_cpus() > 1) {
 699                 /* No need to send an IPI for the local CPU */
 700                 max_users = (task->mm == current->mm) ? 1 : 0;
 701
 702                 if (atomic_read(&current->mm->mm_users) > max_users)
 703                         smp_call_function(prepare_for_fp_mode_switch,
 704                                           (void *)current->mm, 1);
 705         }
 706
 707         /*
 708          * There are now no threads of the process with live FP context, so it
 709          * is safe to proceed with the FP mode switch.
 710          */
 711         for_each_thread(task, t) {
 712                 /* Update desired FP register width */
 713                 if (value & PR_FP_MODE_FR) {
 714                         clear_tsk_thread_flag(t, TIF_32BIT_FPREGS);
 715                 } else {
 716                         set_tsk_thread_flag(t, TIF_32BIT_FPREGS);
 717                         clear_tsk_thread_flag(t, TIF_MSA_CTX_LIVE);
 718                 }
 719
 720                 /* Update desired FP single layout */
 721                 if (value & PR_FP_MODE_FRE)
 722                         set_tsk_thread_flag(t, TIF_HYBRID_FPREGS);
 723                 else
 724                         clear_tsk_thread_flag(t, TIF_HYBRID_FPREGS);
 725         }
 726
 727         /* Allow threads to use FP again */
 728         atomic_set(&task->mm->context.fp_mode_switching, 0);
 729         preempt_enable();
 730
 731         return 0;
 732 }
 733
 734 #if defined(CONFIG_32BIT) || defined(CONFIG_MIPS32_O32)
 735 void mips_dump_regs32(u32 *uregs, const struct pt_regs *regs)
 736 {
 737         unsigned int i;
 738
 739         for (i = MIPS32_EF_R1; i <= MIPS32_EF_R31; i++) {
 740                 /* k0/k1 are copied as zero. */
 741                 if (i == MIPS32_EF_R26 || i == MIPS32_EF_R27)
 742                         uregs[i] = 0;
 743                 else
 744                         uregs[i] = regs->regs[i - MIPS32_EF_R0];
 745         }
 746
 747         uregs[MIPS32_EF_LO] = regs->lo;
 748         uregs[MIPS32_EF_HI] = regs->hi;
 749         uregs[MIPS32_EF_CP0_EPC] = regs->cp0_epc;
 750         uregs[MIPS32_EF_CP0_BADVADDR] = regs->cp0_badvaddr;
 751         uregs[MIPS32_EF_CP0_STATUS] = regs->cp0_status;
 752         uregs[MIPS32_EF_CP0_CAUSE] = regs->cp0_cause;
 753 }
 754 #endif /* CONFIG_32BIT || CONFIG_MIPS32_O32 */
 755
 756 #ifdef CONFIG_64BIT
 757 void mips_dump_regs64(u64 *uregs, const struct pt_regs *regs)
 758 {
 759         unsigned int i;
 760
 761         for (i = MIPS64_EF_R1; i <= MIPS64_EF_R31; i++) {
 762                 /* k0/k1 are copied as zero. */
 763                 if (i == MIPS64_EF_R26 || i == MIPS64_EF_R27)
 764                         uregs[i] = 0;
 765                 else
 766                         uregs[i] = regs->regs[i - MIPS64_EF_R0];
 767         }
 768
 769         uregs[MIPS64_EF_LO] = regs->lo;
 770         uregs[MIPS64_EF_HI] = regs->hi;
 771         uregs[MIPS64_EF_CP0_EPC] = regs->cp0_epc;
 772         uregs[MIPS64_EF_CP0_BADVADDR] = regs->cp0_badvaddr;
 773         uregs[MIPS64_EF_CP0_STATUS] = regs->cp0_status;
 774         uregs[MIPS64_EF_CP0_CAUSE] = regs->cp0_cause;
 775 }
 776 #endif /* CONFIG_64BIT */