1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 1995, 1996, 2001 Ralf Baechle
4 * Copyright (C) 2001, 2004 MIPS Technologies, Inc.
5 * Copyright (C) 2004 Maciej W. Rozycki
7 #include <linux/delay.h>
8 #include <linux/kernel.h>
9 #include <linux/sched.h>
10 #include <linux/seq_file.h>
11 #include <asm/bootinfo.h>
13 #include <asm/cpu-features.h>
15 #include <asm/mipsregs.h>
16 #include <asm/processor.h>
19 unsigned int vced_count, vcei_count;
22 * No lock; only written during early bootup by CPU 0.
24 static RAW_NOTIFIER_HEAD(proc_cpuinfo_chain);
26 int __ref register_proc_cpuinfo_notifier(struct notifier_block *nb)
28 return raw_notifier_chain_register(&proc_cpuinfo_chain, nb);
31 int proc_cpuinfo_notifier_call_chain(unsigned long val, void *v)
33 return raw_notifier_call_chain(&proc_cpuinfo_chain, val, v);
36 static int show_cpuinfo(struct seq_file *m, void *v)
38 struct proc_cpuinfo_notifier_args proc_cpuinfo_notifier_args;
39 unsigned long n = (unsigned long) v - 1;
40 unsigned int version = cpu_data[n].processor_id;
41 unsigned int fp_vers = cpu_data[n].fpu_id;
51 * For the first processor also print the system type
54 seq_printf(m, "system type\t\t: %s\n", get_system_type());
55 if (mips_get_machine_name())
56 seq_printf(m, "machine\t\t\t: %s\n",
57 mips_get_machine_name());
60 seq_printf(m, "processor\t\t: %ld\n", n);
61 sprintf(fmt, "cpu model\t\t: %%s V%%d.%%d%s\n",
62 cpu_data[n].options & MIPS_CPU_FPU ? " FPU V%d.%d" : "");
63 seq_printf(m, fmt, __cpu_name[n],
64 (version >> 4) & 0x0f, version & 0x0f,
65 (fp_vers >> 4) & 0x0f, fp_vers & 0x0f);
66 seq_printf(m, "BogoMIPS\t\t: %u.%02u\n",
67 cpu_data[n].udelay_val / (500000/HZ),
68 (cpu_data[n].udelay_val / (5000/HZ)) % 100);
69 seq_printf(m, "wait instruction\t: %s\n", cpu_wait ? "yes" : "no");
70 seq_printf(m, "microsecond timers\t: %s\n",
71 cpu_has_counter ? "yes" : "no");
72 seq_printf(m, "tlb_entries\t\t: %d\n", cpu_data[n].tlbsize);
73 seq_printf(m, "extra interrupt vector\t: %s\n",
74 cpu_has_divec ? "yes" : "no");
75 seq_printf(m, "hardware watchpoint\t: %s",
76 cpu_has_watch ? "yes, " : "no\n");
78 seq_printf(m, "count: %d, address/irw mask: [",
79 cpu_data[n].watch_reg_count);
80 for (i = 0; i < cpu_data[n].watch_reg_count; i++)
81 seq_printf(m, "%s0x%04x", i ? ", " : "",
82 cpu_data[n].watch_reg_masks[i]);
86 seq_puts(m, "isa\t\t\t:");
88 seq_puts(m, " mips1");
90 seq_puts(m, " mips2");
92 seq_puts(m, " mips3");
94 seq_puts(m, " mips4");
96 seq_puts(m, " mips5");
98 seq_puts(m, " mips32r1");
100 seq_puts(m, " mips32r2");
101 if (cpu_has_mips32r5)
102 seq_puts(m, " mips32r5");
103 if (cpu_has_mips32r6)
104 seq_puts(m, " mips32r6");
105 if (cpu_has_mips64r1)
106 seq_puts(m, " mips64r1");
107 if (cpu_has_mips64r2)
108 seq_puts(m, " mips64r2");
109 if (cpu_has_mips64r5)
110 seq_puts(m, " mips64r5");
111 if (cpu_has_mips64r6)
112 seq_puts(m, " mips64r6");
115 seq_puts(m, "ASEs implemented\t:");
117 seq_puts(m, " mips16");
118 if (cpu_has_mips16e2)
119 seq_puts(m, " mips16e2");
121 seq_puts(m, " mdmx");
123 seq_puts(m, " mips3d");
124 if (cpu_has_smartmips)
125 seq_puts(m, " smartmips");
129 seq_puts(m, " dsp2");
131 seq_puts(m, " dsp3");
135 seq_puts(m, " micromips");
146 if (cpu_has_loongson_mmi)
147 seq_puts(m, " loongson-mmi");
148 if (cpu_has_loongson_cam)
149 seq_puts(m, " loongson-cam");
150 if (cpu_has_loongson_ext)
151 seq_puts(m, " loongson-ext");
152 if (cpu_has_loongson_ext2)
153 seq_puts(m, " loongson-ext2");
157 seq_printf(m, "micromips kernel\t: %s\n",
158 (read_c0_config3() & MIPS_CONF3_ISA_OE) ? "yes" : "no");
161 seq_puts(m, "Options implemented\t:");
165 seq_puts(m, " ftlb");
167 seq_puts(m, " tlbinv");
168 if (cpu_has_segments)
169 seq_puts(m, " segments");
171 seq_puts(m, " rixiex");
173 seq_puts(m, " ldpte");
175 seq_puts(m, " maar");
177 seq_puts(m, " rw_llb");
179 seq_puts(m, " 4kex");
180 if (cpu_has_3k_cache)
181 seq_puts(m, " 3k_cache");
182 if (cpu_has_4k_cache)
183 seq_puts(m, " 4k_cache");
184 if (cpu_has_octeon_cache)
185 seq_puts(m, " octeon_cache");
189 seq_puts(m, " 32fpr");
190 if (cpu_has_cache_cdex_p)
191 seq_puts(m, " cache_cdex_p");
192 if (cpu_has_cache_cdex_s)
193 seq_puts(m, " cache_cdex_s");
194 if (cpu_has_prefetch)
195 seq_puts(m, " prefetch");
197 seq_puts(m, " mcheck");
199 seq_puts(m, " ejtag");
201 seq_puts(m, " llsc");
202 if (cpu_has_guestctl0ext)
203 seq_puts(m, " guestctl0ext");
204 if (cpu_has_guestctl1)
205 seq_puts(m, " guestctl1");
206 if (cpu_has_guestctl2)
207 seq_puts(m, " guestctl2");
209 seq_puts(m, " guestid");
213 seq_puts(m, " rixi");
218 if (cpu_has_vtag_icache)
219 seq_puts(m, " vtag_icache");
220 if (cpu_has_dc_aliases)
221 seq_puts(m, " dc_aliases");
222 if (cpu_has_ic_fills_f_dc)
223 seq_puts(m, " ic_fills_f_dc");
224 if (cpu_has_pindexed_dcache)
225 seq_puts(m, " pindexed_dcache");
226 if (cpu_has_userlocal)
227 seq_puts(m, " userlocal");
229 seq_puts(m, " nofpuex");
231 seq_puts(m, " vint");
233 seq_puts(m, " veic");
234 if (cpu_has_inclusive_pcaches)
235 seq_puts(m, " inclusive_pcaches");
236 if (cpu_has_perf_cntr_intr_bit)
237 seq_puts(m, " perf_cntr_intr_bit");
243 seq_puts(m, " cdmm");
244 if (cpu_has_small_pages)
245 seq_puts(m, " small_pages");
246 if (cpu_has_nan_legacy)
247 seq_puts(m, " nan_legacy");
248 if (cpu_has_nan_2008)
249 seq_puts(m, " nan_2008");
250 if (cpu_has_ebase_wg)
251 seq_puts(m, " ebase_wg");
252 if (cpu_has_badinstr)
253 seq_puts(m, " badinstr");
254 if (cpu_has_badinstrp)
255 seq_puts(m, " badinstrp");
256 if (cpu_has_contextconfig)
257 seq_puts(m, " contextconfig");
259 seq_puts(m, " perf");
260 if (cpu_has_mac2008_only)
261 seq_puts(m, " mac2008_only");
262 if (cpu_has_ftlbparex)
263 seq_puts(m, " ftlbparex");
265 seq_puts(m, " gsexcex");
266 if (cpu_has_shared_ftlb_ram)
267 seq_puts(m, " shared_ftlb_ram");
268 if (cpu_has_shared_ftlb_entries)
269 seq_puts(m, " shared_ftlb_entries");
270 if (cpu_has_mipsmt_pertccounters)
271 seq_puts(m, " mipsmt_pertccounters");
273 seq_puts(m, " mmid");
274 if (cpu_has_mm_sysad)
275 seq_puts(m, " mm_sysad");
277 seq_puts(m, " mm_full");
280 seq_printf(m, "shadow register sets\t: %d\n",
282 seq_printf(m, "kscratch registers\t: %d\n",
283 hweight8(cpu_data[n].kscratch_mask));
284 seq_printf(m, "package\t\t\t: %d\n", cpu_data[n].package);
285 seq_printf(m, "core\t\t\t: %d\n", cpu_core(&cpu_data[n]));
287 #if defined(CONFIG_MIPS_MT_SMP) || defined(CONFIG_CPU_MIPSR6)
289 seq_printf(m, "VPE\t\t\t: %d\n", cpu_vpe_id(&cpu_data[n]));
291 seq_printf(m, "VP\t\t\t: %d\n", cpu_vpe_id(&cpu_data[n]));
294 sprintf(fmt, "VCE%%c exceptions\t\t: %s\n",
295 cpu_has_vce ? "%u" : "not available");
296 seq_printf(m, fmt, 'D', vced_count);
297 seq_printf(m, fmt, 'I', vcei_count);
299 proc_cpuinfo_notifier_args.m = m;
300 proc_cpuinfo_notifier_args.n = n;
302 raw_notifier_call_chain(&proc_cpuinfo_chain, 0,
303 &proc_cpuinfo_notifier_args);
310 static void *c_start(struct seq_file *m, loff_t *pos)
312 unsigned long i = *pos;
314 return i < NR_CPUS ? (void *) (i + 1) : NULL;
317 static void *c_next(struct seq_file *m, void *v, loff_t *pos)
320 return c_start(m, pos);
323 static void c_stop(struct seq_file *m, void *v)
327 const struct seq_operations cpuinfo_op = {
331 .show = show_cpuinfo,