1 /***********************license start***************
2 * Author: Cavium Networks
4 * Contact: support@caviumnetworks.com
5 * This file is part of the OCTEON SDK
7 * Copyright (c) 2003-2008 Cavium Networks
9 * This file is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License, Version 2, as
11 * published by the Free Software Foundation.
13 * This file is distributed in the hope that it will be useful, but
14 * AS-IS and WITHOUT ANY WARRANTY; without even the implied warranty
15 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE, TITLE, or
16 * NONINFRINGEMENT. See the GNU General Public License for more
19 * You should have received a copy of the GNU General Public License
20 * along with this file; if not, write to the Free Software
21 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
22 * or visit http://www.gnu.org/licenses/.
24 * This file may also be available under a different license from Cavium.
25 * Contact Cavium Networks for more information
26 ***********************license end**************************************/
28 #ifndef __CVMX_PCI_DEFS_H__
29 #define __CVMX_PCI_DEFS_H__
31 #define CVMX_PCI_BAR1_INDEXX(offset) \
32 (0x0000000000000100ull + (((offset) & 31) * 4))
33 #define CVMX_PCI_BIST_REG \
34 (0x00000000000001C0ull)
35 #define CVMX_PCI_CFG00 \
36 (0x0000000000000000ull)
37 #define CVMX_PCI_CFG01 \
38 (0x0000000000000004ull)
39 #define CVMX_PCI_CFG02 \
40 (0x0000000000000008ull)
41 #define CVMX_PCI_CFG03 \
42 (0x000000000000000Cull)
43 #define CVMX_PCI_CFG04 \
44 (0x0000000000000010ull)
45 #define CVMX_PCI_CFG05 \
46 (0x0000000000000014ull)
47 #define CVMX_PCI_CFG06 \
48 (0x0000000000000018ull)
49 #define CVMX_PCI_CFG07 \
50 (0x000000000000001Cull)
51 #define CVMX_PCI_CFG08 \
52 (0x0000000000000020ull)
53 #define CVMX_PCI_CFG09 \
54 (0x0000000000000024ull)
55 #define CVMX_PCI_CFG10 \
56 (0x0000000000000028ull)
57 #define CVMX_PCI_CFG11 \
58 (0x000000000000002Cull)
59 #define CVMX_PCI_CFG12 \
60 (0x0000000000000030ull)
61 #define CVMX_PCI_CFG13 \
62 (0x0000000000000034ull)
63 #define CVMX_PCI_CFG15 \
64 (0x000000000000003Cull)
65 #define CVMX_PCI_CFG16 \
66 (0x0000000000000040ull)
67 #define CVMX_PCI_CFG17 \
68 (0x0000000000000044ull)
69 #define CVMX_PCI_CFG18 \
70 (0x0000000000000048ull)
71 #define CVMX_PCI_CFG19 \
72 (0x000000000000004Cull)
73 #define CVMX_PCI_CFG20 \
74 (0x0000000000000050ull)
75 #define CVMX_PCI_CFG21 \
76 (0x0000000000000054ull)
77 #define CVMX_PCI_CFG22 \
78 (0x0000000000000058ull)
79 #define CVMX_PCI_CFG56 \
80 (0x00000000000000E0ull)
81 #define CVMX_PCI_CFG57 \
82 (0x00000000000000E4ull)
83 #define CVMX_PCI_CFG58 \
84 (0x00000000000000E8ull)
85 #define CVMX_PCI_CFG59 \
86 (0x00000000000000ECull)
87 #define CVMX_PCI_CFG60 \
88 (0x00000000000000F0ull)
89 #define CVMX_PCI_CFG61 \
90 (0x00000000000000F4ull)
91 #define CVMX_PCI_CFG62 \
92 (0x00000000000000F8ull)
93 #define CVMX_PCI_CFG63 \
94 (0x00000000000000FCull)
95 #define CVMX_PCI_CNT_REG \
96 (0x00000000000001B8ull)
97 #define CVMX_PCI_CTL_STATUS_2 \
98 (0x000000000000018Cull)
99 #define CVMX_PCI_DBELL_0 \
100 (0x0000000000000080ull)
101 #define CVMX_PCI_DBELL_1 \
102 (0x0000000000000088ull)
103 #define CVMX_PCI_DBELL_2 \
104 (0x0000000000000090ull)
105 #define CVMX_PCI_DBELL_3 \
106 (0x0000000000000098ull)
107 #define CVMX_PCI_DBELL_X(offset) \
108 (0x0000000000000080ull + (((offset) & 3) * 8))
109 #define CVMX_PCI_DMA_CNT0 \
110 (0x00000000000000A0ull)
111 #define CVMX_PCI_DMA_CNT1 \
112 (0x00000000000000A8ull)
113 #define CVMX_PCI_DMA_CNTX(offset) \
114 (0x00000000000000A0ull + (((offset) & 1) * 8))
115 #define CVMX_PCI_DMA_INT_LEV0 \
116 (0x00000000000000A4ull)
117 #define CVMX_PCI_DMA_INT_LEV1 \
118 (0x00000000000000ACull)
119 #define CVMX_PCI_DMA_INT_LEVX(offset) \
120 (0x00000000000000A4ull + (((offset) & 1) * 8))
121 #define CVMX_PCI_DMA_TIME0 \
122 (0x00000000000000B0ull)
123 #define CVMX_PCI_DMA_TIME1 \
124 (0x00000000000000B4ull)
125 #define CVMX_PCI_DMA_TIMEX(offset) \
126 (0x00000000000000B0ull + (((offset) & 1) * 4))
127 #define CVMX_PCI_INSTR_COUNT0 \
128 (0x0000000000000084ull)
129 #define CVMX_PCI_INSTR_COUNT1 \
130 (0x000000000000008Cull)
131 #define CVMX_PCI_INSTR_COUNT2 \
132 (0x0000000000000094ull)
133 #define CVMX_PCI_INSTR_COUNT3 \
134 (0x000000000000009Cull)
135 #define CVMX_PCI_INSTR_COUNTX(offset) \
136 (0x0000000000000084ull + (((offset) & 3) * 8))
137 #define CVMX_PCI_INT_ENB \
138 (0x0000000000000038ull)
139 #define CVMX_PCI_INT_ENB2 \
140 (0x00000000000001A0ull)
141 #define CVMX_PCI_INT_SUM \
142 (0x0000000000000030ull)
143 #define CVMX_PCI_INT_SUM2 \
144 (0x0000000000000198ull)
145 #define CVMX_PCI_MSI_RCV \
146 (0x00000000000000F0ull)
147 #define CVMX_PCI_PKTS_SENT0 \
148 (0x0000000000000040ull)
149 #define CVMX_PCI_PKTS_SENT1 \
150 (0x0000000000000050ull)
151 #define CVMX_PCI_PKTS_SENT2 \
152 (0x0000000000000060ull)
153 #define CVMX_PCI_PKTS_SENT3 \
154 (0x0000000000000070ull)
155 #define CVMX_PCI_PKTS_SENTX(offset) \
156 (0x0000000000000040ull + (((offset) & 3) * 16))
157 #define CVMX_PCI_PKTS_SENT_INT_LEV0 \
158 (0x0000000000000048ull)
159 #define CVMX_PCI_PKTS_SENT_INT_LEV1 \
160 (0x0000000000000058ull)
161 #define CVMX_PCI_PKTS_SENT_INT_LEV2 \
162 (0x0000000000000068ull)
163 #define CVMX_PCI_PKTS_SENT_INT_LEV3 \
164 (0x0000000000000078ull)
165 #define CVMX_PCI_PKTS_SENT_INT_LEVX(offset) \
166 (0x0000000000000048ull + (((offset) & 3) * 16))
167 #define CVMX_PCI_PKTS_SENT_TIME0 \
168 (0x000000000000004Cull)
169 #define CVMX_PCI_PKTS_SENT_TIME1 \
170 (0x000000000000005Cull)
171 #define CVMX_PCI_PKTS_SENT_TIME2 \
172 (0x000000000000006Cull)
173 #define CVMX_PCI_PKTS_SENT_TIME3 \
174 (0x000000000000007Cull)
175 #define CVMX_PCI_PKTS_SENT_TIMEX(offset) \
176 (0x000000000000004Cull + (((offset) & 3) * 16))
177 #define CVMX_PCI_PKT_CREDITS0 \
178 (0x0000000000000044ull)
179 #define CVMX_PCI_PKT_CREDITS1 \
180 (0x0000000000000054ull)
181 #define CVMX_PCI_PKT_CREDITS2 \
182 (0x0000000000000064ull)
183 #define CVMX_PCI_PKT_CREDITS3 \
184 (0x0000000000000074ull)
185 #define CVMX_PCI_PKT_CREDITSX(offset) \
186 (0x0000000000000044ull + (((offset) & 3) * 16))
187 #define CVMX_PCI_READ_CMD_6 \
188 (0x0000000000000180ull)
189 #define CVMX_PCI_READ_CMD_C \
190 (0x0000000000000184ull)
191 #define CVMX_PCI_READ_CMD_E \
192 (0x0000000000000188ull)
193 #define CVMX_PCI_READ_TIMEOUT \
194 CVMX_ADD_IO_SEG(0x00011F00000000B0ull)
195 #define CVMX_PCI_SCM_REG \
196 (0x00000000000001A8ull)
197 #define CVMX_PCI_TSR_REG \
198 (0x00000000000001B0ull)
199 #define CVMX_PCI_WIN_RD_ADDR \
200 (0x0000000000000008ull)
201 #define CVMX_PCI_WIN_RD_DATA \
202 (0x0000000000000020ull)
203 #define CVMX_PCI_WIN_WR_ADDR \
204 (0x0000000000000000ull)
205 #define CVMX_PCI_WIN_WR_DATA \
206 (0x0000000000000010ull)
207 #define CVMX_PCI_WIN_WR_MASK \
208 (0x0000000000000018ull)
210 union cvmx_pci_bar1_indexx {
212 struct cvmx_pci_bar1_indexx_s {
213 uint32_t reserved_18_31:14;
214 uint32_t addr_idx:14;
219 struct cvmx_pci_bar1_indexx_s cn30xx;
220 struct cvmx_pci_bar1_indexx_s cn31xx;
221 struct cvmx_pci_bar1_indexx_s cn38xx;
222 struct cvmx_pci_bar1_indexx_s cn38xxp2;
223 struct cvmx_pci_bar1_indexx_s cn50xx;
224 struct cvmx_pci_bar1_indexx_s cn58xx;
225 struct cvmx_pci_bar1_indexx_s cn58xxp1;
228 union cvmx_pci_bist_reg {
230 struct cvmx_pci_bist_reg_s {
231 uint64_t reserved_10_63:54;
243 struct cvmx_pci_bist_reg_s cn50xx;
246 union cvmx_pci_cfg00 {
248 struct cvmx_pci_cfg00_s {
252 struct cvmx_pci_cfg00_s cn30xx;
253 struct cvmx_pci_cfg00_s cn31xx;
254 struct cvmx_pci_cfg00_s cn38xx;
255 struct cvmx_pci_cfg00_s cn38xxp2;
256 struct cvmx_pci_cfg00_s cn50xx;
257 struct cvmx_pci_cfg00_s cn58xx;
258 struct cvmx_pci_cfg00_s cn58xxp1;
261 union cvmx_pci_cfg01 {
263 struct cvmx_pci_cfg01_s {
272 uint32_t reserved_22_22:1;
276 uint32_t reserved_11_18:8;
289 struct cvmx_pci_cfg01_s cn30xx;
290 struct cvmx_pci_cfg01_s cn31xx;
291 struct cvmx_pci_cfg01_s cn38xx;
292 struct cvmx_pci_cfg01_s cn38xxp2;
293 struct cvmx_pci_cfg01_s cn50xx;
294 struct cvmx_pci_cfg01_s cn58xx;
295 struct cvmx_pci_cfg01_s cn58xxp1;
298 union cvmx_pci_cfg02 {
300 struct cvmx_pci_cfg02_s {
304 struct cvmx_pci_cfg02_s cn30xx;
305 struct cvmx_pci_cfg02_s cn31xx;
306 struct cvmx_pci_cfg02_s cn38xx;
307 struct cvmx_pci_cfg02_s cn38xxp2;
308 struct cvmx_pci_cfg02_s cn50xx;
309 struct cvmx_pci_cfg02_s cn58xx;
310 struct cvmx_pci_cfg02_s cn58xxp1;
313 union cvmx_pci_cfg03 {
315 struct cvmx_pci_cfg03_s {
318 uint32_t reserved_28_29:2;
324 struct cvmx_pci_cfg03_s cn30xx;
325 struct cvmx_pci_cfg03_s cn31xx;
326 struct cvmx_pci_cfg03_s cn38xx;
327 struct cvmx_pci_cfg03_s cn38xxp2;
328 struct cvmx_pci_cfg03_s cn50xx;
329 struct cvmx_pci_cfg03_s cn58xx;
330 struct cvmx_pci_cfg03_s cn58xxp1;
333 union cvmx_pci_cfg04 {
335 struct cvmx_pci_cfg04_s {
342 struct cvmx_pci_cfg04_s cn30xx;
343 struct cvmx_pci_cfg04_s cn31xx;
344 struct cvmx_pci_cfg04_s cn38xx;
345 struct cvmx_pci_cfg04_s cn38xxp2;
346 struct cvmx_pci_cfg04_s cn50xx;
347 struct cvmx_pci_cfg04_s cn58xx;
348 struct cvmx_pci_cfg04_s cn58xxp1;
351 union cvmx_pci_cfg05 {
353 struct cvmx_pci_cfg05_s {
356 struct cvmx_pci_cfg05_s cn30xx;
357 struct cvmx_pci_cfg05_s cn31xx;
358 struct cvmx_pci_cfg05_s cn38xx;
359 struct cvmx_pci_cfg05_s cn38xxp2;
360 struct cvmx_pci_cfg05_s cn50xx;
361 struct cvmx_pci_cfg05_s cn58xx;
362 struct cvmx_pci_cfg05_s cn58xxp1;
365 union cvmx_pci_cfg06 {
367 struct cvmx_pci_cfg06_s {
374 struct cvmx_pci_cfg06_s cn30xx;
375 struct cvmx_pci_cfg06_s cn31xx;
376 struct cvmx_pci_cfg06_s cn38xx;
377 struct cvmx_pci_cfg06_s cn38xxp2;
378 struct cvmx_pci_cfg06_s cn50xx;
379 struct cvmx_pci_cfg06_s cn58xx;
380 struct cvmx_pci_cfg06_s cn58xxp1;
383 union cvmx_pci_cfg07 {
385 struct cvmx_pci_cfg07_s {
388 struct cvmx_pci_cfg07_s cn30xx;
389 struct cvmx_pci_cfg07_s cn31xx;
390 struct cvmx_pci_cfg07_s cn38xx;
391 struct cvmx_pci_cfg07_s cn38xxp2;
392 struct cvmx_pci_cfg07_s cn50xx;
393 struct cvmx_pci_cfg07_s cn58xx;
394 struct cvmx_pci_cfg07_s cn58xxp1;
397 union cvmx_pci_cfg08 {
399 struct cvmx_pci_cfg08_s {
405 struct cvmx_pci_cfg08_s cn30xx;
406 struct cvmx_pci_cfg08_s cn31xx;
407 struct cvmx_pci_cfg08_s cn38xx;
408 struct cvmx_pci_cfg08_s cn38xxp2;
409 struct cvmx_pci_cfg08_s cn50xx;
410 struct cvmx_pci_cfg08_s cn58xx;
411 struct cvmx_pci_cfg08_s cn58xxp1;
414 union cvmx_pci_cfg09 {
416 struct cvmx_pci_cfg09_s {
420 struct cvmx_pci_cfg09_s cn30xx;
421 struct cvmx_pci_cfg09_s cn31xx;
422 struct cvmx_pci_cfg09_s cn38xx;
423 struct cvmx_pci_cfg09_s cn38xxp2;
424 struct cvmx_pci_cfg09_s cn50xx;
425 struct cvmx_pci_cfg09_s cn58xx;
426 struct cvmx_pci_cfg09_s cn58xxp1;
429 union cvmx_pci_cfg10 {
431 struct cvmx_pci_cfg10_s {
434 struct cvmx_pci_cfg10_s cn30xx;
435 struct cvmx_pci_cfg10_s cn31xx;
436 struct cvmx_pci_cfg10_s cn38xx;
437 struct cvmx_pci_cfg10_s cn38xxp2;
438 struct cvmx_pci_cfg10_s cn50xx;
439 struct cvmx_pci_cfg10_s cn58xx;
440 struct cvmx_pci_cfg10_s cn58xxp1;
443 union cvmx_pci_cfg11 {
445 struct cvmx_pci_cfg11_s {
449 struct cvmx_pci_cfg11_s cn30xx;
450 struct cvmx_pci_cfg11_s cn31xx;
451 struct cvmx_pci_cfg11_s cn38xx;
452 struct cvmx_pci_cfg11_s cn38xxp2;
453 struct cvmx_pci_cfg11_s cn50xx;
454 struct cvmx_pci_cfg11_s cn58xx;
455 struct cvmx_pci_cfg11_s cn58xxp1;
458 union cvmx_pci_cfg12 {
460 struct cvmx_pci_cfg12_s {
463 uint32_t reserved_1_10:10;
466 struct cvmx_pci_cfg12_s cn30xx;
467 struct cvmx_pci_cfg12_s cn31xx;
468 struct cvmx_pci_cfg12_s cn38xx;
469 struct cvmx_pci_cfg12_s cn38xxp2;
470 struct cvmx_pci_cfg12_s cn50xx;
471 struct cvmx_pci_cfg12_s cn58xx;
472 struct cvmx_pci_cfg12_s cn58xxp1;
475 union cvmx_pci_cfg13 {
477 struct cvmx_pci_cfg13_s {
478 uint32_t reserved_8_31:24;
481 struct cvmx_pci_cfg13_s cn30xx;
482 struct cvmx_pci_cfg13_s cn31xx;
483 struct cvmx_pci_cfg13_s cn38xx;
484 struct cvmx_pci_cfg13_s cn38xxp2;
485 struct cvmx_pci_cfg13_s cn50xx;
486 struct cvmx_pci_cfg13_s cn58xx;
487 struct cvmx_pci_cfg13_s cn58xxp1;
490 union cvmx_pci_cfg15 {
492 struct cvmx_pci_cfg15_s {
498 struct cvmx_pci_cfg15_s cn30xx;
499 struct cvmx_pci_cfg15_s cn31xx;
500 struct cvmx_pci_cfg15_s cn38xx;
501 struct cvmx_pci_cfg15_s cn38xxp2;
502 struct cvmx_pci_cfg15_s cn50xx;
503 struct cvmx_pci_cfg15_s cn58xx;
504 struct cvmx_pci_cfg15_s cn58xxp1;
507 union cvmx_pci_cfg16 {
509 struct cvmx_pci_cfg16_s {
523 uint32_t reserved_2_2:1;
527 struct cvmx_pci_cfg16_s cn30xx;
528 struct cvmx_pci_cfg16_s cn31xx;
529 struct cvmx_pci_cfg16_s cn38xx;
530 struct cvmx_pci_cfg16_s cn38xxp2;
531 struct cvmx_pci_cfg16_s cn50xx;
532 struct cvmx_pci_cfg16_s cn58xx;
533 struct cvmx_pci_cfg16_s cn58xxp1;
536 union cvmx_pci_cfg17 {
538 struct cvmx_pci_cfg17_s {
541 struct cvmx_pci_cfg17_s cn30xx;
542 struct cvmx_pci_cfg17_s cn31xx;
543 struct cvmx_pci_cfg17_s cn38xx;
544 struct cvmx_pci_cfg17_s cn38xxp2;
545 struct cvmx_pci_cfg17_s cn50xx;
546 struct cvmx_pci_cfg17_s cn58xx;
547 struct cvmx_pci_cfg17_s cn58xxp1;
550 union cvmx_pci_cfg18 {
552 struct cvmx_pci_cfg18_s {
555 struct cvmx_pci_cfg18_s cn30xx;
556 struct cvmx_pci_cfg18_s cn31xx;
557 struct cvmx_pci_cfg18_s cn38xx;
558 struct cvmx_pci_cfg18_s cn38xxp2;
559 struct cvmx_pci_cfg18_s cn50xx;
560 struct cvmx_pci_cfg18_s cn58xx;
561 struct cvmx_pci_cfg18_s cn58xxp1;
564 union cvmx_pci_cfg19 {
566 struct cvmx_pci_cfg19_s {
579 uint32_t reserved_9_10:2;
582 uint32_t reserved_6_6:1;
586 struct cvmx_pci_cfg19_s cn30xx;
587 struct cvmx_pci_cfg19_s cn31xx;
588 struct cvmx_pci_cfg19_s cn38xx;
589 struct cvmx_pci_cfg19_s cn38xxp2;
590 struct cvmx_pci_cfg19_s cn50xx;
591 struct cvmx_pci_cfg19_s cn58xx;
592 struct cvmx_pci_cfg19_s cn58xxp1;
595 union cvmx_pci_cfg20 {
597 struct cvmx_pci_cfg20_s {
600 struct cvmx_pci_cfg20_s cn30xx;
601 struct cvmx_pci_cfg20_s cn31xx;
602 struct cvmx_pci_cfg20_s cn38xx;
603 struct cvmx_pci_cfg20_s cn38xxp2;
604 struct cvmx_pci_cfg20_s cn50xx;
605 struct cvmx_pci_cfg20_s cn58xx;
606 struct cvmx_pci_cfg20_s cn58xxp1;
609 union cvmx_pci_cfg21 {
611 struct cvmx_pci_cfg21_s {
614 struct cvmx_pci_cfg21_s cn30xx;
615 struct cvmx_pci_cfg21_s cn31xx;
616 struct cvmx_pci_cfg21_s cn38xx;
617 struct cvmx_pci_cfg21_s cn38xxp2;
618 struct cvmx_pci_cfg21_s cn50xx;
619 struct cvmx_pci_cfg21_s cn58xx;
620 struct cvmx_pci_cfg21_s cn58xxp1;
623 union cvmx_pci_cfg22 {
625 struct cvmx_pci_cfg22_s {
627 uint32_t reserved_19_24:6;
634 struct cvmx_pci_cfg22_s cn30xx;
635 struct cvmx_pci_cfg22_s cn31xx;
636 struct cvmx_pci_cfg22_s cn38xx;
637 struct cvmx_pci_cfg22_s cn38xxp2;
638 struct cvmx_pci_cfg22_s cn50xx;
639 struct cvmx_pci_cfg22_s cn58xx;
640 struct cvmx_pci_cfg22_s cn58xxp1;
643 union cvmx_pci_cfg56 {
645 struct cvmx_pci_cfg56_s {
646 uint32_t reserved_23_31:9;
654 struct cvmx_pci_cfg56_s cn30xx;
655 struct cvmx_pci_cfg56_s cn31xx;
656 struct cvmx_pci_cfg56_s cn38xx;
657 struct cvmx_pci_cfg56_s cn38xxp2;
658 struct cvmx_pci_cfg56_s cn50xx;
659 struct cvmx_pci_cfg56_s cn58xx;
660 struct cvmx_pci_cfg56_s cn58xxp1;
663 union cvmx_pci_cfg57 {
665 struct cvmx_pci_cfg57_s {
666 uint32_t reserved_30_31:2;
680 struct cvmx_pci_cfg57_s cn30xx;
681 struct cvmx_pci_cfg57_s cn31xx;
682 struct cvmx_pci_cfg57_s cn38xx;
683 struct cvmx_pci_cfg57_s cn38xxp2;
684 struct cvmx_pci_cfg57_s cn50xx;
685 struct cvmx_pci_cfg57_s cn58xx;
686 struct cvmx_pci_cfg57_s cn58xxp1;
689 union cvmx_pci_cfg58 {
691 struct cvmx_pci_cfg58_s {
697 uint32_t reserved_20_20:1;
703 struct cvmx_pci_cfg58_s cn30xx;
704 struct cvmx_pci_cfg58_s cn31xx;
705 struct cvmx_pci_cfg58_s cn38xx;
706 struct cvmx_pci_cfg58_s cn38xxp2;
707 struct cvmx_pci_cfg58_s cn50xx;
708 struct cvmx_pci_cfg58_s cn58xx;
709 struct cvmx_pci_cfg58_s cn58xxp1;
712 union cvmx_pci_cfg59 {
714 struct cvmx_pci_cfg59_s {
718 uint32_t reserved_16_21:6;
723 uint32_t reserved_2_7:6;
726 struct cvmx_pci_cfg59_s cn30xx;
727 struct cvmx_pci_cfg59_s cn31xx;
728 struct cvmx_pci_cfg59_s cn38xx;
729 struct cvmx_pci_cfg59_s cn38xxp2;
730 struct cvmx_pci_cfg59_s cn50xx;
731 struct cvmx_pci_cfg59_s cn58xx;
732 struct cvmx_pci_cfg59_s cn58xxp1;
735 union cvmx_pci_cfg60 {
737 struct cvmx_pci_cfg60_s {
738 uint32_t reserved_24_31:8;
746 struct cvmx_pci_cfg60_s cn30xx;
747 struct cvmx_pci_cfg60_s cn31xx;
748 struct cvmx_pci_cfg60_s cn38xx;
749 struct cvmx_pci_cfg60_s cn38xxp2;
750 struct cvmx_pci_cfg60_s cn50xx;
751 struct cvmx_pci_cfg60_s cn58xx;
752 struct cvmx_pci_cfg60_s cn58xxp1;
755 union cvmx_pci_cfg61 {
757 struct cvmx_pci_cfg61_s {
759 uint32_t reserved_0_1:2;
761 struct cvmx_pci_cfg61_s cn30xx;
762 struct cvmx_pci_cfg61_s cn31xx;
763 struct cvmx_pci_cfg61_s cn38xx;
764 struct cvmx_pci_cfg61_s cn38xxp2;
765 struct cvmx_pci_cfg61_s cn50xx;
766 struct cvmx_pci_cfg61_s cn58xx;
767 struct cvmx_pci_cfg61_s cn58xxp1;
770 union cvmx_pci_cfg62 {
772 struct cvmx_pci_cfg62_s {
775 struct cvmx_pci_cfg62_s cn30xx;
776 struct cvmx_pci_cfg62_s cn31xx;
777 struct cvmx_pci_cfg62_s cn38xx;
778 struct cvmx_pci_cfg62_s cn38xxp2;
779 struct cvmx_pci_cfg62_s cn50xx;
780 struct cvmx_pci_cfg62_s cn58xx;
781 struct cvmx_pci_cfg62_s cn58xxp1;
784 union cvmx_pci_cfg63 {
786 struct cvmx_pci_cfg63_s {
787 uint32_t reserved_16_31:16;
790 struct cvmx_pci_cfg63_s cn30xx;
791 struct cvmx_pci_cfg63_s cn31xx;
792 struct cvmx_pci_cfg63_s cn38xx;
793 struct cvmx_pci_cfg63_s cn38xxp2;
794 struct cvmx_pci_cfg63_s cn50xx;
795 struct cvmx_pci_cfg63_s cn58xx;
796 struct cvmx_pci_cfg63_s cn58xxp1;
799 union cvmx_pci_cnt_reg {
801 struct cvmx_pci_cnt_reg_s {
802 uint64_t reserved_38_63:26;
809 struct cvmx_pci_cnt_reg_s cn50xx;
810 struct cvmx_pci_cnt_reg_s cn58xx;
811 struct cvmx_pci_cnt_reg_s cn58xxp1;
814 union cvmx_pci_ctl_status_2 {
816 struct cvmx_pci_ctl_status_2_s {
817 uint32_t reserved_29_31:3;
829 uint32_t reserved_14_14:1;
840 struct cvmx_pci_ctl_status_2_s cn30xx;
841 struct cvmx_pci_ctl_status_2_cn31xx {
842 uint32_t reserved_20_31:12;
848 uint32_t reserved_14_14:1;
859 struct cvmx_pci_ctl_status_2_s cn38xx;
860 struct cvmx_pci_ctl_status_2_cn31xx cn38xxp2;
861 struct cvmx_pci_ctl_status_2_s cn50xx;
862 struct cvmx_pci_ctl_status_2_s cn58xx;
863 struct cvmx_pci_ctl_status_2_s cn58xxp1;
866 union cvmx_pci_dbellx {
868 struct cvmx_pci_dbellx_s {
869 uint32_t reserved_16_31:16;
872 struct cvmx_pci_dbellx_s cn30xx;
873 struct cvmx_pci_dbellx_s cn31xx;
874 struct cvmx_pci_dbellx_s cn38xx;
875 struct cvmx_pci_dbellx_s cn38xxp2;
876 struct cvmx_pci_dbellx_s cn50xx;
877 struct cvmx_pci_dbellx_s cn58xx;
878 struct cvmx_pci_dbellx_s cn58xxp1;
881 union cvmx_pci_dma_cntx {
883 struct cvmx_pci_dma_cntx_s {
886 struct cvmx_pci_dma_cntx_s cn30xx;
887 struct cvmx_pci_dma_cntx_s cn31xx;
888 struct cvmx_pci_dma_cntx_s cn38xx;
889 struct cvmx_pci_dma_cntx_s cn38xxp2;
890 struct cvmx_pci_dma_cntx_s cn50xx;
891 struct cvmx_pci_dma_cntx_s cn58xx;
892 struct cvmx_pci_dma_cntx_s cn58xxp1;
895 union cvmx_pci_dma_int_levx {
897 struct cvmx_pci_dma_int_levx_s {
900 struct cvmx_pci_dma_int_levx_s cn30xx;
901 struct cvmx_pci_dma_int_levx_s cn31xx;
902 struct cvmx_pci_dma_int_levx_s cn38xx;
903 struct cvmx_pci_dma_int_levx_s cn38xxp2;
904 struct cvmx_pci_dma_int_levx_s cn50xx;
905 struct cvmx_pci_dma_int_levx_s cn58xx;
906 struct cvmx_pci_dma_int_levx_s cn58xxp1;
909 union cvmx_pci_dma_timex {
911 struct cvmx_pci_dma_timex_s {
912 uint32_t dma_time:32;
914 struct cvmx_pci_dma_timex_s cn30xx;
915 struct cvmx_pci_dma_timex_s cn31xx;
916 struct cvmx_pci_dma_timex_s cn38xx;
917 struct cvmx_pci_dma_timex_s cn38xxp2;
918 struct cvmx_pci_dma_timex_s cn50xx;
919 struct cvmx_pci_dma_timex_s cn58xx;
920 struct cvmx_pci_dma_timex_s cn58xxp1;
923 union cvmx_pci_instr_countx {
925 struct cvmx_pci_instr_countx_s {
928 struct cvmx_pci_instr_countx_s cn30xx;
929 struct cvmx_pci_instr_countx_s cn31xx;
930 struct cvmx_pci_instr_countx_s cn38xx;
931 struct cvmx_pci_instr_countx_s cn38xxp2;
932 struct cvmx_pci_instr_countx_s cn50xx;
933 struct cvmx_pci_instr_countx_s cn58xx;
934 struct cvmx_pci_instr_countx_s cn58xxp1;
937 union cvmx_pci_int_enb {
939 struct cvmx_pci_int_enb_s {
940 uint64_t reserved_34_63:30;
966 uint64_t imsi_mabt:1;
967 uint64_t imsi_tabt:1;
976 struct cvmx_pci_int_enb_cn30xx {
977 uint64_t reserved_34_63:30;
987 uint64_t reserved_22_24:3;
989 uint64_t reserved_18_20:3;
999 uint64_t imsi_mabt:1;
1000 uint64_t imsi_tabt:1;
1001 uint64_t imsi_per:1;
1005 uint64_t imr_wtto:1;
1006 uint64_t imr_wabt:1;
1007 uint64_t itr_wabt:1;
1009 struct cvmx_pci_int_enb_cn31xx {
1010 uint64_t reserved_34_63:30;
1020 uint64_t reserved_23_24:2;
1023 uint64_t reserved_19_20:2;
1026 uint64_t irsl_int:1;
1032 uint64_t itsr_abt:1;
1033 uint64_t imsc_msg:1;
1034 uint64_t imsi_mabt:1;
1035 uint64_t imsi_tabt:1;
1036 uint64_t imsi_per:1;
1040 uint64_t imr_wtto:1;
1041 uint64_t imr_wabt:1;
1042 uint64_t itr_wabt:1;
1044 struct cvmx_pci_int_enb_s cn38xx;
1045 struct cvmx_pci_int_enb_s cn38xxp2;
1046 struct cvmx_pci_int_enb_cn31xx cn50xx;
1047 struct cvmx_pci_int_enb_s cn58xx;
1048 struct cvmx_pci_int_enb_s cn58xxp1;
1051 union cvmx_pci_int_enb2 {
1053 struct cvmx_pci_int_enb2_s {
1054 uint64_t reserved_34_63:30;
1072 uint64_t rrsl_int:1;
1078 uint64_t rtsr_abt:1;
1079 uint64_t rmsc_msg:1;
1080 uint64_t rmsi_mabt:1;
1081 uint64_t rmsi_tabt:1;
1082 uint64_t rmsi_per:1;
1086 uint64_t rmr_wtto:1;
1087 uint64_t rmr_wabt:1;
1088 uint64_t rtr_wabt:1;
1090 struct cvmx_pci_int_enb2_cn30xx {
1091 uint64_t reserved_34_63:30;
1101 uint64_t reserved_22_24:3;
1103 uint64_t reserved_18_20:3;
1105 uint64_t rrsl_int:1;
1111 uint64_t rtsr_abt:1;
1112 uint64_t rmsc_msg:1;
1113 uint64_t rmsi_mabt:1;
1114 uint64_t rmsi_tabt:1;
1115 uint64_t rmsi_per:1;
1119 uint64_t rmr_wtto:1;
1120 uint64_t rmr_wabt:1;
1121 uint64_t rtr_wabt:1;
1123 struct cvmx_pci_int_enb2_cn31xx {
1124 uint64_t reserved_34_63:30;
1134 uint64_t reserved_23_24:2;
1137 uint64_t reserved_19_20:2;
1140 uint64_t rrsl_int:1;
1146 uint64_t rtsr_abt:1;
1147 uint64_t rmsc_msg:1;
1148 uint64_t rmsi_mabt:1;
1149 uint64_t rmsi_tabt:1;
1150 uint64_t rmsi_per:1;
1154 uint64_t rmr_wtto:1;
1155 uint64_t rmr_wabt:1;
1156 uint64_t rtr_wabt:1;
1158 struct cvmx_pci_int_enb2_s cn38xx;
1159 struct cvmx_pci_int_enb2_s cn38xxp2;
1160 struct cvmx_pci_int_enb2_cn31xx cn50xx;
1161 struct cvmx_pci_int_enb2_s cn58xx;
1162 struct cvmx_pci_int_enb2_s cn58xxp1;
1165 union cvmx_pci_int_sum {
1167 struct cvmx_pci_int_sum_s {
1168 uint64_t reserved_34_63:30;
1194 uint64_t msi_mabt:1;
1195 uint64_t msi_tabt:1;
1204 struct cvmx_pci_int_sum_cn30xx {
1205 uint64_t reserved_34_63:30;
1215 uint64_t reserved_22_24:3;
1217 uint64_t reserved_18_20:3;
1227 uint64_t msi_mabt:1;
1228 uint64_t msi_tabt:1;
1237 struct cvmx_pci_int_sum_cn31xx {
1238 uint64_t reserved_34_63:30;
1248 uint64_t reserved_23_24:2;
1251 uint64_t reserved_19_20:2;
1262 uint64_t msi_mabt:1;
1263 uint64_t msi_tabt:1;
1272 struct cvmx_pci_int_sum_s cn38xx;
1273 struct cvmx_pci_int_sum_s cn38xxp2;
1274 struct cvmx_pci_int_sum_cn31xx cn50xx;
1275 struct cvmx_pci_int_sum_s cn58xx;
1276 struct cvmx_pci_int_sum_s cn58xxp1;
1279 union cvmx_pci_int_sum2 {
1281 struct cvmx_pci_int_sum2_s {
1282 uint64_t reserved_34_63:30;
1308 uint64_t msi_mabt:1;
1309 uint64_t msi_tabt:1;
1318 struct cvmx_pci_int_sum2_cn30xx {
1319 uint64_t reserved_34_63:30;
1329 uint64_t reserved_22_24:3;
1331 uint64_t reserved_18_20:3;
1341 uint64_t msi_mabt:1;
1342 uint64_t msi_tabt:1;
1351 struct cvmx_pci_int_sum2_cn31xx {
1352 uint64_t reserved_34_63:30;
1362 uint64_t reserved_23_24:2;
1365 uint64_t reserved_19_20:2;
1376 uint64_t msi_mabt:1;
1377 uint64_t msi_tabt:1;
1386 struct cvmx_pci_int_sum2_s cn38xx;
1387 struct cvmx_pci_int_sum2_s cn38xxp2;
1388 struct cvmx_pci_int_sum2_cn31xx cn50xx;
1389 struct cvmx_pci_int_sum2_s cn58xx;
1390 struct cvmx_pci_int_sum2_s cn58xxp1;
1393 union cvmx_pci_msi_rcv {
1395 struct cvmx_pci_msi_rcv_s {
1396 uint32_t reserved_6_31:26;
1399 struct cvmx_pci_msi_rcv_s cn30xx;
1400 struct cvmx_pci_msi_rcv_s cn31xx;
1401 struct cvmx_pci_msi_rcv_s cn38xx;
1402 struct cvmx_pci_msi_rcv_s cn38xxp2;
1403 struct cvmx_pci_msi_rcv_s cn50xx;
1404 struct cvmx_pci_msi_rcv_s cn58xx;
1405 struct cvmx_pci_msi_rcv_s cn58xxp1;
1408 union cvmx_pci_pkt_creditsx {
1410 struct cvmx_pci_pkt_creditsx_s {
1411 uint32_t pkt_cnt:16;
1412 uint32_t ptr_cnt:16;
1414 struct cvmx_pci_pkt_creditsx_s cn30xx;
1415 struct cvmx_pci_pkt_creditsx_s cn31xx;
1416 struct cvmx_pci_pkt_creditsx_s cn38xx;
1417 struct cvmx_pci_pkt_creditsx_s cn38xxp2;
1418 struct cvmx_pci_pkt_creditsx_s cn50xx;
1419 struct cvmx_pci_pkt_creditsx_s cn58xx;
1420 struct cvmx_pci_pkt_creditsx_s cn58xxp1;
1423 union cvmx_pci_pkts_sentx {
1425 struct cvmx_pci_pkts_sentx_s {
1426 uint32_t pkt_cnt:32;
1428 struct cvmx_pci_pkts_sentx_s cn30xx;
1429 struct cvmx_pci_pkts_sentx_s cn31xx;
1430 struct cvmx_pci_pkts_sentx_s cn38xx;
1431 struct cvmx_pci_pkts_sentx_s cn38xxp2;
1432 struct cvmx_pci_pkts_sentx_s cn50xx;
1433 struct cvmx_pci_pkts_sentx_s cn58xx;
1434 struct cvmx_pci_pkts_sentx_s cn58xxp1;
1437 union cvmx_pci_pkts_sent_int_levx {
1439 struct cvmx_pci_pkts_sent_int_levx_s {
1440 uint32_t pkt_cnt:32;
1442 struct cvmx_pci_pkts_sent_int_levx_s cn30xx;
1443 struct cvmx_pci_pkts_sent_int_levx_s cn31xx;
1444 struct cvmx_pci_pkts_sent_int_levx_s cn38xx;
1445 struct cvmx_pci_pkts_sent_int_levx_s cn38xxp2;
1446 struct cvmx_pci_pkts_sent_int_levx_s cn50xx;
1447 struct cvmx_pci_pkts_sent_int_levx_s cn58xx;
1448 struct cvmx_pci_pkts_sent_int_levx_s cn58xxp1;
1451 union cvmx_pci_pkts_sent_timex {
1453 struct cvmx_pci_pkts_sent_timex_s {
1454 uint32_t pkt_time:32;
1456 struct cvmx_pci_pkts_sent_timex_s cn30xx;
1457 struct cvmx_pci_pkts_sent_timex_s cn31xx;
1458 struct cvmx_pci_pkts_sent_timex_s cn38xx;
1459 struct cvmx_pci_pkts_sent_timex_s cn38xxp2;
1460 struct cvmx_pci_pkts_sent_timex_s cn50xx;
1461 struct cvmx_pci_pkts_sent_timex_s cn58xx;
1462 struct cvmx_pci_pkts_sent_timex_s cn58xxp1;
1465 union cvmx_pci_read_cmd_6 {
1467 struct cvmx_pci_read_cmd_6_s {
1468 uint32_t reserved_9_31:23;
1469 uint32_t min_data:6;
1470 uint32_t prefetch:3;
1472 struct cvmx_pci_read_cmd_6_s cn30xx;
1473 struct cvmx_pci_read_cmd_6_s cn31xx;
1474 struct cvmx_pci_read_cmd_6_s cn38xx;
1475 struct cvmx_pci_read_cmd_6_s cn38xxp2;
1476 struct cvmx_pci_read_cmd_6_s cn50xx;
1477 struct cvmx_pci_read_cmd_6_s cn58xx;
1478 struct cvmx_pci_read_cmd_6_s cn58xxp1;
1481 union cvmx_pci_read_cmd_c {
1483 struct cvmx_pci_read_cmd_c_s {
1484 uint32_t reserved_9_31:23;
1485 uint32_t min_data:6;
1486 uint32_t prefetch:3;
1488 struct cvmx_pci_read_cmd_c_s cn30xx;
1489 struct cvmx_pci_read_cmd_c_s cn31xx;
1490 struct cvmx_pci_read_cmd_c_s cn38xx;
1491 struct cvmx_pci_read_cmd_c_s cn38xxp2;
1492 struct cvmx_pci_read_cmd_c_s cn50xx;
1493 struct cvmx_pci_read_cmd_c_s cn58xx;
1494 struct cvmx_pci_read_cmd_c_s cn58xxp1;
1497 union cvmx_pci_read_cmd_e {
1499 struct cvmx_pci_read_cmd_e_s {
1500 uint32_t reserved_9_31:23;
1501 uint32_t min_data:6;
1502 uint32_t prefetch:3;
1504 struct cvmx_pci_read_cmd_e_s cn30xx;
1505 struct cvmx_pci_read_cmd_e_s cn31xx;
1506 struct cvmx_pci_read_cmd_e_s cn38xx;
1507 struct cvmx_pci_read_cmd_e_s cn38xxp2;
1508 struct cvmx_pci_read_cmd_e_s cn50xx;
1509 struct cvmx_pci_read_cmd_e_s cn58xx;
1510 struct cvmx_pci_read_cmd_e_s cn58xxp1;
1513 union cvmx_pci_read_timeout {
1515 struct cvmx_pci_read_timeout_s {
1516 uint64_t reserved_32_63:32;
1520 struct cvmx_pci_read_timeout_s cn30xx;
1521 struct cvmx_pci_read_timeout_s cn31xx;
1522 struct cvmx_pci_read_timeout_s cn38xx;
1523 struct cvmx_pci_read_timeout_s cn38xxp2;
1524 struct cvmx_pci_read_timeout_s cn50xx;
1525 struct cvmx_pci_read_timeout_s cn58xx;
1526 struct cvmx_pci_read_timeout_s cn58xxp1;
1529 union cvmx_pci_scm_reg {
1531 struct cvmx_pci_scm_reg_s {
1532 uint64_t reserved_32_63:32;
1535 struct cvmx_pci_scm_reg_s cn30xx;
1536 struct cvmx_pci_scm_reg_s cn31xx;
1537 struct cvmx_pci_scm_reg_s cn38xx;
1538 struct cvmx_pci_scm_reg_s cn38xxp2;
1539 struct cvmx_pci_scm_reg_s cn50xx;
1540 struct cvmx_pci_scm_reg_s cn58xx;
1541 struct cvmx_pci_scm_reg_s cn58xxp1;
1544 union cvmx_pci_tsr_reg {
1546 struct cvmx_pci_tsr_reg_s {
1547 uint64_t reserved_36_63:28;
1550 struct cvmx_pci_tsr_reg_s cn30xx;
1551 struct cvmx_pci_tsr_reg_s cn31xx;
1552 struct cvmx_pci_tsr_reg_s cn38xx;
1553 struct cvmx_pci_tsr_reg_s cn38xxp2;
1554 struct cvmx_pci_tsr_reg_s cn50xx;
1555 struct cvmx_pci_tsr_reg_s cn58xx;
1556 struct cvmx_pci_tsr_reg_s cn58xxp1;
1559 union cvmx_pci_win_rd_addr {
1561 struct cvmx_pci_win_rd_addr_s {
1562 uint64_t reserved_49_63:15;
1564 uint64_t reserved_0_47:48;
1566 struct cvmx_pci_win_rd_addr_cn30xx {
1567 uint64_t reserved_49_63:15;
1569 uint64_t rd_addr:46;
1570 uint64_t reserved_0_1:2;
1572 struct cvmx_pci_win_rd_addr_cn30xx cn31xx;
1573 struct cvmx_pci_win_rd_addr_cn38xx {
1574 uint64_t reserved_49_63:15;
1576 uint64_t rd_addr:45;
1577 uint64_t reserved_0_2:3;
1579 struct cvmx_pci_win_rd_addr_cn38xx cn38xxp2;
1580 struct cvmx_pci_win_rd_addr_cn30xx cn50xx;
1581 struct cvmx_pci_win_rd_addr_cn38xx cn58xx;
1582 struct cvmx_pci_win_rd_addr_cn38xx cn58xxp1;
1585 union cvmx_pci_win_rd_data {
1587 struct cvmx_pci_win_rd_data_s {
1588 uint64_t rd_data:64;
1590 struct cvmx_pci_win_rd_data_s cn30xx;
1591 struct cvmx_pci_win_rd_data_s cn31xx;
1592 struct cvmx_pci_win_rd_data_s cn38xx;
1593 struct cvmx_pci_win_rd_data_s cn38xxp2;
1594 struct cvmx_pci_win_rd_data_s cn50xx;
1595 struct cvmx_pci_win_rd_data_s cn58xx;
1596 struct cvmx_pci_win_rd_data_s cn58xxp1;
1599 union cvmx_pci_win_wr_addr {
1601 struct cvmx_pci_win_wr_addr_s {
1602 uint64_t reserved_49_63:15;
1604 uint64_t wr_addr:45;
1605 uint64_t reserved_0_2:3;
1607 struct cvmx_pci_win_wr_addr_s cn30xx;
1608 struct cvmx_pci_win_wr_addr_s cn31xx;
1609 struct cvmx_pci_win_wr_addr_s cn38xx;
1610 struct cvmx_pci_win_wr_addr_s cn38xxp2;
1611 struct cvmx_pci_win_wr_addr_s cn50xx;
1612 struct cvmx_pci_win_wr_addr_s cn58xx;
1613 struct cvmx_pci_win_wr_addr_s cn58xxp1;
1616 union cvmx_pci_win_wr_data {
1618 struct cvmx_pci_win_wr_data_s {
1619 uint64_t wr_data:64;
1621 struct cvmx_pci_win_wr_data_s cn30xx;
1622 struct cvmx_pci_win_wr_data_s cn31xx;
1623 struct cvmx_pci_win_wr_data_s cn38xx;
1624 struct cvmx_pci_win_wr_data_s cn38xxp2;
1625 struct cvmx_pci_win_wr_data_s cn50xx;
1626 struct cvmx_pci_win_wr_data_s cn58xx;
1627 struct cvmx_pci_win_wr_data_s cn58xxp1;
1630 union cvmx_pci_win_wr_mask {
1632 struct cvmx_pci_win_wr_mask_s {
1633 uint64_t reserved_8_63:56;
1636 struct cvmx_pci_win_wr_mask_s cn30xx;
1637 struct cvmx_pci_win_wr_mask_s cn31xx;
1638 struct cvmx_pci_win_wr_mask_s cn38xx;
1639 struct cvmx_pci_win_wr_mask_s cn38xxp2;
1640 struct cvmx_pci_win_wr_mask_s cn50xx;
1641 struct cvmx_pci_win_wr_mask_s cn58xx;
1642 struct cvmx_pci_win_wr_mask_s cn58xxp1;